JPH06311133A - System and device for multiplexing digital sound - Google Patents

Abstract

PURPOSE:To improve the quality of television sound when digital sound is orthogonally multiplexed on a television signal and to powerfully correct an error. CONSTITUTION:A bit stream obtained by compressing a two-channels sound signal in a sound compression device 11 is synchronized with a video field as a bit distribution sequence which is completed by 15 fields by a counter 13 and a control bit generation circuit 15. Then, the signal is accumulated in a memory 19 and an error correction code is added by a device 21 for the respective lines of a memory map. The exclusive OR of a data string after interleaving, which is read out by a read circuit 23, and a PN data string from a PN generator 27 is taken in a circuit 25. It is made random and the spectrum concentration of a multiplex modulation signal is suppressed. An orthogonal multiplex modulator orthogonally multiplexes it on the video signal so as to transmit it. Thus, the perfect periods of the compressed bit stream and the format in a video field unit can be realized, a control code is decoded after the error is corrected and resistance against the error can be improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital audio multiplex system and an apparatus thereof, and more particularly to a digital audio multiplex system and an apparatus thereof capable of improving the quality of television audio by multiplexing digital audio with a television signal. It is about.

[0002]

2. Description of the Related Art In recent years, in order to improve the quality of sound in television broadcasting, it has been desired to digitize the television sound. One solution has already been realized in satellite broadcasting. In this method, an audio carrier is set up separately from the video carrier, and two 16-bit digital audio channels with a sampling frequency fs = 48 kHz or fs =
A 14-bit digital voice 4-channel signal at 32 kHz is formatted, and this signal is QPSK-modulated and is transmitted on a voice carrier.

By the way, technical development for improving the quality of existing terrestrial television broadcasting and changing the aspect ratio from the conventional 4: 3 to 16: 9 wide screen (so-called EDTV-
II) has been made, and along with this, it is desired that the voice be digitized to improve the quality. However, replacing the conventional analog audio transmission channel with digital audio, as in the satellite broadcasting system, makes it impossible to view with the existing receiver by the conventional system, and therefore the satellite broadcasting system is compatible from the viewpoint of compatibility. Is difficult to adopt. Therefore, digital audio requires a new transmission channel within the channel band.

One of the solutions is orthogonal multiplexing.
This orthogonal multiplexing system multiplexes digital audio within a video band by using a video carrier and an orthogonal carrier, and the demodulation side can separate video and audio by performing orthogonal demodulation. For modulation of audio digital signals, dicode modulation (reference document, Journal of the Television Society, Vol.
2, No. 9, 1988, p979 to p986) and the partial response modulation method.

In this orthogonal multiplexing system, the maximum transmission capacity of digital data is 70 from the multiplexing band and the multiplexing level.
It is about 0 to 800 kbps. Then, at least two channels of high-quality audio signals (for example, stereo,
Or, when transmitting more than two monaural channels,
Since an error correction code is also required, it is difficult to realize with the above transmission capacity.

Recently, the ISO (International Organization for Standardization) standardized a method for compressing high-quality voice, and ISO-1
It is summarized as S11172-3. By using this compression method, for example, the sampling frequency fs = 48
1 kHz audio data of 768 kbps, 16 bits
Even if compressed to 28 kbps, a sound quality with almost no difference from the original sound, specifically, a sound quality comparable to a CD (Compact Disc) is maintained. 4 if this compression method is used
It becomes possible to orthogonally multiplex the compressed audio of the channel to the video even if an error correction code is added.

[0007]

It is also known that when a digital audio signal is orthogonally multiplexed with a video signal, interference occurs between the two under various conditions. In particular, since the interference of the audio signal with the video signal is a problem due to the compatibility with the existing conventional method, the multiplex level of the audio signal is suppressed to a low level.
B and so on.

Further, unlike the case of satellite broadcasting, in the case of terrestrial waves, many failures in the transmission system, such as ghost failures, occur, and the error occurrence probability of digital audio data increases. In addition, the above-mentioned compressed audio has a significantly increased influence on the reproduced audio of each bit of the compressed bit stream, so that it can be said that the occurrence of an error is fatal. Therefore, it is necessary to introduce and format an error correction code which is stronger than the error correction code for satellite broadcasting.

On the other hand, it is possible to select several transmission rates of a compressed bit stream specified by MPEG. For example, 128 kbp in 2-channel mode
s, 192 kbps, 256 kbps, etc., which are video field frequencies 60 * (1000/1001)
There is a frequency relationship that is not an integer ratio with respect to Hz. Therefore, in order to format in video field units,
Some measure for absorbing the frequency relationship between the two is required in the format.

The present invention has been made in view of the above problems, and it is possible to improve the quality of television sound by orthogonally multiplexing the digital sound on the television signal and to perform a powerful error correction. It is an object of the present invention to provide a multiplex system and its device.

[0011]

To achieve the above object, the digital audio multiplex system of the first invention of the present application is a digital audio multiplex system in which a digital audio signal is orthogonally multiplexed with a television video signal and transmitted, When the number of bits of a bitstream forming a unit audio block multiplexed in a video field is converted to a compressed bitstream of an input digital audio signal and then the bitstream is distributed to consecutive unit audio blocks. In addition, among the N blocks of the unit audio block, the bit stream is allocated to M blocks by M1 bit length, and the remaining (N-
n) M2 bit length is allocated to the block,
Each unit voice block has the above-mentioned distributed M1 or M.
It includes a bit stream having a 2-bit length, a control bit including one or a plurality of bits indicating a distribution bit number of the audio bit stream, and an adjustment bit having a predetermined bit length when the bit number of the bit stream is M2 bits. The gist is that an error correction code is further added.

A second invention of the present application is summarized in that the unit audio block according to claim 1 can include an additional bit for additional information and an error correction code is added to a control bit.

The third invention of the present application is summarized as the error correction code according to claims 1 and 2 is used by shortening the difference set cyclic (272, 190) code.

Further, the fourth invention of the present application is as follows.
The audio bit stream of the unit audio block described in 3 is a
It is a gist that when arranged in a matrix of rows b columns, control bits are added to each row and an error correction code is added to each row.

Further, the fifth invention of the present application is defined by claims 1 to 4.
The unit audio block described is 1 to 1 for each block.
The gist is that it is time-multiplexed in a unit video field and orthogonally multiplexed in a video signal.

Further, the sixth invention of the present application is defined by claims 1 to 4.
When decoding the control bit indicating the distribution of the described bit stream, the gist is that the decoding is performed by a majority vote of a plurality of bits forming the control bit.

Further, the seventh invention of the present application is defined by claims 1 to 6.
The gist is to perform synchronization protection by the periodicity related to the bit length of the bit stream allocated to the unit audio block described.

Further, the eighth invention of the present application is defined by claims 1 to 7.
In the described synchronization establishment process, the gist is that the synchronization protection of the bitstream allocation flag is not performed, but the synchronization protection is performed after the synchronization is established.

The ninth invention of the present application is a digital audio multiplex encoding apparatus for orthogonally multiplexing and transmitting a digital audio signal to a television video signal, and a compression means for converting input digital audio into a compressed bit stream. When the bit stream output from this compression means is distributed to continuous unit audio blocks, the bit stream is allocated to M blocks of M1 bit lengths among N blocks of the unit audio blocks, and the rest is left. In the (N-n) block, distribution means for allocating M2 bit length, and adjustment bit generation for counting continuous video fields of the television video signal and generating an adjustment bit with a predetermined bit length for each predetermined value N fields And a control bit including one or a plurality of bits indicating the number of distributed bits of the bit stream distributed by the distribution means. Control bit generating means for generating, control bits generated by the control bit generating means, a bit stream of M1 or M2 bit length distributed by the distributing means, and when the number of bits of the bit stream is M2 bit length Output means for outputting interleaved audio data to a unit audio block including an adjustment bit having a predetermined bit length and further added with an error correction code, and audio data output from the output means for orthogonal carrier of a video carrier. The present invention is characterized in that it has an orthogonal multiplex modulation means for performing digital modulation by means of, and orthogonally multiplexing with a video signal.

The tenth invention of the present application is an orthogonal multiplex demodulation means for inputting a digital audio multiplex signal to separate and extract audio data from a video signal, and an interleave of the audio data separated and extracted by the orthogonal multiplex demodulation means. Deinterleaving means for solving the above, error correction means for performing error correction processing on the audio data deinterleaved by this deinterleaving means, and detection of control bits from the audio data after error correction processing by this error correction means Detecting means for performing the above, a data separating means for separating and extracting the bit stream by the control bit detected by the detecting means, and a compressed audio decoding means for decoding and outputting an audio signal from the bit stream separated by the data separating means. It is a gist to have.

[0021]

With the above arrangement, the digital audio multiplexer of the first invention of the present application, when transmitting the digital audio signal orthogonally multiplexed to the television video signal, transmits the unit audio block to be multiplexed in the unit video field. The number of bits of the constituent bitstream is set to N blocks of the unit audio block,
For example, in 15 blocks, for example, n blocks, for example, 14 blocks, the bit stream has an M1 bit length, for example, 4271 bits, and the remaining (N−n) block, that is, one block, has M2 bits length, for example, 4270 bits. And each unit voice block has the allocated M1 or M2 bit length, that is, 42
71-bit or 4270-bit long bit stream, control bits including one or more bits indicating the number of distributed bits of the bit stream, and a predetermined bit when the bit stream has M2 bit length, that is, 4270 bit length It is configured by including a length adjustment bit and further adding an error correction code.

In the digital audio multiplexer of the second invention of the present application, the unit audio block according to claim 1 may include an additional bit for additional information, and the error correction code may include data including a control bit. The error is to be corrected.

In the digital voice multiplexer of the third invention of the present application, the error correction code according to claims 1 and 2 shortens the difference set cyclic (272, 190) code to enhance the error correction.

According to a fourth aspect of the present invention, there is provided a digital audio multiplexer, wherein the bit streams of the unit audio blocks according to claims 1, 2 and 3 are arranged in a matrix of a rows and b columns, for example, 186 rows and 23 columns. , A control bit is added to each row, and an error correction code is added to each row. At this time, the error correction code may target only the bit stream, the adjustment bit, or the additional bit of the row, or may target the entire row including the control bit. .

In the digital audio multiplexer of the fifth invention of the present application, the unit audio blocks of claims 1 to 4 are time-multiplexed into one unit video field for each one to a plurality of blocks and orthogonally multiplexed to the video signal.

According to the sixth aspect of the present invention, in decoding a control bit indicating distribution of a bit stream according to any one of claims 1 to 4, the decoding is performed by majority decision of a plurality of bits constituting the control bit. Therefore, it is desirable that the bit length be an odd number.

The digital audio multiplexer according to the seventh aspect of the present invention performs synchronization protection by the periodicity related to the bit length of the bit stream distributed to the unit audio blocks according to the first to sixth aspects. That is, since the M1 bit length bit stream and the M2 bit length bit stream are distributed at a predetermined cycle, more specifically, for example, a 4271 bit bit stream is distributed between consecutive 14 blocks. Since the cycle in which the bit stream of 4270 bits is distributed to the next one block is repeated, the cycle can be detected by, for example, the bit stream distribution flag, and the synchronization result can be easily protected by the detection result.

According to the eighth aspect of the present invention, the digital voice multiplexing apparatus does not perform the synchronization protection of the bitstream allocation flag in the synchronization establishment process according to the first to seventh aspects, but performs the synchronization protection after the synchronization is established. Enables correspondence.

In the digital audio multiplexer according to the ninth aspect of the present invention, the digital audio input by the compression means is converted into a compressed bit stream, and the compressed bit stream is distributed to continuous unit audio blocks. Of the N blocks of the unit audio block, the bit stream is allocated to the n blocks by M1 bit length, and the bit stream of M2 bit length is allocated to the remaining (N−n) blocks. Next, the adjustment bit generation means counts the continuous video fields of the television video signal to generate adjustment bits having a predetermined bit length for each predetermined value N fields.
Further, the control bit generating means generates a control bit including one or a plurality of bits indicating the number of distributed bits of the distributed bit stream. Then, with this control bit,
The output means outputs a bit stream having an M1 or M2 bit length, an adjustment bit having a predetermined bit length when the number of bits of the bit stream is an M2 bit length, and audio data obtained by interleaving a unit audio block including an error correction code. To be done. Further, the audio data output from the output means is digitally modulated by the orthogonal carrier of the video carrier by the orthogonal multiplexing modulator and orthogonally multiplexed to the video signal.

In the digital audio multiplexer of the tenth invention of the present application, the orthogonal audio demodulation means inputs the digital audio multiplexed signal to separate the audio data from the video signal and extract the audio data. The interleave of the audio data separated and taken out by the orthogonal multiplex demodulating means is solved by the deinterleaving means. Next, control bits are detected from the audio data after the error correction processing of the audio data, and the bit stream is separated and taken out by the detected control bits. An audio signal is decoded and output by the compressed audio decoding means based on the separated bit stream.

[0031]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configuration of a digital voice multiplexer according to the present invention.

First, the configuration of the present embodiment will be described with reference to FIG. Audio compression device 1 to which two-channel digital audio signals of a first channel and a second channel are input
1 is connected to the memory writing circuit 17. Additional information is input to the memory writing circuit 17 and the control bit generating circuit 15 is connected to the control bit generating circuit 1.
The control bits from 5 are input. A mode signal for setting a mode such as stereo, monaural or sub audio output is input to the control bit generation circuit 15, and a bit distribution flag from the connected 15 field counter 13 is input. Therefore, the memory writing circuit 17 receives the 2-channel digital audio signal, the control bit signal including the bit allocation flag, and the additional information signal.

The memory writing circuit 17 is connected to the memory 19, the error correction code generating circuit 21, and the memory reading circuit 23, and the digital audio signal and the control bit input to the memory writing circuit 17 according to the procedure described later. The signal, the additional information signal, and the error correction code generated by the error correction code generation circuit 21 are written into and read from the memory 19. The data read from the memory 19 is input to the quadrature multiplex modulator 29 via the exclusive OR circuit 25.

Pseudo random noise (hereinafter, simply abbreviated as PN) output from the PN generation circuit 27 by the input of the reset signal is input to the quadrature multiplex modulator 29 via the exclusive OR circuit 25. On the other hand, the sub-channel coding device 31 is connected. It should be noted that the sub-channel encoding device 31 is similar to the above in the audio compression device 1.
1, 15 field counter 13, control bit generation circuit 15, memory write circuit 17, memory 19, error correction code generation circuit 21, memory read circuit 23, exclusive OR circuit 25, PN generation circuit 27, quadrature multiplex modulator 2
9 and a sub-channel coding device 31.

Next, the operation and operation of this embodiment will be described with reference to FIG. The input bit stream is a 256 kbps compressed two-channel audio (stereo, monaural two channels) with a sampling frequency fs = 48 kHz.
Is. This bit stream shall be divided according to the video field.

The number of input bits per video field is 256000 / (60 * 1000/10001) = 4270 + 14/15. Therefore, 15 consecutive fields are set as one cycle,
If 4271 bits are allocated to 14 fields and 4270 bits are allocated to the remaining one field, the bit stream and the video field frequency can be completely synchronized.

Since the input bit stream is interleaved for each video field, it is temporarily stored in the memory 19. A memory map of the memory 19 is shown in FIG.
As shown in FIG. 2, the bitstream is sequentially stored in the memory map from the upper left to the upper right of the audio area, that is, in the row direction. Since the number of allocated bits per video field is different, the end of the audio area varies by one bit as shown in FIG. 2 (this one bit is referred to as adjustment data here). Further, the remaining 7 bits or 8 bits can be used for other than the audio information (here, additional data (7 bits) is set for additional information).

The first from the upper left to the lower left on the memory map
The vertical 23 bits of the column are control codes. Like the PCM audio format of satellite broadcasting, the content of the code may be an audio mode (stereo, two monaural channels, etc.), mute, or the like. In this embodiment, a bit allocation flag is newly set to be included in this control bit. This bit allocation flag is a flag indicating the allocation of the bit number of the audio stream to the video field. For example, 3 bits are used to specify 4271 bits by "000" and "11".
"1" designates 4270 bits. It should be noted that the reason why 3 bits are used here is to make it more robust against bit errors in the majority decision on the demodulation side. Therefore, the number of bits may be 1 bit or may be any number of bits depending on the correspondence to the bit error.

Further, an error correction code of 82 bits is attached to 187 bits including the control code for each row on the memory map. As an error correction code, a difference set cyclic code (272, 190) adopted in teletext (commonly called BES
(T code) is shortened to a (269,187) code (indicated by ECC in FIG. 2). This difference-set cyclic code is a powerful one that can correct an 8-bit random error, and can even correct an error of almost 11 bits by using the threshold variable method (reference document, NHK Technical Research Vol. 37,
No. 1, p38-p67, "Development of error correction method for coded transmission method teletext").

Next, in order to actually perform interleaving, the data on the memory map written in the row direction (indicated by arrow recording in FIG. 2) is called in the column direction (indicated by arrow reproduction in FIG. 2). . As a result, interleaving with a 23-bit distance is performed.

By combining this interleaving and the error correction code, it becomes possible to correct a 23 * 11 = 252 bit continuous error (block error).

Thereafter, in order to randomize the data of this output data string, a PN (pseudo random noise) generator 27 is used.
The exclusive OR circuit 25 takes the exclusive OR of the PN data string from the above and the interleaved data string. This is to prevent the spectrum of the multiplexed modulation signal from being concentrated and to assist the data reproduction at the time of demodulation. The PN is initialized for each video field and fixed PN for the format. The PN data string is generally determined by a generator polynomial, and for example, (x ¹² + x ¹⁰ +1) or the like is used.

The output is orthogonally multiplexed with the video signal by the orthogonal multiplex modulator 29 and transmitted.

By the way, a 2-channel audio bit stream of 256 kbps has a transmission rate of about 371 kbps, which is 6187 bits per field after being formatted. Even in the case of 4-channel audio transmission, the transmission capacity is 7
Since 50 kbps can be secured, 1 and 2 channels are coded as main channels, 3 and 4 channels are independently coded as sub-channels, and the same multiplexing is performed, and the multiplexing position is temporally divided in the video field for transmission. Is possible.

In the present embodiment, the audio frame synchronization becomes unnecessary by matching the video field and the audio format cycle as described above. Generally, frame synchronization takes several frames, which is a problem when the audio format period is long, specifically, 100 ms. According to the present embodiment, after the video synchronization system is started up, the audio frame synchronization time is not required, the audio processing can be started immediately, and the audio can be started up quickly.

Further, according to the present embodiment, the bit allocation sequence completed by 15 feeds makes it possible to achieve perfect synchronization between the compressed bit stream and the format of each video field. In addition, the control bit indicating the bit allocation to the video field is expressed by 3 bits,
Considering that the majority decision can be made after performing error correction using the error correction code as with voice information, the probability of erroneously cutting out the voice bitstream from the format data is lower than the error probability of each voice bitstream. However, the system is more resistant to errors.

The control bit is a bit for instructing a voice mode or mute, and usually has the same value for a certain period. Therefore, in general, unlike the satellite broadcast PCM format, the control bits are not particularly protected by the error correction code, and an integral detection method is exclusively used on the receiving side to detect and determine a certain number of times the control code continues.

However, when one audio block period is made to coincide with the video field as described above, one video field is 16.7 ms, which is long as compared with the PCM format in satellite broadcasting in which one frame is 1 ms.
If the repeated control bits are counted for a certain period in consideration of sufficient error resilience, it takes a long time to determine the control bits, especially when the system starts up or when the mode is switched, which slows down the system control and poses a problem. . Therefore, in the present embodiment, error correction is also performed on the control bits in advance, so that sufficient error resistance can be provided without increasing the integration detection period so much, and the decoding side does not We are trying to make it faster to control.

Next, an embodiment of the demodulation circuit according to the present invention will be shown. First, the configuration will be described with reference to FIG. First, the orthogonal multiplex demodulator 41 to which the orthogonal multiplex signal is input is connected to a sub-channel decoding device 43 described later, and
The exclusive OR circuit 45 is connected to the PN generating circuit 47 and the memory writing circuit 49. The memory writing circuit 49 is connected to the memory 51, the error correction circuit 53, and the memory reading circuit 55. Further, the memory reading circuit 55 is connected to the control bit detecting circuit 57 and the audio compression decoding device 59.

The sub-channel decoding device 43 is the orthogonal multiplex demodulator 41 and the exclusive OR circuit 4 as in the above.
5, PN generation circuit 47, memory writing circuit 49, memory 51, error correction circuit 53, memory reading circuit 55,
It is composed of a control bit detection circuit 57 and a voice compression decoding device 59.

Next, the operation and operation of the demodulation circuit of this embodiment will be described with reference to FIG. First, the orthogonal multiplex signal input by the orthogonal multiplex demodulator 41 is orthogonally demodulated and audio data is separated from the video signal. The separated audio data is also output to the sub-channel decoding device 43.
Next, the exclusive OR circuit 45 inputs the PN data string from the PN generator 47 to this separated audio data string,
The exclusive OR of these is taken. Since the PN sequence encoding side is initialized in units of voice blocks, the decoding side can be synchronized by performing initialization according to the format. The output is temporarily stored in the memory 51 for deinterleaving.

When the memory map shown in FIG. 2 is sequentially written in the vertical direction this time and one voice block unit has been written, the memory map is read in the horizontal direction and the error correction code is used for each line. Error correction is performed, and the corrected data is rewritten. Next, the control bit is read, the control is decoded, and various controls are performed.

Here, the integral detection method is used to increase the reliability of the control information. A majority decision is made on the same control bits over several fields. For example, if 5 fields are the integration period, the number of "1" s during that period is 3
If it is greater than or equal to "1", if less than 3, then "0". An example thereof is shown in FIG.

Referring to FIG. 4, first, the counter 61 is reset at the beginning of the integration period. After that, the control bit #n after error correction is input to the counter 61, and when it is "1", it is counted up. Next, at the end of the integration period, the output of the counter 61 is compared with the discriminant value K by the comparator 63, and the comparison result is flip-flop 65.
Latch to. This is the value of the control bit #n after detection.

The longer this integration period, the stronger the resistance to data errors, but the longer it takes to detect, and the slower the control of the system. In particular, in the case of this method in which one voice block unit is long, there is a possibility that a large delay may occur and a problem may occur.
However, in this embodiment, since the control bits are sufficiently protected by the error correction code in advance, it is possible to reduce the error protection by the integral detection. For example, the integration period is 3, 5 ,. ． ． It is possible to take it as short as.

By the way, the bit allocation flag indicating the allocation of the audio bit stream indicates the allocation of the audio bit stream in each format, and therefore integration detection is not suitable. However, since the bit allocation flag has the periodicity of 15 fields, it has this periodicity and can protect against errors.

FIG. 5 shows an example of a concrete circuit. First, when the state is out of synchronization, the state counter 75 outputs an out-of-synchronization signal. When the 3-bit bit allocation flag is input to the 3-bit majority circuit 71, the 3-bit majority circuit 71 makes a 3-bit majority decision and outputs the reproduction bit allocation flag.

When the reproduction bit distribution flag is "1", the 15-field counter 77 is reset and the state counter 75 is counted up via the AND circuit G1 to which the out-of-sync signal is input. As a result, the out-of-sync signal becomes "0", and the 15-field counter 77
Will be prevented from resetting thereafter.

When the 15-field counter 77 counts the number of fields and counts the 15th field, that is, when "1" can be expected for the next bit allocation flag, the bit allocation flag gate generation circuit 79 allocates the bits. Output flag gate signal. When the reproduction bit allocation flag is "1" when the bit allocation flag gate signal is "1", the state counter 75 is counted up, and when it is "0", it is counted down. The process of establishing synchronization and the process of losing synchronization are controlled according to the contents of the state counter 75. The first out-of-synchronization state is set to "0", and the count is incremented by detecting "1" of the bit allocation flag. It is detected n1 times in succession and becomes in the synchronized state. When the bit allocation flag is not detected, the state counter 75 counts down, and the bit allocation flag is set to n from the synchronous state.
When the detection is not performed twice consecutively, the count becomes “0” and the state becomes asynchronous. n1 and n2 are called synchronous backward protection and forward protection.

By the way, in such a periodic circuit, it takes n1 periods until the synchronization is established. Since one cycle consists of 15 fields, it takes about 0.5 seconds for 30 fields even if n1 = 2. Therefore, at least in the synchronization establishment process, a quicker response is required. Therefore, it is conceivable to use the 3-bit majority decision result of the bit allocation flag as it is at the beginning of the synchronization establishment process and protect the bit allocation flag after entering the synchronization establishment process.

In the example shown in FIG. 5, the reproduction bit allocation flag is selected in the out-of-sync state, and the bit allocation flag gate signal is selected after the synchronization status is entered and output as the detection bit allocation flag. The bit allocation flag is originally corrected by the error correction code and set to 1 by the 3-bit majority judgment circuit 71.
Since error protection is provided by bit correction, there is some reliability in this way, and there is no major obstacle even if the bit allocation flag of the majority decision output is used as it is in the process of establishing synchronization. Also, once synchronization is established, strong protection is provided.

Various modes are set by detecting the control flag. Further, the audio bit stream and the additional information are separately read from the memory according to the detected bit allocation flag. In reading, the data is read in the row direction on the memory map for deinterleaving, and 4271 bits or 4270 bits are read according to the bit allocation flag. As a result, the original compressed audio bit stream is reproduced, and the compressed audio decoder reproduces 2-channel digital audio.

In the case of the 4-channel mode, the 3 and 4-channel signals are reproduced from the output of the orthogonal multiplex demodulator through the sub-channel reproducing decoder which is almost the same as the main channel.

As described above, according to the present embodiment, the control code is corrected by the error correction code, and then the control code is decoded, so that it is possible to have sufficient resistance to the error. On the other hand, the integration detection period can be shortened and the system can be quickly controlled.

Further, according to this embodiment, error resistance can be enhanced and control can be performed quickly by detecting the majority of the bit allocation flags, and by using periodicity protection, even stronger protection can be achieved after synchronization is established.

[0066]

As described above, the present invention has the effects that digital audio is orthogonally multiplexed with a television signal to improve the quality of television audio and powerful error correction is possible.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a concrete encoding device of the present invention.

FIG. 2 is a memory map diagram for explaining a specific configuration of the encoding device shown in FIG.

FIG. 3 is a block diagram showing an example of a specific encoding device according to the present invention.

4 is a block diagram showing an embodiment of the control bit decoding circuit shown in FIG.

5 is a block diagram showing an embodiment of the bit allocation flag detection circuit shown in FIG.

[Explanation of symbols]

11 ... Voice compression device, 13 ... 15 field counter,
15 ... Control bit generating circuit, 17 ... Memory writing circuit, 19 ... Memory, 21 ... Error correction code generating circuit, 23
... memory read circuit, 25 ... exclusive OR circuit, 27
PN generator circuit, 29 ... Orthogonal multiplex modulator, 31 ... Subchannel coding device, 41 ... Orthogonal multiplex demodulator, 43 ... Subchannel decoding device, 45 ... Exclusive OR circuit, 4
7 ... PN generation circuit, 49 ... Memory writing circuit, 51 ...
Memory, 53 ... Error correction circuit, 55 ... Memory reading circuit, 57 ... Control bit detection circuit, 59 ... Voice compression / decoding device, 71 ... 3-bit majority circuit, 73 ... Selector, 75
… State counter, 77… 15 field counter,
79 ... Bit distribution flag gate generation circuit.

Claims (10)

[Claims] 1. A digital audio multiplexing system for orthogonally multiplexing and transmitting a digital audio signal to a television video signal, wherein the number of bits of a bit stream forming a unit audio block to be multiplexed in a unit video field is input. After converting the digital audio signal into a compressed bit stream, when distributing the bit stream to consecutive unit audio blocks, the N1 blocks of the unit audio blocks are M1 bits of the bit stream. Only the length is allocated, and the remaining (N-n) blocks are allocated M2 bit lengths, and each unit voice block has the allocated M1 or M.
A bit stream having a 2-bit length, a control bit including one or more bits indicating a distribution bit number of the bit stream, and an adjustment bit having a predetermined bit length when the bit number of the bit stream is M2 bits, A digital voice multiplex system characterized in that an error correction code is further added. 2. The digital audio multiplexing system according to claim 1, wherein the unit audio block may include an additional bit for additional information, and an error correction code is added to control bits. 3. The error correction code is a difference set cyclic (2
72, 190) code is used by shortening the code. 4. When the bit stream of the unit audio block is arranged in a matrix of a rows and b columns, a control bit is added to each row and an error correction code is added to each row. Claim 1, characterized in that
Digital audio multiplex method described in a few. 5. The unit audio block is time-multiplexed into one unit video field for each one to a plurality of blocks and orthogonally multiplexed to a video signal.
Digital audio multiplex system described. 6. The digital audio multiplex system according to claim 1, wherein when the control bit indicating the distribution of the bit stream is decoded, the decoding is performed by a majority vote of a plurality of bits forming the control bit. . 7. The digital audio multiplexing system according to claim 1, wherein synchronization protection is performed by periodicity related to a bit length of a bitstream distributed to the unit audio block. 8. The digital audio multiplex system according to claim 1, wherein the synchronization protection of the bitstream allocation flag is not performed in the synchronization establishment process, and the synchronization protection is performed after the synchronization is established. 9. A digital audio multiplex encoding device for orthogonally multiplexing and transmitting a digital audio signal to a television video signal, comprising compression means for converting input digital audio into a compressed bit stream, and output from this compression means. When allocating a bit stream to a continuous unit audio block, the bit stream is allocated to the N blocks of the unit audio block by M1 bit length, and the remaining (N−n)
Distribution means for allocating M2 bit lengths to the blocks; adjustment bit generation means for counting continuous video fields of the television video signal and generating adjustment bits having a predetermined bit length for each predetermined value N fields; Control bit generating means for generating a control bit including one or more bits indicating the number of distribution bits of the bit stream distributed by the means, the control bit generated by the control bit generating means, and the distribution by the distributing means. The bitstream of M1 or M2 bit length that has been set, and the bit number of the bitstream is M2.
When it has a bit length, the output means includes the adjusted bit having a predetermined bit length and outputs the interleaved audio data to the unit audio block to which the error correction code is added, and the audio data output from the output means. A digital audio multiplex coding apparatus comprising: a quadrature multiplex modulation means for performing digital modulation with a quadrature carrier of a video carrier and performing orthogonal multiplexing on a video signal. 10. An orthogonal multiplex demodulation means for inputting a digital audio multiplex signal to separate and extract audio data from a video signal, and a deinterleave means for deinterleaving the audio data separated and extracted by the orthogonal multiplex demodulation means. An error correction means for performing error correction processing on the audio data deinterleaved by the deinterleaving means; a detection means for detecting control bits from the audio data after the error correction processing by the error correction means; It is characterized by comprising data separating means for separating and extracting a bit stream by the control bit detected by the detecting means, and compressed sound decoding means for decoding and outputting a sound signal from the bit stream separated by this data separating means. Digital audio multiplex decoding device.