JPH0630706U - Encoder counter - Google Patents
Encoder counterInfo
- Publication number
- JPH0630706U JPH0630706U JP6781092U JP6781092U JPH0630706U JP H0630706 U JPH0630706 U JP H0630706U JP 6781092 U JP6781092 U JP 6781092U JP 6781092 U JP6781092 U JP 6781092U JP H0630706 U JPH0630706 U JP H0630706U
- Authority
- JP
- Japan
- Prior art keywords
- phase
- edge
- counter
- encoder
- detected
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Indicating Or Recording The Presence, Absence, Or Direction Of Movement (AREA)
- Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)
- Length Measuring Devices With Unspecified Measuring Means (AREA)
- Transmission And Conversion Of Sensor Element Output (AREA)
Abstract
(57)【要約】
【目的】 ロータリーエンコーダからのA相、B相の進
号の進相を判定し、回転方向と回転角度を得る。
【構成】 主制御用CPU内でエッジを検出し、どの相
のエッジを検出したかということと、1回前にエッジを
検出したときの各相の状態の排他的論理和の結果から、
どちらの相が進相になっているかを判定することにより
回転方向を得、また、どちらが進相になっているかで、
エッジ毎にカウントアップまたはカウントダウンされる
カウンタより回転角度を得る。
(57) [Summary] [Purpose] The phase advance of the A-phase and B-phase signals from the rotary encoder is determined to obtain the rotation direction and rotation angle. [Structure] Based on which edge is detected in the main control CPU and which edge is detected, and the result of the exclusive OR of the states of the respective phases when the edge is detected one time before,
The direction of rotation is obtained by determining which phase is leading, and which is leading,
The rotation angle is obtained from a counter that counts up or counts down for each edge.
Description
【0001】[0001]
本考案は、エンコーダカウンタに関し、特に自動車における舵角の検出に関す る。 The present invention relates to an encoder counter, and particularly to detection of a steering angle in an automobile.
【0002】[0002]
自動車におけるTCS(Traction Control System) においては、舵角セン サを用いてハンドルの切れ角の情報を得ているが、従来、舵角センサからの入力 は、図3に示すように、専用デバイス(エンコーダ用カウンタ、例えば日本電気 製IC;μPD4701)を用いてカウントし、CPUは、そのデバイスからバ スラインを通して、一定周期のサンプリングによって、そのデータを受信してい た。 In TCS (Traction Control System) in automobiles, the steering angle sensor is used to obtain information about the steering angle of the steering wheel, but conventionally, the input from the steering angle sensor is a dedicated device (as shown in Fig. 3). Counting was performed using an encoder counter, for example, an IC manufactured by NEC; μPD4701), and the CPU received the data from the device through the bus line by sampling at a constant cycle.
【0003】 専用デバイス内では、入力される2相のエンコード信号により図4の様に、例 えば、A相が進相の場合は左、B相が進相の場合は右という様に方向の判別を行 い、カウンタによりその角度の計数を行っていた。In the dedicated device, due to the input two-phase encoded signals, as shown in FIG. 4, for example, when the A phase is the advanced phase, the direction is left, and when the B phase is the advanced phase, the direction is changed. The judgment was made and the angle was counted by the counter.
【0004】[0004]
従来のエンコーダ入力方法では、専用デバイス(エンコーダカウンタ)が必要 であり、また専用デバイスと主制御用CPUを通信するためにバスラインを外部 に接続せねばならない。 The conventional encoder input method requires a dedicated device (encoder counter), and a bus line must be connected to the outside in order to communicate between the dedicated device and the main control CPU.
【0005】 それ故に本考案の目的は、専用デバイスを用いず、主制御用CPUのみでかつ また、バスラインをCPU外部に出さずに実現できるエンコーダカウンタを提供 することにある。Therefore, an object of the present invention is to provide an encoder counter which can be realized by using only a main control CPU without using a dedicated device and without exposing a bus line to the outside of the CPU.
【0006】[0006]
従って、本考案は、上述の目的を達成するために、ロータリーエンコーダによ って得られるA相、B相のパルス信号を入力して、その各相のエッジを検出する エッジ検出手段と、エッジ検出時に各相の状態(HiまたはLo)を記憶してお く記憶手段と、前記記憶手段の内容から、エッジ発生時にA相、B相のどちらが 進相になっているのかを判定する進相判定手段とを具備することを特徴としたエ ンコーダカウンタを供するものである。 Therefore, in order to achieve the above-mentioned object, the present invention inputs an A-phase and B-phase pulse signal obtained by a rotary encoder and detects an edge of each phase, and an edge detecting means and an edge detecting means. A storage unit that stores the state (Hi or Lo) of each phase at the time of detection, and a phase advance that determines from the contents of the storage unit whether the phase A or the phase B is in advance when an edge occurs. The encoder counter is characterized by comprising a judging means.
【0007】[0007]
次に本考案の一実施例について図1、図2を参照して説明する。図1は、本考 案の構成図である。本考案のエンコーダカウンタ9は主制御用CPU内に設けら れ、ロータリエンコーダ1から出力される90°位相がずれたA相2、B相3の パルス信号の立ち上がり立ち下がりのエッジを検出できるエッジ検出手段4、5 と、エッジが検出される毎にどちらの信号が進相になっているかを判定する進相 判定手段6と、前回のエッジ検出時の各相の状態を記憶しておくメモリ7と、A 相が進相のときカウントアップ、B相が進相のときカウントダウンされるカウン タ8から構成される。 Next, an embodiment of the present invention will be described with reference to FIGS. Figure 1 is a block diagram of this proposal. The encoder counter 9 of the present invention is provided in the CPU for main control, and can detect the rising and falling edges of the pulse signals of phase A 2 and phase B 3 output from the rotary encoder 1 and out of phase by 90 °. Detection means 4 and 5, a phase advance determination means 6 for determining which signal is in advance each time an edge is detected, and a memory for storing the state of each phase at the time of the previous edge detection. 7 and a counter 8 that counts up when the A phase is in advance and counts down when the B phase is in advance.
【0008】 また、進相判定手段6における進相判定は、以下の手順で行われる。Further, the phase advance determination by the phase advance determination means 6 is performed in the following procedure.
【0009】 A相のエッジを検出したときは、A相信号に接続された進相判定手段6aによ り以下の処理を行う。まずメモリ7より1回前にいずれかのエッジが検出された 時に記憶された両相の状態の排他的論理和をとり、その結果が“0”である場合 にA相が進相と判定し、カウンタ8をカウントアップし、“1”のときはB相が 進相と判定し、カウンタ8をカウントダウンする。同時にメモリ7にその時の各 相の状態(HiまたはLo)を記憶する。When the edge of the A phase is detected, the following processing is performed by the phase advance determination means 6a connected to the A phase signal. First, the exclusive OR of the states of both phases stored when one of the edges is detected one time before from the memory 7 is taken. When the result is "0", the A phase is judged to be the leading phase. , The counter 8 is counted up, and when it is "1", the B phase is judged to be in advance, and the counter 8 is counted down. At the same time, the state (Hi or Lo) of each phase at that time is stored in the memory 7.
【0010】 同様にB相のエッジを検出したときは、B相信号に接続された進相判定手段6 bにより1回前の処理で記憶された両相の状態の排他的論理和をとり、その結果 が“1”である場合にA相が進相としてカウンタ8をカウントアップし、“0” である場合にはB相が進相であるとし、カウンタ8をカウントダウンすると同時 にメモリ7にその時の各相の状態を記憶する。6a、6b内の処理を図2に示す 。Similarly, when the edge of the B-phase is detected, the phase-judgment means 6 b connected to the B-phase signal takes the exclusive OR of the states of both phases stored in the previous process, When the result is "1", the A phase is counted as the advanced phase and the counter 8 is counted up. When the result is "0", the B phase is counted as the advanced phase, and when the counter 8 is counted down, it is simultaneously stored in the memory 7. The state of each phase at that time is stored. The processing in 6a and 6b is shown in FIG.
【0011】 このようにしてカウントされたカウンタ8の値を読むことによりロータリーエ ンコーダ1の回転方向と角度を得ることができる。By reading the value of the counter 8 thus counted, the rotation direction and angle of the rotary encoder 1 can be obtained.
【0012】[0012]
以上説明したように、本考案は、主制御用CPU内部にエンコーダカウンタを 実現したので、専用デバイスを用いずにCPUに直接エンコード信号を取り込み 割り込み処理にて、各信号の各エッジ毎に方向の弁別と計数を実施するため、リ アルタイムにデータが更新され、より正確な制御が可能になる。 As described above, since the present invention realizes the encoder counter inside the main control CPU, the encode signal is directly fetched into the CPU without using a dedicated device, and the interrupt processing is performed to detect the direction of each edge of each signal. Since discrimination and counting are performed, the data is updated in real time and more accurate control is possible.
【0013】 また、CPUから外部にでるバスラインも必要ないため、機器を小型化でき、 コストダウンを図れるという効果を有する。Further, since there is no need for a bus line extending from the CPU to the outside, the device can be downsized and the cost can be reduced.
【図1】本考案の一実施例を示すブロック図である。FIG. 1 is a block diagram showing an embodiment of the present invention.
【図2】図1の各相に接続された進相判定手段6a、6
b内の処理を示す図である。FIG. 2 is a phase advance determination means 6a, 6 connected to each phase in FIG.
It is a figure which shows the process in b.
【図3】従来技術の構成を示すブロック図である。FIG. 3 is a block diagram showing a configuration of a conventional technique.
【図4】従来技術の動作を示す図である。FIG. 4 is a diagram showing an operation of a conventional technique.
1 ロータリエンコーダ 2 A相 3 B相 4 A相用エッジ検出装置 5 B相用エッジ検出装置 6 進相判定装置 6a A相用 6b B相用 7 メモリ 8 カウンタ 9 エンコーダカウンタ 1 rotary encoder 2 A phase 3 B phase 4 A phase edge detection device 5 B phase edge detection device 6 leading phase determination device 6a A phase 6b B phase 7 memory 8 counter 9 encoder counter
Claims (1)
A相、B相のパルス信号を入力して、その各相のエッジ
を検出するエッジ検出手段と、エッジ検出時に各相の状
態(HiまたはLo)を記憶しておく記憶手段と、前記
記憶手段の内容から、エッジ発生時にA相、B相のどち
らが進相になっているのかを判定する進相判定手段とを
具備することを特徴としたエンコーダカウンタ。1. An edge detecting means for inputting pulse signals of A phase and B phase obtained by a rotary encoder to detect an edge of each phase, and a state (Hi or Lo) of each phase is stored at the time of edge detection. An encoder counter, comprising: a storage means for storing the stored information; and a phase advance determination means for determining which of the A phase and the B phase is advanced when an edge occurs based on the content of the storage means.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1992067810U JP2582786Y2 (en) | 1992-09-29 | 1992-09-29 | Encoder counter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1992067810U JP2582786Y2 (en) | 1992-09-29 | 1992-09-29 | Encoder counter |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0630706U true JPH0630706U (en) | 1994-04-22 |
JP2582786Y2 JP2582786Y2 (en) | 1998-10-08 |
Family
ID=13355679
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1992067810U Expired - Fee Related JP2582786Y2 (en) | 1992-09-29 | 1992-09-29 | Encoder counter |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2582786Y2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010135974A (en) * | 2008-12-03 | 2010-06-17 | Koyo Electronics Ind Co Ltd | Two-phase counter and counter system |
JP2022064701A (en) * | 2020-10-14 | 2022-04-26 | 株式会社シグマ | Rotary encoder rotation detection method |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56106161A (en) * | 1980-01-29 | 1981-08-24 | Toshiba Corp | Pulse detector |
JPS61126421A (en) * | 1984-11-26 | 1986-06-13 | Nec Corp | Signal processing circuit for output format of incremental rotary encoder |
JPH0483118A (en) * | 1990-07-26 | 1992-03-17 | Toyota Motor Corp | Multiple rotation detecting rotary encoder |
-
1992
- 1992-09-29 JP JP1992067810U patent/JP2582786Y2/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56106161A (en) * | 1980-01-29 | 1981-08-24 | Toshiba Corp | Pulse detector |
JPS61126421A (en) * | 1984-11-26 | 1986-06-13 | Nec Corp | Signal processing circuit for output format of incremental rotary encoder |
JPH0483118A (en) * | 1990-07-26 | 1992-03-17 | Toyota Motor Corp | Multiple rotation detecting rotary encoder |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010135974A (en) * | 2008-12-03 | 2010-06-17 | Koyo Electronics Ind Co Ltd | Two-phase counter and counter system |
JP2022064701A (en) * | 2020-10-14 | 2022-04-26 | 株式会社シグマ | Rotary encoder rotation detection method |
Also Published As
Publication number | Publication date |
---|---|
JP2582786Y2 (en) | 1998-10-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |