JPH0630264A - Image processor - Google Patents

Abstract

PURPOSE:To easily remove an isolated point even when the density level of the isolated point is high by smoothing the density level of an attentional picture element while considering the density level of surrounding picture elements, judging the isolated point and removing it. CONSTITUTION:An input image from an image sensor 1 is passed through an A/D converter 2, and a shading correction circuit 3 corrects the sensitivity dispersion of the sensor 1 or the light unevenness of a lamp for original irradiation. At the time of prescanning, image data are inputted to an isolated point judge part 6, the density level of the attentional picture element is smoothed by a smoothing circuit 4 while considering the density level of the surrounding picture elements, and the smoothsing value is binarized. The binary data are recorded in a page memory 7 for binary data. '1' is recorded for the respective picture elements of the image and '0' is recorded for the isolated point. At the time of main scanning, the output of the circuit 3 is inputted to a superposing circuit 8. On the other hand, the recorded binary value is read from the memory 7 to the circuit 8 corresponding to a read command from a CPU 13, and the isolated point is removed. Then, the image signal processed by an image processing circuit 9 is outputted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus having a circuit for removing points (noise and the like) existing in isolation from an original image.

[0002]

2. Description of the Related Art An original document often contains, in addition to the original image, points that are isolated from the original image (for example, noise due to background stains on the original document). When such an original is read by an image sensor and subjected to image processing, it is desirable to remove isolated points in order to improve image quality.

Therefore, it has been practiced to detect an isolated point from the image that has been input to the image processing apparatus and output the output image with the isolated point removed. A conventional technique for removing isolated points is, for example, Japanese Patent Laid-Open No. 57-12.
There is a technique disclosed in Japanese Patent No. 1371. In this method, first, the average level of pixel densities of the input image is detected, and the preprocessed image is obtained by removing the pixels having the densities below the average level from the input image. Next, the skeleton image is obtained by binarizing the preprocessed image with a sufficiently high threshold value. Then, the binary or multivalued quantized image (digital image) of the preprocessed image is masked by the image obtained by adding black pixels around the black pixels of the skeleton image.

[0004]

However, the above-mentioned conventional technique has a problem that an isolated point having a density level higher than the average level remains as a part of the skeleton image and cannot be removed. . An object of the present invention is to solve such a problem.

[0005]

In order to solve the above problems, according to the present invention, in an image processing apparatus having means for removing isolated points from input digital image data, a matrix in which a pixel of interest is set as a center during prescanning A smoothing circuit that uses a value obtained by smoothing a window as a smoothed value of the pixel of interest, a binarizing circuit that binarizes the smoothed value by comparing it with a predetermined threshold, and the binarizing circuit. A page memory for binary data for recording the output of the binary data and a superimposing circuit for inputting image data of the pixel of interest at the time of main scan, and the binary value corresponding to the pixel of interest in the page memory for binary data is Read and input, and the binary value is 1
In the case of, the image data of the target pixel is directly output,
When the binary value is 0, a superposition circuit for outputting white data is provided.

Further, even if the size of the isolated point is slightly large,
In order to be able to reliably judge this, a reduction circuit that performs a reduction process before inputting the input digital image data to the smoothing circuit during the prescan, and a reduction circuit during the main scan.
An enlarging circuit for performing an enlarging process for restoring the image size reduced by the reducing process before inputting the binary value read from the value data page memory to the superimposing circuit may be provided.

When the reduction circuit is provided, it may be sufficiently effective in removing the isolated points even if the smoothing circuit is not provided. Therefore, the image processing apparatus is provided with means for removing the isolated points from the input digital image data. In an image processing device, a reduction circuit that reduces input digital image data during prescan, a binarization circuit that binarizes an output from the reduction circuit with a predetermined threshold value, and a binarization circuit of the binarization circuit. Based on the binary data page memory for recording the output and the image size reduced by the reduction circuit before inputting the binary value read from the binary data page memory at the main scan to the superposition circuit. An enlargement circuit for returning and an overlay circuit for inputting image data of a target pixel at the time of main scanning, which corresponds to the target pixel in the binary data page memory. When the binary value is 1, the image data of the pixel of interest is output as it is, and when the binary value is 0, white data is output. It can also be provided with a matching circuit.

Further, even if the background density level is high, the inversion value of the average value of a predetermined matrix window centered on the pixel of interest is set to the isolated pixel so that the isolated point can be reliably determined. A threshold value generation circuit may be provided to provide the threshold value as a threshold value when the value is binarized by the binarization circuit.

[0009]

[Operation] In the present invention, a scan is performed twice, a prescan and a main scan, an isolated point is determined by the prescan, and the isolated point part is replaced by white corresponding to the background in the main scan. Remove. In the pre-scan, the density level of the pixel of interest is smoothed by taking the average value of the surrounding pixels.

Since the density level of the pixels in the image portion is also high in the surrounding pixels, the density level does not drop much even if smoothed. However, the density level of the isolated point where the periphery is surrounded by the background portion is greatly reduced. As a result, even if the original point is an isolated point having a high density level, it can be easily distinguished from the pixel of the image portion, and the determination can be easily performed. After the smoothing, when binarization is performed using a threshold value set in advance to be higher than the smoothed value of the isolated point, the binary value corresponding to the isolated point becomes “0”.

After that, when a pixel having a binarized value of "0" is input in the main scan, the image data is replaced with the same white value as the background and is output. If it is "1", it is output as it is.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a diagram showing an image processing apparatus of the first embodiment. In FIG. 1, 1 is an image sensor, 2 is an A / D converter, 3 is a shading correction circuit, 4 is a smoothing circuit, 5 is a binarization circuit, 6 is an isolated point determination unit, and 7 is a page for binary data. Memory, 8 is an overlay circuit, 9 is an image processing circuit, 10 is a clock signal line, 1
Reference numeral 1 is a system bus, 12 is a timing generation circuit, and 13 is a CPU (central processing unit).

The timing generation circuit 12 provides a clock signal for synchronously performing the operation of each unit. CP
Address signals required for the operation of each unit, data signals instructed by the CPU 13, and the like are sent from the U 13 to the system bus 11. A write signal, a read signal or the like is also sent to the binary data page memory 7.

According to the present invention, when reading a document, two scans of prescan and main scan are performed. The isolated point is determined in the pre-scan, and the pixel of the isolated point is replaced with the pixel of the background (white) density level in the main scan.

The input image from the image sensor 1 is A /
The D converter 2 converts analog data into digital data. Then, the shading correction circuit 3 corrects variations in the sensitivity of the sensor elements of the image sensor 1 and uneven light (difference between the central portion and the end portion) of the lamp that illuminates the document. The above is a process that is normally performed, and is performed during both prescan and main scan.

At the time of prescan, the image data is input to the isolated point determination unit 6 in order to determine which pixel in the document is an isolated point (at the time of main scan, it is directly input to the superposition circuit 8). ). The isolated point determination unit 6 of the present invention
Is composed of a smoothing circuit 4 and a binarizing circuit 5. Smoothing the image data of a pixel of interest means a value obtained by setting a matrix window of a certain size around the pixel of interest and smoothing the data in that window. (That is, "smooth value") is used as the value of the pixel of interest.

FIG. 2 shows the configuration of the smoothing circuit 4. 4-
1, 4-2 are line memories, 4-3 are latch circuits, 4-
Reference numeral 4 is a smoothed value calculation circuit. The input from the shading correction circuit 3 in the preceding stage is directly input to the latch circuit 4-3 and also input to the latch circuit 4-3 via the line memories 4-1 and 4-2. As a result, continuous 3 lines of data are input in parallel. In this example, the latch circuit 4-3 latches three pixels in three lines to form a 3 × 3 matrix window 20, as shown in FIG.

In the smoothing value calculation circuit 4-4, the pixel of interest 21
The smoothing process is performed on the matrix window 20 centered on. The smoothing process is, for example, a process in which a coefficient (weighting coefficient) is set according to the position occupied in the matrix window 20 and the product of the data values of the pixels at that position is summed. Such an operation is similar to that performed by the digital filter. The summed value is called a "smooth value". Alternatively, it is possible to add all the data values in the matrix window 20 and divide them by the number of pixels 9 (simple average value) to make the smoothed value of the pixel of interest 21.

The smoothed value obtained as described above is set to 2
The binarizing circuit 5 binarizes. The threshold used at that time is set in advance to a value that is larger than the smooth value of the isolated point and smaller than the smooth value of the image. 2 with such a threshold
When binarized, the pixel of the image portion has a value of “1” and the pixel of the isolated point has a value of “0”. The background portion which is neither an image nor an isolated point naturally has a value of “0”, so at this stage, the isolated point is determined to be an isolated point,
It has been treated the same as the bare skin.

FIG. 5 is a diagram for explaining the operation of the isolated point judging section 6 in the first embodiment. Figure 5 (a),
5B and 5C are diagrams of the original image 22, and FIGS. 5D, 5E, and 5F are diagrams of the isolated point 23. The vertical axis represents the pixel density level, and the horizontal axis represents the pixel distribution. Then, L is a threshold for binarization.

First, the determination operation for the image 22 will be described. FIG. 5A shows the image data input to the smoothing circuit 4. However, if this data is smoothed, the density level will be slightly lowered and the edge portions on both sides will be slightly reduced as shown in FIG. A smoothed smooth image 22A is obtained. It
Binarization is performed by comparing with a threshold value L. FIG. 5C shows the result of binarization. The portion corresponding to the image 22 is "1", and the information that the image exists there is stored.

Next, the determination operation for the isolated point 23 will be described. FIG. 5D shows the isolated point data input to the smoothing circuit 4. Only the density level of a few pixels is projected, and the density level around it is 0 (background). Therefore, if this is smoothed by the matrix window 20 including the pixels around it, the smoothness isolated point 23A in which the density level is greatly lowered and the edge portions on both sides are smooth is obtained as shown in FIG. . It is compared with the threshold L and binarized. FIG. 5F shows the result of binarization. The part corresponding to the isolated point 23 becomes "0",
It is treated the same as the bare skin.

Returning to FIG. 1, the result of binarization is recorded in the binary data page memory 7. That is, at the time of prescan, the CPU 13 instructs the binary data page memory 7 to perform writing. Therefore, 2
In the value data page memory 7, “1” is recorded in the portion corresponding to each pixel of the image 22, and “0” is recorded in the portion corresponding to each pixel of the isolated point 23.

During the main scan, the output of the shading correction circuit 3 is directly input to the superposition circuit 8. On the other hand, from the CPU 13 to the binary data page memory 7
A read command is issued to, and the binary value recorded during the prescan is output. At which position in the binary data page memory 7 the binary data of the pixel is read out.
It is the binary data of the position corresponding to the pixel input from the shading correction circuit 3 to the superposition circuit 8.

In the superposition circuit 8, when the value from the binary data page memory 7 is "1", the input value from the shading correction circuit 3 is output as it is, and when it is "0", the background density level is changed. Output the value. The value of the background (white) density level is held in advance by the superposition circuit 8. Then, in the pixel of the isolated point 23, since the value from the binary data page memory 7 is “0”, the input value from the shading correction circuit 3 is ignored and replaced with the background density level value. Is output. As a result, the isolated point 23 is removed.

The image processing circuit 9 is a known circuit that performs processing such as enlargement processing, reduction processing, or slanting of a font according to an operator's instruction.

(Second Embodiment) FIG. 7 is a diagram showing an image processing apparatus according to the second embodiment. The reference numerals correspond to those in FIG. Reference numeral 14 is a reduction circuit, and 15 is an expansion circuit. The same reference numerals as those in FIG. 1 operate in the same manner as in FIG. 1, and thus the description thereof will be omitted. In this embodiment, even if the isolated point 23 is slightly large, it can be removed. The configuration is different from that of the first embodiment in that a reduction circuit 14 is inserted in the front stage of the isolated point determination unit 6 and an extension circuit that restores the reduced size to the original stage in the rear stage of the binary data page memory 7. This is the point where 15 is inserted.

FIG. 6 is a diagram for explaining the operation of the isolated point judging section in the second embodiment. Reference numerals correspond to those in FIG. 5, 22B is a reduced image, and 23B is a reduced isolated point. First, the image 22 will be described. FIG. 6A shows the data of the image 22 input from the shading correction circuit 3 to the reduction circuit 14, and FIG. 6B shows that the reduction circuit 14 reduces the image size by an appropriately determined magnification. It was done. The width of the reduced image 22B in the horizontal axis direction is narrowed because the image size is reduced.

FIG. 6C shows the reduced image 22B smoothed by the smoothing circuit 4. The smoothed image 22A is shown in FIG.
Is compared with the threshold value L in the binarization circuit 5 and binarized.
The image 22 is saved as "1", although the width has decreased.

Next, the isolated point 23 will be described. Figure 6
(E) is from the shading correction circuit 3 to the reduction circuit 1
It is the data of the isolated point 23 input in 4. Figure 6 (f)
Shows a reduced isolated point 23B obtained by reducing it by the reducing circuit 14, but even if the width of the input isolated point 23 is slightly wide, this reduction makes it narrower.

The smooth isolated point 23A shown in FIG. 6 (g) is the reduced isolated point 23B smoothed by the smoothing circuit 4. However, since it is an isolated point, the density level is greatly lowered and is lower than the threshold value L. Has become. Therefore, when binarized,
All are "0", and are treated the same as the background.

The result of binarization is 2 as in the first embodiment.
It is recorded in the value data page memory 7. At the time of pre-scan, recording up to the binary data page memory 7 is performed.

Although the isolated point 23 in FIG. 6 (e) is somewhat wide, the height (density level) becomes lower than the threshold value L at the stage of reduction processing when the isolated point is narrow. Will end up. That is, it is substantially the same as the smoothing process. Therefore, when the reduction process is performed, most of the isolated points are removed without forcing the smoothing process thereafter. Therefore, the smoothing circuit 4 may not be provided.

During the main scan, the output of the shading correction circuit 3 is directly input to the superposition circuit 8.
On the other hand, the CPU 13 issues a read command to the binary data page memory 7, and the enlargement circuit 15 enlarges the data. Then, the binary value of the portion corresponding to the pixel of the data input from the shading correction circuit 3 to the superposition circuit 8 is converted into the expansion circuit 15
It is further input to the superposition circuit 8. After that, as in the first embodiment, the portion of the isolated point 23 is replaced with the value of the same density level as the background and output, and the image processing circuit 9 performs the required processing.

(Third Embodiment) FIG. 8 shows an image processing apparatus according to the third embodiment. The configuration is different from the second embodiment only in that a threshold value generation circuit 16 is provided. In the second embodiment, the threshold L of the binarization circuit 5 is fixedly given in advance, but in the third embodiment, it is determined by the threshold generation circuit 16 for each pixel of interest. use.

In the threshold generation circuit 16, as shown in FIG. 4, a matrix window 24 of a certain size is set around the pixel of interest 25, and the inverted value of the average value of the density levels of the pixels in the matrix window 24 is set to The target pixel is 2
It is set as a threshold value L when digitizing. The reason for inverting the average value is as follows. In most cases, the surroundings of the isolated point are the background, so if the average value is taken for the window where the isolated point is at the pixel of interest, the value will be small.
On the other hand, when the pixel of interest is an image, the surrounding area is also an image pixel in most cases, so the average value of the window in this case is large.

Therefore, if the average value is inverted (0, 1 representing the average value is inverted to 0 → 1, 1 → 0), the threshold L becomes large when the target pixel is an isolated point, and the target pixel is In the case of an image, the threshold L is small. Then, the isolated point will be lower than the threshold L and the image will be higher than the threshold L.
It serves the purpose of the binarization circuit 5 (detection of isolated points) even better. That is, even when the background density level is higher than that of white (eg, gray), the isolated point can be reliably determined.

Although FIG. 8 shows an example in which the threshold value generating circuit 16 is added to the second embodiment having the reduction circuit 14 and the enlargement circuit 15, the first embodiment not having them is shown. Of course, you can add more.

[0039]

As described above, according to the image processing apparatus of the present invention, the pre-scan and the main scan are performed twice, the pre-scan determines the isolated point, and the main scan removes the isolated point. do. In the present invention, the density level of the pixel of interest is smoothed in consideration of the density levels of the surrounding pixels, so that if the pixel of interest is an isolated point, the density level is greatly reduced. By comparing the smoothed value with the threshold value and binarizing it, the isolated point is determined, so that even an isolated point having a high original density level can be easily determined as an isolated point. .

[Brief description of drawings]

FIG. 1 is a diagram showing an image processing apparatus according to a first embodiment.

FIG. 2 is a diagram showing a configuration of a smoothing circuit.

FIG. 3 Matrix window in smoothing circuit

FIG. 4 is a matrix window for obtaining a threshold value of a threshold value generation circuit.

FIG. 5 is a diagram for explaining the operation of the isolated point determination unit in the first embodiment.

FIG. 6 is a diagram illustrating the operation of an isolated point determination unit according to the second embodiment.

FIG. 7 is a diagram showing an image processing apparatus according to a second embodiment.

FIG. 8 is a diagram showing an image processing apparatus according to a third embodiment.

[Explanation of symbols]

1 ... Image sensor, 2 ... A / D converter, 3 ... Shading correction circuit, 4 ... Smoothing circuit, 5 ... Binarization circuit, 6
... isolated point determination unit, 7 ... binary data page memory, 8 ...
Superimposing circuit, 9 ... Image processing circuit, 10 ... Clock signal line, 11 ... System bus, 12 ... Timing generating circuit, 13 ... CPU, 14 ... Reduction circuit, 15 ... Enlargement circuit,
16 ... Threshold generating circuit, 20 ... Matrix window,
21 ... Target pixel, 22 ... Image, 22A ... Smooth image, 22
B ... reduced image, 23 ... isolated point, 23A ... smooth isolated point, 2
3B: reduced isolated points, 24: matrix window, 2
5: pixel of interest

Front Page Continuation (72) Inventor Atsushi Takahashi 3-7-1, Iwatsuki City, Saitama Prefecture Fuji Xerox Co., Ltd. Iwatsuki Plant (72) Inventor Koji Yorimoto 3-7-1, Iwatsuki City, Saitama Prefecture Fuji Xelox Co., Ltd. Iwatsuki Plant (72) Inventor Takashi Nakajima 3-7-1, Fuchu, Iwatsuki City, Saitama Prefecture Fuji Xerox Co., Ltd. Iwatsuki Plant (72) Inventor, Hiroshi Hayashi 3-7-1, Iwatsuki City, Saitama Prefecture No. Fuji Xerox Co., Ltd. Iwatsuki Office

Claims (4)

[Claims] 1. An image processing apparatus comprising means for removing isolated points from input digital image data, wherein a value obtained by smoothing a matrix window set around a pixel of interest during pre-scan is used as a pixel of the pixel of interest. A smoothing circuit that makes a smooth value, a binarizing circuit that binarizes the smoothing value by comparing it with a predetermined threshold value, a binary data page memory that records the output of the binarizing circuit, and a main scan A superimposing circuit to which image data of a pixel of interest is sometimes input, wherein a binary value corresponding to the pixel of interest in the binary data page memory is read and input, and the binary value is 1 In this case, the image processing apparatus further comprises a superimposing circuit that outputs the image data of the pixel of interest as it is, and outputs white data when the binary value is 0. 2. A reduction circuit that performs a reduction process before inputting input digital image data to a smoothing circuit during a prescan, and a binary value read from a binary data page memory during a main scan is input to an overlay circuit. The image processing apparatus according to claim 1, further comprising: an enlarging circuit that performs an enlarging process for returning the image size reduced by the reducing process to the original size before performing. 3. An image processing apparatus comprising means for removing isolated points from input digital image data, a reduction circuit for reducing the input digital image data during prescanning, and an output from the reduction circuit with a predetermined threshold value. A binary circuit for comparing and binarizing, a binary data page memory for recording the output of the binary circuit, and a binary value read from the binary data page memory at the time of main scan are overlaid. An enlarging circuit for returning the image size reduced by the reducing circuit to the original size before inputting to the aligning circuit, and an overlaying circuit for inputting image data of a pixel of interest at the time of main scan, The binary value corresponding to the target pixel in the page memory is read out and input through the enlargement circuit. When the binary value is 1, the image data of the target pixel is output as it is. An image processing apparatus comprising: a superposition circuit that outputs white data when the binary value is 0. 4. A threshold value generating circuit is provided, which provides an inverted value of an average value of a predetermined matrix window centered on a target pixel as a threshold value when the target pixel is binarized by a binarizing circuit. The image processing apparatus according to claim 1, 2, or 3.