JPH06301574A - Device for detecting fault of electronic control unit - Google Patents

Abstract

PURPOSE:To detect the abnormality in a short time by delaying a monitoring signal to be inputted to a fault judgement means by the prescribed time and detecting the abnormality of the fault judgement means based on the judgement output of the fault judgement means in the delay time. CONSTITUTION:Watch dog pulses of CPU1 and CPU2 are inputted for the input of an AND circuit 3, the delay output by the watch dog pulse counter 1 is inputted for the watch dog pulse from the CPU1, and the OR output is delayed by the watch dog pulse counter 2 to generate a watch dog monitor signal. Therefore, if the monitor signal is turned on inspite of no input of the watch dog pulses of the CPU1 or the CPU2 the output of a AND circuit 5 becomes 'H' and the abnormality is detected. Thus, if the fault judgement output shows the normal judgement output in the delay time, the fault judgement means can be easily judged as being abnormal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a failure detecting device for an electronic control unit using a microcomputer.

[0002]

2. Description of the Related Art Recently, an antilock brake system (ABS) has been increasingly used for the purpose of surely obtaining a braking force of a vehicle according to a road surface condition.

This anti-lock brake system is based on, for example, a wheel speed sensor for detecting the wheel speed of each wheel, a hydraulic actuator, a brake wheel cylinder driven by the hydraulic actuator, and an output signal of the wheel speed sensor. It is composed of an anti-lock brake control unit (ABS electronic control unit) that controls the actuator so that an appropriate braking force can be obtained according to the vehicle speed and the road surface condition.

By the way, the electronic control unit in such an electronic control system must always ensure a normal control operation.

Therefore, conventionally, for example, British Patent No. 156
As shown in No. 9313, the electronic control unit is generally provided with a failure diagnosis device having a failure monitoring circuit.

In the fault diagnosis apparatus, the electronic control unit is provided with a monitor signal generating means for generating a monitor signal (watchdog pulse) having a constant cycle when the control unit such as a watchdog timer is normal. The failure determination of the control unit is made by monitoring the change of the signal.

However, since the failure diagnosing device itself may also exhibit an abnormal state, the failure diagnosing device is further provided with an anomaly detecting device for detecting the anomaly.

In the case of the conventional example, the abnormality detecting device forms a pseudo fail signal indicating an abnormality of the electronic control unit, for example, and inputs the pseudo fail signal to the fail judging circuit of the failure diagnosing device. This is performed by determining whether the determination circuit operates normally.

[0009]

However, in the detection system which forms the pseudo signal indicating the abnormal state as described above,
Inevitably, there is a problem that the configuration of the abnormality detection device itself and its algorithm become considerably complicated and it takes a long time to detect the abnormality.

[0010]

The invention described in each of claims 1 to 6 of the present application has been made for the purpose of solving the above problems, and is configured as follows. .

(1) Structure of the Invention According to Claim 1 The electronic control unit failure detection device of the present invention comprises an electronic control unit including a microcomputer,
Monitoring signal generating means for generating a predetermined monitoring signal at a constant cycle, failure determining means for determining a failure of the electronic control unit based on a change in the monitoring signal supplied from the monitoring signal generating means, and the failure determining means. In the failure detection device of the electronic control unit, which comprises an abnormality detection means for detecting the abnormality of the above, the abnormality detection means outputs the monitoring signal input to the failure determination means for a predetermined time after the control system is powered on. It is characterized in that it has a delay means for delaying, and is configured to detect an abnormality of the failure judgment means from the judgment output of the failure judgment means within the delay time.

(2) Configuration of the Invention According to Claim 2 The electronic control unit failure detection device of the present invention comprises an electronic control unit including a microcomputer,
Monitoring signal generating means for generating a predetermined monitoring signal at a constant cycle, failure determining means for determining a failure of the electronic control unit based on a change in the monitoring signal supplied from the monitoring signal generating means, and the failure determining means. In the failure detection device of the electronic control unit, which comprises an abnormality detection means for detecting the abnormality of the above, the abnormality detection means outputs the monitoring signal input to the failure determination means for a predetermined time after the control system is powered on. It is characterized in that it has delay means for delaying, and is configured to detect an abnormality of the failure judgment means from the judgment output of the failure judgment means after the delay time has elapsed.

(3) Configuration of the Invention According to Claim 3 The electronic control unit failure detection device of the present invention comprises an electronic control unit including a microcomputer,
Monitoring signal generating means for generating a predetermined monitoring signal at a constant cycle, failure determining means for determining a failure of the electronic control unit based on a change in the monitoring signal supplied from the monitoring signal generating means, and the failure determining means. In the failure detection device of the electronic control unit, which comprises an abnormality detection means for detecting the abnormality of the above, the abnormality detection means outputs the monitoring signal input to the failure determination means for a predetermined time after the control system is powered on. It is characterized in that it has delay means for delaying, and is configured to detect an abnormality of the failure judgment means from both judgment outputs of the failure judgment means within the delay time and after the delay time has elapsed.

(4) Structure of the invention according to claim 4 The failure detecting device for an electronic control unit according to the present invention includes a pair of electronic control units each including a microcomputer, and each of the pair of electronic control units. A monitor signal generating means for generating a predetermined monitor signal at a fixed cycle provided, and a failure for judging a failure of each of the pair of electronic control units based on the change of the monitor signal supplied from each monitor signal generating means. The delay means includes a judging means and first and second delay means for delaying the monitoring signals from the monitoring signal generating means, which are inputted to the failure judging means after the power is supplied to the system, by a predetermined time respectively. A failure detecting device for an electronic control unit, comprising: an abnormality detecting means for detecting an abnormality of the failure determining means from a determination output of the failure determining means within a time period. , The second delay means is
They are connected to each other in series, first the delay means delays the monitor signal from the monitor signal generating means of the one side electronic control unit, and then the second delay means delays the monitor signal of the other side electronic control unit. It is characterized in that the monitoring signal from the generating means is delayed.

(5) Configuration of the Invention According to Claim 5 The failure detecting device for an electronic control unit according to the present invention includes a pair of electronic control units including a microcomputer, and each of the pair of electronic control units. A monitor signal generating means for generating a predetermined monitor signal at a fixed cycle provided, and a failure for judging a failure of each of the pair of electronic control units based on the change of the monitor signal supplied from each monitor signal generating means. The delay means includes a judging means and first and second delay means for delaying the monitoring signals from the monitoring signal generating means, which are inputted to the failure judging means after the power is supplied to the system, by a predetermined time respectively. A failure detection device for an electronic control unit, comprising: an abnormality detection means for detecting an abnormality of the failure determination means from a determination output of the failure determination means within a time period. The two delay means are connected in parallel with each other and are configured to delay the monitor signals from the monitor signal generating means of the corresponding electronic control units.

(6) Structure of the invention according to claim 6 The failure detecting device for an electronic control unit according to the invention is based on the structure of the invention according to claim 1, 2, 3, 4, 5 or 6 above.
The electronic control unit having the same configuration is characterized by being a vehicle anti-lock brake control unit.

[0017]

The invention according to each of claims 1 to 6 of the present application has the following actions corresponding to the above-mentioned constitution.

(1) Operation of the invention according to claim 1 In the failure detection device for an electronic control unit according to the present invention, as described above, the electronic control unit including the microcomputer and the predetermined monitoring at a constant period are performed. Monitoring signal generating means for generating a signal, failure determining means for determining a failure of the electronic control unit based on a change in the monitoring signal supplied from the monitoring signal generating means, and an abnormality for detecting an abnormality of the failure determining means In the failure detection device for an electronic control unit, which comprises a detection means, the abnormality detection means has a delay means for delaying a monitoring signal input to the failure determination means for a predetermined time after the control system is powered on. Then, the abnormality of the failure determination output means is detected from the determination output of the failure determination means within the delay time.

Therefore, for example, in the case where the failure determination output indicates the normal determination output state even though the monitor signal is not normally output within the delay time, the failure determination means is abnormal. Then, it can be detected very easily.

In addition, the abnormality detection is promptly performed within an extremely short time period from the beginning of control within a predetermined time after the power supply to the control system is turned on.

(2) Operation of the invention according to claim 2 In the failure detecting device for an electronic control unit according to the present invention, an electronic control unit including a microcomputer and a monitor for generating a predetermined monitor signal at a constant cycle. A signal generating means, a failure determining means for determining a failure of the electronic control unit based on a change in the monitoring signal supplied from the monitoring signal generating means, and an abnormality detecting means for detecting an abnormality of the failure determining means. In the failure detection device for an electronic control unit, the abnormality detection means has a delay means for delaying a monitoring signal input to the failure determination means by a predetermined time after the power supply to the control system is turned on. The abnormality of the failure determination means is detected from the determination output of the failure determination means after the elapse.

Therefore, for example, when the failure determination output indicates the abnormality determination output state after the predetermined time has elapsed and the monitor signal is normally output normally, the failure determination means is Abnormality can be detected very easily.

In addition, the abnormality detection is promptly performed within an extremely short period of time at the beginning of control after a lapse of a predetermined time after the power supply to the control system is turned on.

(3) Operation of the invention according to claim 3 In the failure detecting device for an electronic control unit of the present invention, an electronic control unit including a microcomputer and a monitor for generating a predetermined monitoring signal at a constant cycle. A signal generating means, a failure determining means for determining a failure of the electronic control unit based on a change in the monitoring signal supplied from the monitoring signal generating means, and an abnormality detecting means for detecting an abnormality of the failure determining means. In the failure detection device for an electronic control unit, the abnormality detection means has a delay means for delaying a monitoring signal input to the failure determination means by a predetermined time after the power supply to the control system is turned on. The abnormality of the failure determination means is detected from both the determination outputs of the failure determination means inside and after the delay time has elapsed.

Therefore, for example, even if the monitoring signal is not normally output around the above predetermined time, the failure determination output indicates a normal determination output state, or conversely, the output is normally output. Regardless of the case where the abnormality determination is shown, it is extremely easy to detect that the failure determination means itself is abnormal.

Moreover, the abnormality detection is promptly performed within an extremely short time at the beginning of the control start, which is about a predetermined time after the power supply to the control system is turned on.

(4) Operation of the invention according to claim 4 In the failure detecting device for an electronic control unit of the present invention, a pair of electronic control units including a microcomputer and each of the pair of electronic control units are provided. A monitor signal generating means for generating a predetermined monitor signal at a fixed cycle provided, and a failure for judging a failure of each of the pair of electronic control units based on the change of the monitor signal supplied from each monitor signal generating means. The delay means includes a judging means and first and second delay means for delaying the monitoring signals from the monitoring signal generating means, which are inputted to the failure judging means after the power is supplied to the system, by a predetermined time respectively. A failure detection device for an electronic control unit, comprising: an abnormality detection means for detecting an abnormality of the failure determination means based on a determination output of the failure determination means within a time period. The first and second delay means are
They are connected to each other in series, first the delay means delays the monitor signal from the monitor signal generating means of the one side electronic control unit, and then the second delay means delays the monitor signal of the other side electronic control unit. The monitoring signal from the generating means is delayed.

Therefore, for example, for each of the two sets of electronic control units, the failure determination output indicates a normal determination output state even though the monitoring signal is not normally output before and after the predetermined time, and vice versa. In such a case, it can be extremely easily detected that the failure determination means is abnormal.

In addition, the abnormality detection is promptly performed within a very short time at the beginning of the control start, which is about a predetermined time after the power supply to the control system is turned on.

(5) Operation of the invention according to claim 5 In the failure detecting device for an electronic control unit of the present invention, a pair of electronic control units including a microcomputer and each of the pair of electronic control units are provided. A monitor signal generating means for generating a predetermined monitor signal at a fixed cycle provided, and a failure for judging a failure of each of the pair of electronic control units based on the change of the monitor signal supplied from each monitor signal generating means. The delay means includes a judging means and first and second delay means for delaying the monitoring signals from the monitoring signal generating means, which are inputted to the failure judging means after the power is supplied to the system, by a predetermined time respectively. A failure detection device for an electronic control unit, comprising: an abnormality detection means for detecting an abnormality of the failure determination means based on a determination output of the failure determination means within a time period. The second delay means are connected in parallel to each other and delay the monitor signal from the monitor signal generating means of the corresponding electronic control unit.

Therefore, for example, for each of the two sets of electronic control units, the failure determination output indicates the normal determination output state even though the monitoring signal is not normally output before and after the predetermined time, and vice versa. In such a case, it can be very easily detected that the failure determination means is abnormal.

Moreover, the abnormality detection is promptly performed in an extremely short time at the beginning of control, which is about a predetermined time after the power supply to the control system is turned on.

(6) Operation of the invention according to claim 6 In the failure detecting device for an electronic control unit according to the invention, the structure of the invention according to claim 1, 2, 3, 4, 5 or 6 is premised. The electronic control unit in the configuration is composed of a vehicle antilock brake control unit.

Therefore, in the vehicle anti-lock brake control unit, it is possible to obtain exactly the same actions as the inventions of the above-mentioned claims 1, 2, 3, 4, and 5.

[0035]

As a result of the above, according to the failure detecting device for an electronic control unit of the present invention, it is possible to interlock with the initial operation when the power is turned on, without the need to intentionally form a pseudo signal indicating an abnormal state as in the conventional case. It is possible to detect an abnormality in the failure determination means in an extremely short time and simplify the algorithm.

[0036]

【Example】

(1) First Embodiment This embodiment is configured by applying the present invention to, for example, a failure detection system of an ABS electronic control unit for controlling an anti-lock brake of an automobile.

1 to 6 show the first embodiment of the present invention.
Failure detection (diagnosis) of the ABS electronic control unit according to the embodiment
3 shows the configuration and operation of the device.

First, FIG. 1 shows a vehicle ABS equipped with the same device.
It shows the overall configuration of the system. The ABS system comprises a first ABS electronic control unit CPU ₁ and a second ABS electronic control unit CP as shown, for example.
U ₂ 2 pairs of which is configured with an ABS electronic control unit and they speed based on the output of the wheel speed sensor 9 in the same manner, ABS actuator according to road conditions
The pressure increasing / decreasing solenoid 19 for (hydraulic control actuator for each wheel cylinder) is energized or de-energized.

First and second ABS electronic control unit CP
The U ₁ and the CPU ₂ are composed of a microcomputer, and each is supplied with an operating power of, for example, 5 (V) from the constant voltage power supply circuit 20. Then, in the input interface circuit section, a wheel speed detection signal S ₁ from the wheel speed sensor 9 and a fail safe relay described later are provided.
(Hereinafter abbreviated as F / S relay) 7 ON / OFF state monitor signal S ₂ ((e) of FIG. 3 and (e) of FIG. 4), F / S
The relay drive monitor signal (watchdog monitor signal: (d) of FIG. 3 and FIG. 4 (d)) S ₃ is input.

Further, from the output interface circuit section thereof, pressure increasing / decreasing solenoid drive signals S ₄ and S ₄ for driving the pressure increasing / decreasing solenoid 19 respectively, and a watch from a watchdog pulse generating circuit (watchdog timer) not shown. Dog pulse (abnormality monitoring signal) S ₅ , S ₅ (Fig. 3)
(b) and (b) of FIG. 4, F / S relay ON / OFF signal S
₆ , S ₆ ((c) in FIG. 3 and (c) in FIG. 4 are respectively output.

Both ABS electronic control units CPU ₁ , CPU
_The pressure increasing / decreasing solenoid drive signals S ₄ and S _{4 from 2} are respectively the fourth
Is input to the AND circuit 17. Fourth AND circuit 17
Is connected to the base portion of the pressure increasing / decreasing solenoid drive transistor 18 inserted on the ground side of the pressure increasing / decreasing solenoid 19, and is connected to the first and second AB terminals.
S electronic control unit CPU _1, 2 pairs of pressure increase and decrease the driving signal S _4, S ₄ of the AND output S ₄ ON the same decrease pressure solenoid driving transistor 18 by 'from CPU _2, so that the turned OFF. The pressure increasing / decreasing solenoid 19 is the above-mentioned F / S.
It is connected to the vehicle-mounted power source E via the relay contact 7a of the relay 7, and the relay contact 7a of the F / S relay 7 is turned on.
In this state, power is supplied only when the pressure increasing / decreasing solenoid driving transistor 18 is turned on to control the pressure reducing operation of the ABS actuator.

The F / S relay 7 is composed of the relay contact 7a and a relay coil 7b for turning the relay contact 7a on and off.
Driven by ON operation of / S relay drive transistor 6
It is designed to be energized. On the other hand, the F / S relay drive transistor 6 has an F / S relay drive signal S ₅ (watchdog monitor signal: (d) of FIG. 3) from the failure detection circuit 10 as shown in detail in FIG. ON / OFF control is performed according to (d) of FIG.

That is, in FIG. 2, reference numeral T ₁ is the F / S relay drive signal monitor terminal (watchdog monitor terminal) on the side of the first ABS electronic control unit CPU ₁ , T ₂
Is also the first watchdog pulse input terminal to which the first watchdog pulse from the first ABS electronic control unit CPU ₁ side watchdog pulse generation circuit (watchdog timer) is input, and T ₃ is also the first watchdog pulse input terminal. AB
F / S relay ON from S electronic control unit CPU ₁ /
OFF signal input terminal, T ₄ is a second watchdog pulse input terminal to which the second watchdog pulse from the second ABS electronic control unit CPU ₂ side watchdog pulse generation circuit (watchdog timer) is input, T 4 _Five
The same second ABS electronic control unit F / S relay ON / OFF signal input terminal, T ₆ is also a second ABS electronic control unit CPU ₂ side F / S relay drive signal monitor terminal (watchdog from CPU ₂ Monitor terminal).

Next, reference numeral 1 indicates the operation / operation of the microcomputer of the control unit after the ignition switch IGSW is turned on, as shown in FIG. 3 or 4.
The watchdog pulse S ₅ input through the first watchdog pulse input terminal T ₂ when the time t ₁ until the output is guaranteed elapses (see FIG. 3 or FIG. 4B).
When a predetermined number of times (3 pulses) is counted, for example, in FIG.
(d), a first watchdog pulse counter as a watchdog signal delay means for generating an H output as shown in FIG. 4 (d), 2 is also a watchdog signal delay means for a predetermined pulse (3 pulses) A second watchdog pulse counter 3, 3 is a first AND circuit that ANDs the output of the first watchdog pulse counter 1 and a second watchdog pulse, and 4 is the first and second ABS
A second AND circuit 5 that takes the logical product of the F / S relay ON / OFF signals from the electronic control units CPU ₁ and CPU _2.
Is a third AN that takes the logical product of the output of the second watchdog pulse counter 2 and the output of the second AND circuit 4.
It is a D circuit.

Then, the above-mentioned respective parts are connected to each other as shown in the figure to constitute the failure detecting apparatus of this embodiment.

First, in the circuit of FIG. 1, when the ignition switch IGSW is turned on, the first and second watchdog pulse generating circuits of the first and second ABS electronic control units CPU ₁ and CPU ₂ respectively corresponding to the first and _second watchdog pulse generating circuits. The second watchdog pulse input terminals T ₂ and T ₄ are respectively connected to FIG.
(b), The first and second watchdog pulses (S ₅ , S ₅ ) having a predetermined period as shown in FIG. 4B are input at the time point t _{1 has} elapsed as described above. As a result, the first and second watchdog pulses are supplied to the first watchdog pulse counter 1 and the second AND circuit 4, respectively. At the same time as this, the first and second F
The ON / OFF signals of the F / S relay shown in FIGS. 3 (c) and 4 (c) are input to the / S relay ON / OFF signal input terminals T ₃ and T ₅ , respectively. The ON / OFF signal of this F / S relay is
As shown in FIG. 3 (c) and FIG. 4 (c), H (high) in the ON state,
It is an L (low) signal in the OFF state.

The first watchdog pulse counter 1 has a function of delaying the inputted first watchdog pulse signal of the first ABS electronic control unit CPU ₁ side by a predetermined time t ₂ as described above. , H after the watchdog pulse of FIG. 3 (b) and FIG. 4 (b) input as described above is counted by a predetermined number (3 pulses) as shown in the figure.
A high output is generated, and the H (high) output delayed by t ₂ from the start of the supply of the first watchdog pulse supplied from the first ABS electronic control unit CPU ₁ ((c) in FIG. 3).
Alternatively, (c) of FIG. 4 is formed.

The count output is supplied and input to the other input terminal of the first AND circuit 3 with respect to the terminal to which the second watchdog pulse is input.

Then, the first AND circuit 3 includes the second watchdog pulse on the second ABS electronic control unit CPU ₂ side supplied from the second watchdog pulse input terminal T ₄ and the first watchdog pulse. Takes a logical product with the output of the watchdog pulse counter 1 and both inputs are H (high)
At the time of the level, a pulse signal of H output is generated and input to the second watchdog pulse counter 2.

Second watchdog pulse counter 2
Is the H (high) level when the logical product output pulse of the first AND circuit 3 is input and it is counted by a predetermined number (3 pulses) like the first watchdog pulse counter 1.
An output is generated and supplied to one input terminal of the third AND circuit 5 and input. As a result, the output state of the second watchdog pulse is also delayed by the three pulse period.

On the other hand, the second AND circuit 4 has the F / S relay ON / OFF signal (FIGS. 3 (c) and 4 (c)) from the _first ABS electronic control unit CPU _{1 as} described above. AND the F / S relay ON / OFF signal (FIG. 3 (c), FIG. 4 (c)) from the _second ABS electronic control unit CPU ₂ and both signals are H (high) output. At the same time, an H (high) output is generated and supplied to the other input terminal of the third AND circuit 5 as a synchronizing signal.

The third AND circuit 5 calculates the logical product of both inputs, and both inputs are H (high) within the delay period t _{2 as} shown in (c) and (d) of FIG. An H (high) output is generated at the time of input (when the watchdog monitor is fixed to ON) and is supplied to the F / S relay drive signal monitor terminals T ₁ and T ₆ and the F / S relay drive transistor 6 is supplied. Turn it on. As a result, the abnormality of the watchdog monitor circuit is determined, the relay coil 7b of the F / S relay 7 is energized, and the corresponding relay contact 7a is turned off.
Then, the solenoid valve 19 of the ABS actuator becomes unable to be energized (fail safe).

As described above, in the configuration of the failure detection device for the ABS electronic control unit of this embodiment, first the first AND
As the logical product input of the circuit 3, both the first and second AB
The S electronic control unit CPU ₁ and CPU ₂ are supplied with respective watchdog pulses, and the first ABS
Regarding the watchdog pulse from the electronic control unit CPU ₁ , the delay output by the first watchdog pulse counter 1 is input, and further the logical product output is delayed by the second watchdog pulse counter 2 and then A watchdog monitor signal is formed. Therefore, the ABS electronic control unit (CPU ₁ or C
If there is no input of the watchdog pulse of PU ₂ ) but the monitor signal is fixed to ON, the third AN
The output of the D circuit 3 becomes an H (high) output and an abnormality is detected.

Therefore, in this configuration, for example, in the case where the failure determination output indicates the normal determination output state even though the monitor signal is not normally output within the delay time, the failure is detected. If the determination means is abnormal, it can be detected very easily.

Moreover, the abnormality detection is promptly performed within an extremely short period of time from the start of control within a predetermined period after the power supply to the control system is turned on.

Further, in this configuration, for example, in the case where the failure determination output indicates the abnormality determination output state after the predetermined delay time has passed and the monitor signal is normally output normally. Also, if the failure determination means is abnormal, it can be detected very easily.

In addition, the abnormality detection is promptly performed within an extremely short time at the beginning of control after the lapse of the predetermined time after the power supply to the control system is turned on.

As a result, according to this ABS electronic control unit failure detection device, it is possible to operate in a very short time in conjunction with the initial operation when the power is turned ON, without the need to intentionally form a pseudo signal indicating an abnormal state as in the conventional case. It becomes possible to detect an abnormality in the failure determination means, and the algorithm can be simplified.

The first and second watchdog pulse counters 1 and 2 in the above embodiments may be constituted by first and second integration filter circuits formed by, for example, resistors and capacitors.

In this case, each of the first and second integration filter circuits has a predetermined pulse number N as shown in FIG. 6, for example.
Integration time similar to the time required for counting t ₂ (see Fig. 5)
t ₂ is set as a threshold (time constant CR), and the threshold t ₂
If H (high) output is generated when (CR) is exceeded, the same delay action as described above can be realized.

(2) Second Embodiment Next, FIG. 7 shows the structure of a failure detection device for an ABS electronic control unit according to a second embodiment of the present invention.

In this embodiment, first, both the first and second A
The respective watchdog pulse outputs of the BS electronic control units CPU ₁ and CPU ₂ are respectively supplied to the first and second pulse counters (or integration filter circuits) 2 similar to those of the above-mentioned first embodiment.
The first AND circuit 23 after delaying via 1, 22
To the third AND circuit 25 similar to that of the first embodiment, and the second A is input to the third AND circuit 25.
It is input together with the logical product output of the ND circuit 24. Second A
The ND circuit 24 is the same as in the case of the first embodiment, and the first and second ABS electronic control units CPU ₁ and CPU _{2 are provided.}
Outputs a logical product signal of the F / S relay ON / OFF monitor signals from.

The third AND circuit 25 has the first and second AND circuits 23 and 24 as in the first embodiment.
AND of the outputs of the F / S relays, and the output of the logical product of
(Watchdog monitor signal) and F /
The S relay drive transistor 26 is driven (the drive transistor is turned on or off).

That is, in this configuration, as the logical product input of the first AND circuit 23, the first and second watchdog pulses of the first and second ABS electronic control units CPU ₁ and CPU ₂ are used. The delay outputs from the counters 21 and 22 are input, and if the watchdog monitor circuit is fixed to be ON, the output of the third AND circuit 25 is always H (high) output even within the delay period. Therefore, it is possible to obtain the same effect as that of the first embodiment.

(3) Third Embodiment Next, FIG. 8 shows the structure of a failure detection device for an ABS electronic control unit according to a third embodiment of the present invention.

In this embodiment, first, both the first and second A
The watchdog pulse outputs of the BS electronic control units CPU ₁ and CPU ₂ are respectively passed through the first and second pulse counters (or integration filter circuits) 21 and 22 similar to those of the first and second embodiments. And then delay the first and second
F from both ABS electronic control units CPU ₁ and CPU ₂
The / S relay is input to the AND circuit 13 together with the ON / OFF signal.

Then, the third AND circuit 25 takes the logical product of the outputs of these four sets, and outputs the logical product of the above-mentioned first and second outputs.
As in the case of the second embodiment, the watchdog monitor signal is formed and the F / S relay driving transistor 16 is formed.
Is turned on or off.

In other words, in this configuration, the AND gate 13 inputs the AND signal to the first and second pulse counters 11 and 12 of the watchdog pulses of the first and second ABS electronic control units CPU ₁ and CPU ₂ , respectively. The delayed output via 12 and the ON / OFF signal of the F / S relay are also input, and the watchdog monitor circuit is turned on.
If it is fixed, the output of the AND circuit 13 is always H (high) output even within the above delay period. That is, each ABS
Electronic control unit CPU ₁ , CPU ₂ F / S relay O
If the N, OFF monitor signal is H (high) output, AND
The logical product output of the circuit 13 is always H (high), indicating that there is an abnormality.

As a result, the drive transistor of the F / S relay is turned on and the F / S relay is turned off (fail safe).

[Brief description of drawings]

FIG. 1 is a logic circuit diagram showing a configuration of a failure detection device for an ABS electronic control unit according to a first embodiment of the present invention.

FIG. 2 is a logic circuit diagram showing a configuration of a main part of the device.

FIG. 3 is a time chart showing a circuit operation during normal operation of the device.

FIG. 4 is a time chart showing a circuit operation when an abnormality is detected in the device.

FIG. 5 is an operation characteristic diagram showing a delay operation of the first and second watchdog pulse counters of the same device.

FIG. 6 is an operation characteristic diagram showing a delay operation of the integration filter circuit in place of the watchdog pulse counter of the device.

FIG. 7 is a logic circuit diagram showing a configuration of a main part of a failure detection device for an ABS electronic control unit according to a second embodiment of the present invention.

FIG. 8 is a logic circuit diagram showing a configuration of a main part of a failure detection device for an ABS electronic control unit according to a third embodiment of the present invention.

[Explanation of symbols]

1 is a first watchdog pulse counter, 2 is a second watchdog pulse counter, 3 is a first AND circuit, 4 is a second AND circuit, 5 is a third AND circuit, 6
Is an F / S relay drive transistor, 7 is an F / S relay,
9 is a wheel speed sensor, 11 is a first watchdog pulse counter, 12 is a second watchdog pulse counter, 13 is a first AND circuit, 14 is a second AND circuit, 15 is a third AND circuit, Reference numeral 21 is a first watchdog pulse counter, 22 is a second watchdog pulse counter, 23 is a first AND circuit, and 24 is a second A circuit.
An ND circuit, 25 is a third AND circuit.

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Seiji Miyamoto 3-1, Shinchi, Fuchu-cho, Aki-gun, Hiroshima Prefecture Mazda Motor Corporation

Claims (6)

[Claims] 1. An electronic control unit comprising a microcomputer, a monitor signal generating means for generating a predetermined monitor signal at a constant cycle, and a change of the monitor signal supplied from the monitor signal generating means. A failure detection device for an electronic control unit, comprising: failure determination means for determining a failure of the electronic control unit; and abnormality detection means for detecting an abnormality in the failure determination means, wherein the abnormality detection means After the power supply to the system is turned on, there is a delay means for delaying the monitoring signal input to the failure judgment means for a predetermined time, and an abnormality of the failure judgment means is detected from the judgment output of the failure judgment means within the delay time. A failure detection device for an electronic control unit, which is configured as described above. 2. An electronic control unit comprising a microcomputer, a monitor signal generating means for generating a predetermined monitor signal at a constant cycle, and a change of the monitor signal supplied from the monitor signal generating means. A failure detection device for an electronic control unit, comprising: failure determination means for determining a failure of the electronic control unit; and abnormality detection means for detecting an abnormality in the failure determination means, wherein the abnormality detection means After the power supply to the system is turned on, there is a delay means for delaying the monitoring signal inputted to the failure judgment means for a predetermined time, and an abnormality of the failure judgment means is detected from the judgment output of the failure judgment means after the delay time has elapsed. A failure detection device for an electronic control unit, which is configured to: 3. An electronic control unit comprising a microcomputer, a monitor signal generating means for generating a predetermined monitor signal at a constant cycle, and a change of the monitor signal supplied from the monitor signal generating means. A failure detection device for an electronic control unit, comprising: failure determination means for determining a failure of the electronic control unit; and abnormality detection means for detecting an abnormality in the failure determination means, wherein the abnormality detection means After the power supply to the system is turned on, there is a delay means for delaying the monitoring signal inputted to the failure judgment means by a predetermined time, and the failure is judged from both judgment outputs of the failure judgment means within the delay time and after the delay time has elapsed. A failure detection device for an electronic control unit, which is configured to detect an abnormality of a determination means. 4. A pair of electronic control units including a microcomputer, monitoring signal generating means for generating a predetermined monitoring signal at a constant period provided in each of the pair of electronic control units, and each of the electronic control units. Failure determination means for determining a failure of each of the pair of electronic control units based on a change in the monitoring signal supplied from the monitoring signal generation means, and the above-described failure input means after the system is powered on. An abnormality that has first and second delay means for delaying the monitor signal from each monitor signal generating means by a predetermined time, and detects an abnormality of the failure determination means from the determination output of the failure determination means within the delay time. A failure detection device for an electronic control unit, comprising: a detection means, the first and second
Are connected in series to each other, and first the delay means delays the monitor signal from the monitor signal generating means of the electronic control unit on one side, and then the second delay means controls the electronic signal on the other side. A failure detection device for an electronic control unit, which is configured to delay a monitoring signal from a monitoring signal generating means of the control unit. 5. A pair of electronic control units including a microcomputer, a monitoring signal generating means for generating a predetermined monitoring signal at a constant cycle, which is provided in each of the pair of electronic control units, and each of the electronic control units. Failure determination means for determining a failure of each of the pair of electronic control units based on a change in the monitoring signal supplied from the monitoring signal generation means, and the above-described failure input means after the system is powered on. An abnormality that has first and second delay means for delaying the monitor signal from each monitor signal generating means by a predetermined time, and detects an abnormality of the failure determination means from the determination output of the failure determination means within the delay time. A failure detection device for an electronic control unit, comprising: a detection means, the first and second
2. The failure detection device for an electronic control unit, wherein the delay means are connected in parallel with each other and are configured to delay the monitoring signals from the monitoring signal generating means of the corresponding electronic control units. 6. The failure detection device for an electronic control unit according to claim 1, 2, 3, 4, 5, or 6, wherein the electronic control unit is a vehicle antilock brake control unit.