JPH0629956A - Error correction code insert processing system in sdh signal and optical transmitter - Google Patents

Abstract

PURPOSE:To provide an error correction function to an SDH signal in the concatenation mode by applying error correction arithmetic operation to data of each string of pay load so as to generate an error correction code thereby inserting the code to a stuff field of a succeeding string. CONSTITUTION:A generating means 3 applies error correction arithmetic operation to data of each string of pay load to generate an error correction code and an insert means 4 inserts the error correction code to, e.g. a stuff field of a succeeding string. A section overhead SOH insert means 5 inserts control information to generate an SOH frame. The generating means 3 applies parallel error correction arithmetic operation to data of plural strings of pay load to generate an error correction code, then the insert means 4 inserts the plural error correction codes to a relevant stuff field in parallel. Thus, the error correction code is inserted to an SDH signal in the concatenation mode in compliance with the Modified G.709.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for inserting an error correction code into an SDH signal in a concatenation mode conforming to modified G 709 established by the International Telegraph and Telephone Consultative Committee (CCITT). Further, the present invention relates to an optical transmission device adopting the method.

[0002]

2. Description of the Related Art At present, development and improvement of various long-distance optical transmission devices (onshore / submarine, IM-DD / coherent) for 2.4G and 10G frequencies are eagerly planned. However, chirping of the transmission light source, phase noise, etc., chromatic dispersion of the optical transmission line, nonlinear effects (self-phase modulation, stimulated Brillouin scattering, etc.), or code error rate due to S / N saturation when using an optical amplifier There are problems such as floors (a phenomenon in which the error rate does not decrease below a certain level even when the optical input increases at high speed).

Various solutions to these problems have been considered, and the following method is considered as a solution in the electric circuit on the receiving side. Intersymbol interference is constantly reduced by waveform equalization technology using a transversal filter, etc., and an analog circuit is used to prevent identification errors even if some noise or distortion occurs in the equalized waveform.

A method of improving a code error rate in a digital circuit by using an error correction code for a transmission line signal.

On the other hand, the International Telegraph and Telephone Advisory Committee (CCIT
The SDH signal in the concatenation mode conforming to modified G 709 proposed by T) has a frame structure as shown in FIG.

That is, a section over head (SOH) and a path over head (POH) in which supervisory control system information is stored, a stuff area in which waste (stuff) bits are stored, and user data are stored. It consists of a stored 9-column payload.

[0007]

In such an SDH signal, although the frame structure is specified as described above, the error correction code has not been specified so far. Therefore, even if an error occurs during transmission of user data, it cannot be detected or corrected, and the reliability of data transmission cannot be maintained.

Therefore, the present invention has been made in view of the above, and is a method for adding an error correction function to a concatenation mode SDH signal proposed by CCITT in order to realize the above method. Is provided.

Specifically, it is an object of the present invention to provide an error correction code insertion processing method for an SDH signal, which enables an error correction code to be inserted into a modified G 709 compliant concatenation mode SDH signal. Furthermore,
It is an object of the present invention to provide a novel optical transmission device adopting such an error correction code insertion processing method.

[0010]

FIG. 1 is a block diagram of the principle configuration of the present invention. In the figure, reference numeral 1 is an SDH signal generator according to the error correction code insertion processing method of the present invention.

This SDH signal generator 1 includes a POH frame inserting means 2, a generating means 3, an inserting means 4, and an SO.
H frame insertion means 5 is provided. This POH frame inserting means 2 generates a POH frame by inserting control information.

The generation means 3 generates an error correction code by performing an error correction operation on the data of each column of the payload. The inserting unit 4 inserts the error correction code generated by the generating unit 3 into the stuff area of the next column, for example.

The SOH frame inserting means 5 inserts control information to generate an SOH frame. Here, the generation unit 3 may generate an error correction code by performing an error correction operation on the data of a plurality of columns of the payload in parallel, and at this time, the insertion unit 4 may generate the error correction code. The error correction code of is inserted into the corresponding stuff area in parallel.

Further, it is also possible to adopt a configuration in which the stuff areas are distributed and arranged in each column of the payload, and when this configuration is adopted, the generating means 3 is for the data of the payload divided by the stuff areas of the distributed allocation. An error correction code is generated by performing an error correction operation. The insertion means 4 is
The generated error correction code is inserted into the stuff area corresponding to the distributed arrangement.

[0015]

In the present invention, when the payload data is given, the generating means 3 generates an error correction code by performing an error correction operation on the data of each column of the payload. In response to this generation result, the inserting unit 4 inserts the error correction code generated by the generating unit 3 into the stuff area of the next column, for example.

Thus, according to the present invention, modified G
The error correction code can be inserted into the SDH signal in the concatenation mode conforming to 709. As a result, the data transmission process using the SDH signal can be executed with high accuracy.

By using payload data as the object of error correction code generation, error monitoring of only user data can be realized, and even if SOH or POH is rewritten, it is not affected.

[0018]

Embodiments of the present invention will be described below with reference to the drawings. In each of the following drawings, the same or similar parts are designated by the same reference numerals and symbols.

FIG. 2 is a block diagram of an optical transmission device adopting the method of the present invention. In the figure, 10 is a transmitter and 20 is a receiver. Between these transmitter 10 and receiver 20,
It is connected by an optical transmission line.

The POH frame insertion circuit 11, the generator polynomial operation circuit 12, the selector circuit 13 and the SOH frame insertion circuit 14 in the transmitter 10 are respectively the POH frame insertion means 2, the generation means 3 and the insertion means 4 of the principle diagram of FIG. And a circuit having a function corresponding to the SOH frame inserting means 5.

Therefore, the POH frame insertion circuit 11, the generator polynomial operation circuit 12, the selector circuit 13 and the SOH frame insertion circuit 14 constitute the SDH signal generation device 1. The POH frame insertion circuit 11 inserts control information to generate a POH frame.

The generator polynomial calculation circuit 12 performs a generator polynomial calculation on the data of each column of the payload to generate a remainder polynomial. The selector circuit 13 inserts the remainder polynomial generated by the generator polynomial operation circuit 12 into the stuff area of the next column while flowing the payload data with the POH frame added.

The SOH frame insertion circuit 14 inserts control information into the output of the selector circuit 13 to generate an SOH frame. Further, the transmitter 10 includes an optical transmission circuit 15 that converts the SDH signal output from the SOH frame insertion circuit 14 into an optical signal and transmits the optical signal.

The receiver 20 has an optical receiving circuit 21 for receiving the SDH signal of the optical signal transmitted from the transmitter 10 and converting it into an electric signal. Furthermore, the following circuits corresponding to the SDH signal generation device 1 on the transmission side are provided.

The SOH frame extraction circuit 22 extracts control information from the SOH frame of the received SDH signal. The POH frame extraction circuit 23 receives the received SDH
Extract control information from the POH frame of the signal.

Further, the generator polynomial arithmetic circuit 24 converts the data of each column of the payload of the received SDH signal into the transmitter 1
A syndrome polynomial is generated by performing the same generator polynomial operation as 0.

The syndrome polynomial generated by the generator polynomial arithmetic circuit 24 is subjected to syndrome arithmetic (decoding arithmetic) in the syndrome arithmetic circuit 25.
Then, the error correction circuit 26 executes error correction processing of the payload data of the SDH signal received according to the calculation result of the syndrome calculation circuit 25.

When the optical communication apparatus as in the embodiment of FIG. 2 is followed, the user assigned to the payload of the SDH signal
The Hamming code is suitable as the code of the data. This is because when the Hamming code is used, single error correction and double error detection can be performed, and random error correction that occurs in optical communication can be realized with a simple hardware configuration.

Conditions for using the Hamming code will be described. That is, in the case of the (n, k) Hamming code, the following conditions must be satisfied. 2 ^(nK) ≧ n + 1 where n is the block length, k is the data length, and (n−k) is the number of check bits.

In the case of SDH signal, as shown in FIG.
Since k is (260 × 16 × 8) = 33280 bits, check
The number of bits requires 16 bits (2 ¹⁶ = 65536). Therefore, n = 33296. Here, the block length n is
Since the number of patterns that can be detected by the check bits is smaller than 2 ¹⁶ -1, the code used is a shortened Hamming code.

From the above, the Hamming code used is a shortened (33296, 33280) Hamming code. Since the number of check bits is 16 bits, the generator polynomial g _(X) for finding the remainder is g _(X) = X ¹⁶ + X ¹⁵ + X ² + 1 = (X + 1) * (X ¹⁵ + X + 1).

The calculation of the generator polynomial g _(X) for obtaining the remainder is executed in the generator polynomial arithmetic circuit 12 / generator polynomial arithmetic circuit 24 shown in FIG. The specific circuit configuration for that purpose is as shown in FIG. The circuit of FIG.
It is composed of a 6-stage shift register.

As shown in FIG. 2, the transmitter 10 according to the present invention transmits one row of payload data without processing it, while generating the polynomial arithmetic circuit 12 for the data.
The 16-bit remainder polynomial obtained by completing the calculation of one column of payload data is inserted into the stuff area of the next column. As a result, the error correction code is inserted in SDH communication.

That is, as shown in FIG. 4, processing is performed so that the error correction code of the remainder polynomial obtained by the generator polynomial arithmetic circuit 12 is inserted into the stuff area of the next column of the payload data of one column.

The code polynomial f (x) of one block transmitted from the transmitter 10 is represented by f (x) = X ^(nk) * p _(x) + r _(x) . Where p _(x) is the payload data and r _(x) is a linear shift of p _(x) [X ^(nk) * p
_(x) ] is a remainder polynomial obtained by dividing the generator polynomial g _(X) . That is, r _(x) = [X ^(nk) * p _(x) ] modg _(X) .

On the other hand, the receiver 20 receives the transmitted optical signal by the optical receiving circuit 21, and performs optical / electrical conversion and waveform equalization. After that, frame synchronization processing is performed to know the position of the block.

That is, when the systematic code is considered as the error correction code, frame synchronization is necessary to know the position of the block. In the apparatus of the present embodiment, frame synchronization is performed with 2 bytes of the SOH area, and pointer processing is performed with 2 bytes of the POH area.

Therefore, the output of the optical receiving circuit 21 is SOH.
Frame extraction circuit 22 and POH frame extraction circuit 23
The frame synchronization and pointer processing are performed.
This allows the position of the payload to be specified. As described above, in the present embodiment, since the error correction calculation of the payload part is performed after the frame synchronization and the pointer process are performed, the hardware scale is minimized.

By the way, since no error correction calculation is added to SOH and POH, the sensitivity of these parts is not improved. However, frame synchronization and pointer processing are each equipped with synchronization protection, and in the area of low error rate (<10 ^-4 ) where the error correction code can exert its power, the frame synchronization and pointer processing are normal without impairing the error correction capability. To work.

After frame synchronization and pointer processing, for the polynomial f ' _{(X) of the} data string indicating the stuff area byte in which the payload and the remainder have been inserted, the generator polynomial calculation circuit 24 generates the same generator polynomial g _{(x )} To obtain the syndrome polynomial s _(x) . s _(x) = [f ' _(X) ] modg _(x)

The content (syndrome) of this syndrome polynomial shows the presence or absence of error bits, the position of the error bit when there is one bit error, and the even parity check result of the number of errors.

As shown in FIG. 5, the receiver 20 has the generator polynomial arithmetic circuit 24 (
However, the content of each flip-flop in the initial stage is decoded in the condition that the syndrome is generated,
Get the syndrome polynomial s _(x) . Then, the error correction circuit 26 corrects the 1-bit error by adding the payload data with the received data shifted by (n + 1) times.

When there is no error in the transmission line, s _(x) = 0, and the data string polynomial p _(x) can be simply written by ignoring the remainder polynomial r _(x) inserted from f ' _(X) on the transmitting side. Can be played. However, if there is an error in the transmission line, s _(x) ≠
It becomes 0. In this case, when the syndrome is calculated by the syndrome calculation circuit 25 and the error bit of the single error can be specified, the bit is corrected.

FIG. 6 is a more detailed embodiment of the error correction unit of the receiver 20 according to the present invention. The syndrome calculation circuit 25 has an EX-OR circuit 251 for performing even parity determination, and an AND circuit 252 for outputting “1” when the syndrome when the first bit of the data string is incorrect is input.

When the arbitrary t-th bit is erroneous, the syndrome arithmetic circuit 25 outputs (t-1) times through the generator polynomial arithmetic circuit 24 when the first bit of the data string is erroneous. Utilizing the property of being equal to the syndrome, "1" is output only at the time (t-1) (indicating the position of the error bit).

The output and the received data obtained by shifting the payload data n times are added to the adder 262 of the error correction circuit.
Then, the 1-bit error is corrected. If "1" is not obtained even when the generator polynomial operation circuit 24 is cycled n times, it is determined that a multi-bit error has been detected. Furthermore, when an error is detected and the parity check result is "1", an even error is detected.

In the case of the code according to the embodiment of the present invention, since the length of POH and the length of the stuff area are short for the length of the payload, one generator polynomial operation circuit inserts 1 row worth of payload and remainder operation result. While in the middle of seeking the syndrome from the staff insertion byte, the previous row
Therefore, if the syndrome is not "1", the operation for detecting the 1-bit error position must be executed at the same time.

Therefore, in the embodiment shown in FIG. 6, two identical generator polynomial arithmetic circuits 242 and 243 are prepared and 1 ro
The syndrome calculation and the 1-bit error position detection calculation are alternately switched for each w. Such alternate switching is performed by the selectors 241 and 244.

FIG. 7 shows an embodiment of a receiver configuration for further improving the error correction capability by using the correction code of the present invention. In particular, it is effective when the equalized waveform is deteriorated or noise increases and the equalized waveform falls within the window comparison width.

In FIG. 7, 71 is a discriminator, which is provided in the optical receiving circuit 21 of the receiver 20. Reference numeral 72 is a window comparator, which is also provided in the optical receiving circuit 21. 73 to 75 are a plurality of error calculators.
Here, the error calculator is the generator polynomial calculator 2 of FIG.
4 means the entire circuit including the syndrome calculation circuit 25 and the error correction circuit.

When the equalized waveform is deteriorated as shown in FIG. 8 or the noise is increased and the equalized waveform is included in the window comparison width, the bit at this point is identified by the discriminator 71. Judged as an unidentifiable bit. Then, this bit is sent to the first error calculator 73 as "0".

At the same time, this bit is set to "1" and sent to the second error calculator 74. If only one bit falls within the window comparison width within one operation period, the operation results of the first and second error operation units 73 and 74 will be the same (one error operation unit will have an error). Has been corrected).

Further, when any 2 bits fall within the window comparison width, the operation unit of the double is operated, and the operation unit output judged to be the most correct is controlled by the discriminator 76 and this. Output from the selector circuit 77.

As described above, even if an error that cannot be corrected with only one error calculator is generated, all suspicious data strings are calculated, so that the probability of error correction becomes high.

[0055]

As described above, according to the present invention,
S in concatenation mode compliant with modified G.709
An error correction code can be inserted into the DH signal. As a result, the data transmission process using the SDH signal can be executed with high accuracy.

By setting the payload data as the generation target of the error correction code, error monitoring of only user data can be realized, and even if SOH or POH rewrite is performed, it is not affected.

More specifically, in the embodiment of the present invention, by adding the shortened (33296, 33280) Hamming code to the SDH signal, about 1.3 dB (error rate = 10 is obtained without an error rate floor. ^-10 ] (depending on the slope of the error rate).

[Brief description of drawings]

FIG. 1 is a principle configuration diagram of the present invention.

FIG. 2 is a block diagram of an embodiment of an optical transmission device to which the present invention is applied.

FIG. 3 is an example of a generator polynomial arithmetic circuit of the example of FIG.

FIG. 4 is an explanatory diagram of signal processing of the present invention.

5 is a block diagram of an embodiment of a receiving circuit of the optical transmission device of FIG.

FIG. 6 is a block diagram of a more specific embodiment of the receiving circuit of the optical transmission device of FIG.

FIG. 7 is a block diagram of a configuration example of a receiver using an error correction code according to the present invention and having improved error correction capability.

FIG. 8 is a waveform diagram illustrating the embodiment of FIG.

FIG. 9 is an explanatory diagram of an SDH signal which is a target of the present invention.

[Description of Reference Signs] 1 SDH signal generation device 2 POH frame insertion means 3 generation means 4 insertion means 5 SOH frame insertion means

Claims (6)

[Claims] 1. A section over head (SO
H), pass overhead (POH), stuff area, and SDH signal for inserting an error correction code into a concatenation mode SDH signal having a frame structure composed of a plurality of columns of payload in which user data is stored. An error correction code insertion processing method, wherein generation means (3) for generating an error correction code by performing an error correction operation on data of each column of the payload, and an error generated by the generation means (3) An error correction code insertion processing method for an SDH signal, comprising: an insertion means (4) for inserting a correction code into the stuff area. 2. The error correction code insertion processing method for an SDH signal according to claim 1, wherein said generating means (3)
Generates an error correction code by performing an error correction operation on the data of a plurality of columns of the payload in parallel, and the inserting means (4) uses the generated plurality of error correction codes for the corresponding stuff area. An error correction code insertion processing method for an SDH signal, which is characterized in that the processing is performed so that the SDH signals are inserted in parallel. 3. An error correction code insertion processing method for an SDH signal according to claim 1, wherein said insertion means (4)
Is an error correction code insertion processing method for an SDH signal, characterized in that the error correction code generated by the generation means (3) is processed so as to be inserted into the stuff area of the next column. 4. A section over head (SO
H), path overhead (POH), stuff area, and SDH signal for inserting an error correction code into a concatenation mode SDH signal having a frame structure composed of a plurality of columns of payloads in which user data is stored. An error correction code insertion processing method, in which the stuff areas are distributed and arranged in each column of the payload, and an error correction operation is performed on the data of the payload divided by the stuff areas of the distributed allocation. And a inserting means (4) for inserting the error correcting code generated by the generating means (3) into the corresponding stuff area of the distributed arrangement. SDH signal error correction code insertion processing method. 5. SD according to any one of claims 1 to 4.
On the receiving side of the optical transmission equipment corresponding to the error correction code insertion processing method for the H signal, there is a pair of generator polynomial operation circuits (242, 243), and the syndrome operation and the 1-bit error position are performed for each row. An optical transmission device characterized in that detection operation is performed by switching between the pair of generator polynomial operation circuits (242, 243). 6. The SD according to any one of claims 1 to 4.
The receiving side of the optical transmission equipment compatible with the error correction code insertion processing method for H signals has a discriminator (71), a window comparator (72), and two or more error calculators (73 to 75). The discriminator (71) and the window comparator (7
2), and when the received waveform is within the threshold value, the signal train set to "0" and the signal train set to "1" are separated from the error calculator (73-
An optical transmission device characterized in that the output of the error calculator (73 to 75), which produces a better calculation result, is used as the decoding output.