JPH06295659A - Electron source and image forming device - Google Patents

Electron source and image forming device

Info

Publication number
JPH06295659A
JPH06295659A JP7816393A JP7816393A JPH06295659A JP H06295659 A JPH06295659 A JP H06295659A JP 7816393 A JP7816393 A JP 7816393A JP 7816393 A JP7816393 A JP 7816393A JP H06295659 A JPH06295659 A JP H06295659A
Authority
JP
Japan
Prior art keywords
electron
voltage
electron source
resistor
image forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7816393A
Other languages
Japanese (ja)
Other versions
JP3210129B2 (en
Inventor
Yoshikazu Sakano
嘉和 坂野
Shinichi Kawate
信一 河手
Toshihiko Takeda
俊彦 武田
Ichiro Nomura
一郎 野村
Kazuhiro Mitsumichi
和宏 三道
Hidetoshi Suzuki
英俊 鱸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP7816393A priority Critical patent/JP3210129B2/en
Publication of JPH06295659A publication Critical patent/JPH06295659A/en
Application granted granted Critical
Publication of JP3210129B2 publication Critical patent/JP3210129B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Electrodes For Cathode-Ray Tubes (AREA)
  • Cathode-Ray Tubes And Fluorescent Screens For Display (AREA)
  • Cold Cathode And The Manufacture (AREA)

Abstract

PURPOSE:To reduce irregularity in emitted electron quantity, and reduce irregularity in brightness by disposing resistors between one of a pair of electrodes and electron emission elements in such a way that voltages applied to the electron emission elements become similar to each other. CONSTITUTION:When a voltage 17V is applied to both ends of a positive side and a negative side electrodes 6, 7, in the case where a resistor 5 is not provided, a voltage about 17V is applied to electron emission elements D1 and D1000 at both ends, and a voltage of about 13.4V is applied to electron emission elements D500 and D501 at a center part. For correcting a differential voltage of 3.6V between them, and setting the applied voltage on each element to be constant at 14V, the resistors R1, R1000 are set at about 110OMEGA, and the resistors R1, R1000 at the center part to be 50OMEGA by setting and disposing the resistors 5 to be gradually smaller by about 0.12OMEGA in order, so the voltage of an almost similar degree is applied to all the elements. By setting a value of the resistor 5 at 0.01-1 times that of an element resistor Rd, and setting the applied voltage to provide a necessary emission current as an image forming device, the uniform emission current having smaller fluctuation can be provided.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は多数の電子放出素子、と
りわけ表面伝導形電子放出素子を備えた電子源に関し、
具体的には平板型ディスプレイや蛍光表示管等に適用が
可能な電子源とそれを用いた画像形成装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electron source having a large number of electron-emitting devices, especially surface conduction electron-emitting devices,
Specifically, the present invention relates to an electron source applicable to a flat panel display, a fluorescent display tube and the like, and an image forming apparatus using the electron source.

【0002】[0002]

【従来の技術】従来、簡単な構造で電子の放出が得られ
る素子として、例えば、エム アイエリンソン(M.
I.Elinson)等によって発表された冷陰極素子
が知られている[ラジオ エンジニアリング エレクト
ロン フィジックス(Radio Eng.Elect
ron Phys.)第10巻、1290〜1296
頁、1965年]。これは、基板上に形成された小面積
の薄膜に平行に電流を流すことにより、電子放出が生ず
る現象を利用するもので、一般には表面伝導形電子放出
素子と呼ばれている。この表面伝導形電子放出素子とし
ては、前記エリンソン等により開発された、SnO2
(Sb)薄膜を用いたもの、Au薄膜によるもの[ジー
・ディトマー“スイン ソリド フィルムス”(G.D
ittmer:“Thin Solid Film
s”)第9巻、317頁、1972年)、ITO薄膜に
よるもの[エム ハートウエル アンド シージーフォ
ンスタッド“アイイーイーイートランス”イーティーコ
ンファレンス(M.Hartwelland C.G.
Fonstad;“IEEETrans.ED Con
f.”)519頁、1983年]等が報告されている。
2. Description of the Related Art Conventionally, as a device which can emit electrons with a simple structure, for example, MI Elinson (M.
I. A cold cathode device announced by Elinson et al. Is known [Radio Engineering Electron Physics (Radio Eng.
ron Phys. ) Volume 10, 1290-1296
P. 1965]. This utilizes a phenomenon in which electrons are emitted by flowing a current in parallel with a thin film having a small area formed on a substrate, and is generally called a surface conduction electron-emitting device. As this surface conduction electron-emitting device, SnO 2 developed by Elinson et al.
(Sb) using thin film, using Au thin film [Gee Ditmer "Sin Solid Films" (GD
ittmer: "Thin Solid Film"
s ") 9, p. 317, 1972), by ITO thin film [M Hartwell and CG Fonstad" IEEE TRANS "ET Conference (M. Hartwellland CG.
Fonstad; “IEEE Trans.ED Con
f. ") Page 519, 1983], etc. are reported.

【0003】これらの表面伝導形電子放出素子の典型的
な素子構成を図6に示す。同図において22及び23は
電気的接続を得るための素子電極、25は導電性材料で
形成される電子放出部を含む薄膜、21は絶縁性基板、
24は電子放出部を示す。従来、これらの表面伝導形電
子放出素子においては、電子放出を行なう前に予めフォ
ーミングと呼ばれる通電処理によって電子放出部を形成
する。即ち、前記電極22と電極23の間に電圧を印加
する事により、薄膜25に通電し、これにより薄膜25
を局所的に破壊、変形もしくは変質せしめ、電気的に高
抵抗な状態にした電子放出部24を形成することにより
電子放出機能を得ている。従来、表面伝導形電子放出素
子は上述の高抵抗膜に素子電極22、23により電圧を
印加し、素子表面に電流を流すことにより、上述電子放
出部より電子を放出せしめるものである。
FIG. 6 shows a typical device configuration of these surface conduction electron-emitting devices. In the figure, 22 and 23 are element electrodes for obtaining electrical connection, 25 is a thin film including an electron emitting portion formed of a conductive material, 21 is an insulating substrate,
Reference numeral 24 represents an electron emitting portion. Conventionally, in these surface conduction electron-emitting devices, an electron-emitting portion is previously formed by an energization process called forming before electron emission. That is, by applying a voltage between the electrode 22 and the electrode 23, the thin film 25 is energized.
Is locally destroyed, deformed or altered to form an electron emitting portion 24 in an electrically high resistance state, thereby obtaining an electron emitting function. Conventionally, in the surface conduction electron-emitting device, a voltage is applied to the high resistance film by the device electrodes 22 and 23, and a current is caused to flow on the device surface, so that electrons are emitted from the electron emitting portion.

【0004】また、本発明者らは、特開平1−2005
32号公報及び特開平2−56822号公報において、
電極間に電子を放出せしめる微粒子を分散配置した新規
な表面伝導形電子放出素子を技術開示した。この電子放
出素子は、(1)高い電子放出効率が得られる。(2)
構造が簡単であるため、製造が容易である。(3)同一
基板上に多数の素子を配列形成できる。等の利点を有す
る素子である。これらの表面伝導形電子放出素子の典型
的な素子構成を図7に示す。図7において、22及び2
3は電気的接続を得るための素子電極、26は電子放出
せしめる微粒子が分散配置した電子放出部を含む薄膜、
21は絶縁性基板である。
The inventors of the present invention have also disclosed in Japanese Patent Laid-Open No. 2005-2005.
No. 32 and JP-A-2-56822,
We have disclosed the technology of a novel surface conduction electron-emitting device in which fine particles for emitting electrons are dispersedly arranged between electrodes. This electron-emitting device has (1) high electron emission efficiency. (2)
Since the structure is simple, it is easy to manufacture. (3) A large number of elements can be arrayed and formed on the same substrate. It is an element having advantages such as. A typical device configuration of these surface conduction electron-emitting devices is shown in FIG. In FIG. 7, 22 and 2
3 is an element electrode for obtaining electrical connection, 26 is a thin film including an electron emitting portion in which fine particles for emitting electrons are dispersed and arranged,
Reference numeral 21 is an insulating substrate.

【0005】近年、上述した表面伝導形電子放出素子を
画像形成装置に用いようとする試みがなされている。そ
の例を図8に示す。同図は上述した電子放出素子を多数
並べた画像形成装置を示すものである。ここで、39及
び40は配線電極、34は電子放出部を含む薄膜、35
はグリット電極、36は電子通過孔、37は画像形成部
材である。この画像形成部材は例えば、蛍光体、レジス
ト材等、電子衝突することにより発光、変色、帯電、変
質等する部材から成る。また、この画像形成装置は、配
線電極39及び40の間に複数の電子放出部を含む薄膜
34が線状に並べられた線状電子源とグリット電極35
でXYマトリックス駆動を行ない、画像形成部材37に
情報信号に応じて電子を衝突させることにより画像形成
を行なう装置である。
In recent years, attempts have been made to use the above-mentioned surface conduction electron-emitting device in an image forming apparatus. An example thereof is shown in FIG. The figure shows an image forming apparatus in which a large number of the electron-emitting devices described above are arranged. Here, 39 and 40 are wiring electrodes, 34 is a thin film including an electron emitting portion, and 35
Is a grit electrode, 36 is an electron passage hole, and 37 is an image forming member. The image forming member is made of, for example, a phosphor, a resist material, or the like that emits light, changes color, is charged, or changes quality by being hit by electrons. Further, in this image forming apparatus, a linear electron source in which a thin film 34 including a plurality of electron emitting portions is linearly arranged between the wiring electrodes 39 and 40, and a grid electrode 35.
Is a device for performing image formation by driving the XY matrix and causing electrons to collide with the image forming member 37 according to the information signal.

【0006】また、本発明者らは、特開平2−2479
36号公報及び特開平2−247937号公報におい
て、電極間に表面伝導形電子放出素子と抵抗素子からな
る電子源及び画像形成装置、及び、該電極の少なくとも
一方が薄膜抵抗体からなる電子源及び画像形成装置を技
術開示した。これらの電子源は放出電流量のゆらぎが改
善できる。またこれらの画像形成装置は、表示のちらつ
きや、画素間のばらつきが改善できる等の利点を有す
る。これらの電子源を用いた典型的な画像形成装置を図
9及び図10に示す。ここで、32及び33は素子電
極、34は電子放出部を含む薄膜、31は絶縁性基体、
38は薄膜抵抗体、39及び40は、配線電極、35は
グリット電極、36は電子通過孔、37は蛍光体41を
有する画像形成部材である。
The inventors of the present invention have also disclosed in Japanese Patent Laid-Open No. 2-2479.
No. 36 and JP-A-2-247937, an electron source and an image forming apparatus each including a surface conduction electron-emitting device and a resistance element between electrodes, and an electron source in which at least one of the electrodes includes a thin film resistor, An image forming apparatus has been disclosed. These electron sources can improve the fluctuation of the emission current amount. In addition, these image forming apparatuses have advantages such as display flicker and variations among pixels can be reduced. A typical image forming apparatus using these electron sources is shown in FIGS. 9 and 10. Here, 32 and 33 are device electrodes, 34 is a thin film including an electron emitting portion, 31 is an insulating substrate,
38 is a thin film resistor, 39 and 40 are wiring electrodes, 35 is a grit electrode, 36 is an electron passage hole, and 37 is an image forming member having a phosphor 41.

【0007】また上記電子放出素子以外にも薄膜熱カソ
ードやMIM形放出素子等有望な電子放出素子が多数報
告されている。
In addition to the above electron-emitting devices, many promising electron-emitting devices such as a thin film thermal cathode and MIM type emission devices have been reported.

【0008】これらは、成膜技術やホトリソグラフィー
技術の急速な進歩に伴い基板上に多数の素子を形成する
ことが可能となりつつあり、マルチ電子線源として蛍光
表示管、平板型ディスプレイ等の各種画像形成装置への
応用が期待されるところである。
With the rapid progress of film forming technology and photolithography technology, it is becoming possible to form a large number of devices on a substrate, and various devices such as a fluorescent display tube and a flat panel display can be used as a multi-electron beam source. It is expected to be applied to image forming apparatuses.

【0009】[0009]

【発明が解決しようとしている課題】しかしながら、こ
れらの素子を画像形成装置に応用した場合、一般には、
基板上に多数の素子を配列し、各素子間を薄膜もしくは
厚膜の電極で電気的に配線し、マルチ電子線源として用
いたが、配線抵抗で生じる電圧降下のために各素子ごと
に印加される電圧がばらついてしまうという現象が起き
ている。その結果、各放出素子から放出される電子線の
電流量にばらつきが生じ、形成される画像に濃度むらが
起きるという問題が発生していた。
However, when these elements are applied to an image forming apparatus, in general,
A large number of elements were arranged on the substrate, and each element was electrically wired with thin or thick film electrodes and used as a multi-electron beam source, but it was applied to each element due to the voltage drop caused by wiring resistance. There is a phenomenon that the applied voltage varies. As a result, the amount of current of the electron beam emitted from each emitting element varies, which causes a problem that density unevenness occurs in the formed image.

【0010】図11及び図12はこの問題をより詳しく
説明するための図で両図とも(a)は電子放出素子と配
線抵抗及び電源を含む等価回路図であり、(b)は各電
子放出素子の正極と負極の電位を示す図、(c)は各素
子の正負極間に印加される電圧を示す図である。
11 and 12 are views for explaining this problem in more detail. In both figures, (a) is an equivalent circuit diagram including an electron-emitting device, wiring resistance and a power source, and (b) is each electron-emitting device. FIG. 3 is a diagram showing the potentials of the positive electrode and the negative electrode of the element, and (c) is a diagram showing the voltage applied between the positive and negative electrodes of each element.

【0011】図11の(a)は、並列接続されたN個の
電子放出素子D1 〜DN と電源VEとを接続した回路を
示すもので、電源の正極と素子D1 の正極を、また電源
の負極と素子DN の負極を接続したものである。また、
各素子を並列に結ぶ共通配線は、図に示すように隣接す
る素子間でrの抵抗成分を有するものとする。(画像形
成装置では、電子線のターゲットとなる画素は、通常等
ピッチで配列されている。従って、電子放出素子も空間
的に等間隔をもって配列されており、これらを結ぶ配線
は幅や膜厚が製造上ばらつかない限り、素子間で等しい
抵抗値をもつ。) また、電子放出素子D1 〜DN は、ほぼ等しい抵抗値R
dを各々有するものとする。
FIG. 11A shows a circuit in which N electron-emitting devices D 1 to D N connected in parallel and a power supply V E are connected. The positive electrode of the power supply and the positive electrode of the device D 1 are connected to each other. In addition, the negative electrode of the power source and the negative electrode of the element D N are connected. Also,
The common wiring connecting the respective elements in parallel has a resistance component of r between the adjacent elements as shown in the figure. (In the image forming apparatus, pixels that are targets of electron beams are usually arranged at equal pitches. Therefore, the electron-emitting devices are also spatially arranged at equal intervals, and the wiring connecting them is wide or thick. Have the same resistance value as long as they do not vary in manufacturing.) Further, the electron-emitting devices D 1 to D N have substantially the same resistance value R.
d respectively.

【0012】前記図11の(a)の回路図に於て、各素
子の正極及び負極の電位を示したのが図11の(b)で
ある。図の横軸はD1 〜DN の素子番号を示し、縦軸は
電位を示す。●印は各素子の正極電位を、黒い四角印は
負極電位を表わしており、電位分布の傾向を見易くする
為、便宜的に●印(黒い四角印)を実線で結んでいる。
In the circuit diagram of FIG. 11A, the potentials of the positive and negative electrodes of each element are shown in FIG. 11B. The horizontal axis of the figure shows the element numbers D 1 to DN , and the vertical axis shows the potential. The ● mark represents the positive electrode potential of each element, and the black square mark represents the negative electrode potential. For convenience, the ● mark (black square mark) is connected by a solid line to make it easier to see the tendency of the potential distribution.

【0013】本図から明らかなように、配線抵抗rによ
る電圧降下は、一様に起こるわけではなく、正極側の場
合は素子D1 に近い程急峻であり、逆に負極側では素子
Nに近い程急峻になっている。これは、正極側では、
1 に近い程配線抵抗rを流れる電流が大きく、また負
極側では、逆にDN に近い程大きな電流が流れる為であ
る。
[0013] As from this diagram is clear, the voltage drop due to the wiring resistance r is not necessarily occur uniformly in the case of the positive electrode side is a steep closer to element D 1, element D N in the negative electrode side in the opposite The closer to, the steeper it is. This is on the positive side
This is because the closer the current is to D 1 , the larger the current flowing through the wiring resistance r, and on the negative electrode side, the closer to D N , the larger the current flows.

【0014】これから、各素子の正負極間に印加される
電圧を示したのが図11の(c)である。
The voltage applied between the positive and negative electrodes of each element is shown in FIG. 11 (c).

【0015】縦軸は印加電圧を各々示し、図11の
(b)と同様傾向を見易くする為に、便宜的に
The vertical axis represents the applied voltage. For the sake of convenience, the same tendency as in FIG.

【0016】[0016]

【外1】 を実線で結んでいる。[Outer 1] Are connected by a solid line.

【0017】本図から明らかなように、図11の(a)
のような回路の場合には、両端の素子(D1 及びDN
に近い程大きな電圧が印加され、中央部付近の素子では
印加電圧が小さくなる。従って、各電子放出素子から放
出される電子線は、両端の素子程放出電流が大きくな
り、画像形成装置に応用した場合、極めて不都合であっ
た。(例えば、両端に近い部分の画像は濃度が濃く、中
央部付近の濃度は淡くなってしまう。)
As is apparent from this figure, FIG.
In the case of such a circuit, the elements at both ends (D 1 and D N )
The closer the voltage is to, the larger the voltage is applied, and the lower the voltage is applied to the elements near the center. Therefore, the electron beam emitted from each electron-emitting device has a larger emission current toward the elements at both ends, which is extremely inconvenient when applied to an image forming apparatus. (For example, the density of the image near both ends is high, and the density near the center is light.)

【0018】一方図12に示すのは、並列接続された素
子列の片側(本図では素子D1 側)に電源の正負極を接
続した場合である。この様な回路の場合には、同図
(b)に示すようになる。
On the other hand, FIG. 12 shows the case where the positive and negative electrodes of the power supply are connected to one side (the side of the element D 1 in this figure) of the element rows connected in parallel. In the case of such a circuit, it becomes as shown in FIG.

【0019】従って、各素子に印加される電圧は、同図
(C)に示すようにD1 に近い程大きなものとなり、画
像形成装置として応用するには極めて不都合であった。
Therefore, the voltage applied to each element increases as it approaches D 1 as shown in FIG. 2C, which is extremely inconvenient for application as an image forming apparatus.

【0020】以上二つの例で示したような素子毎の印加
電圧のばらつきの程度は、並列接続される素子の総数N
や、素子抵抗Rdと配線抵抗rの比(=Rd/r)や、
あるいは電源の接続位置により異なるが、一般にはNが
大きい程、Rd/rが小さい程ばらつきは顕著となり、
また前記図11よりも図12の接続方法のほうが、素子
に印加される電圧のばらつきが大きい。
The degree of variation in the applied voltage for each element as shown in the above two examples is determined by the total number N of elements connected in parallel.
Or the ratio of the element resistance Rd to the wiring resistance r (= Rd / r),
Or, it depends on the connection position of the power source, but in general, the larger N is and the smaller Rd / r is, the more remarkable the variation is.
Further, the variation in the voltage applied to the element is larger in the connection method of FIG. 12 than in FIG. 11.

【0021】例えば、図11の接続法で素子抵抗Rd=
1kΩ、r=10mΩの場合、N=100であれば、印
加電圧の最も大きな素子と最も小さな素子を比較する
と、Vmax :Vmin =102:100程度であるが、N
=1000であれば、Vmax :Vmin =472:100
と、ばらつきの割合は大きくなる。
For example, in the connection method of FIG. 11, element resistance Rd =
In the case of 1 kΩ and r = 10 mΩ, if N = 100, comparing the element with the largest applied voltage with the element with the smallest applied voltage, V max : V min = 102: 100, but N
= 1000, V max : V min = 472: 100
Then, the rate of variation increases.

【0022】また、N=1000、Rd=1kΩ、r=
1mΩの場合には、Vmax :Vmin=127:100程
度であるが、r=10mΩの配線抵抗の場合には、V
max :Vmin =472:100程度というようにばらつ
きの程度は大きくなる。
Further, N = 1000, Rd = 1 kΩ, r =
In the case of 1 mΩ, V max : V min = 127: 100, but in the case of the wiring resistance of r = 10 mΩ, V max : V min = 127: 100.
The degree of variation becomes large, such as max : V min = 472: 100.

【0023】以上説明したように、特性の等しい電子放
出素子を複数個並列に接続した場合には、配線抵抗によ
り生ずる電圧降下の為、各素子に実効的に印加される電
圧は素子毎にばらついてしまい、電子ビームの放出量が
不均一となり、画像形成装置として応用する場合に不都
合であった。
As described above, when a plurality of electron-emitting devices having the same characteristics are connected in parallel, the voltage effectively generated in each device varies due to the voltage drop caused by the wiring resistance. Therefore, the emission amount of the electron beam becomes non-uniform, which is inconvenient when applied as an image forming apparatus.

【0024】特に、画素数の多い(すなわちNの大き
い)大容量表示装置を実現しようとする場合には、上記
ばらつきの割合は顕著となり、画像の濃度むらが大きな
問題となっていた。
In particular, when trying to realize a large-capacity display device having a large number of pixels (that is, a large N), the ratio of the above-mentioned variation becomes remarkable, and the uneven density of the image becomes a serious problem.

【0025】そこで本発明の目的は、主として、上述の
配線抵抗による電圧降下の為に生ずる、各電子放出素子
からの放出電子量のばらつきを低減した電子源を提供す
ることにある。更に本発明の目的は、上記電子源を用い
た輝度ばらつきを低減した平板型ディスプレイ等の画像
形成装置を提供することにある。
Therefore, an object of the present invention is to provide an electron source in which variations in the amount of electrons emitted from each electron-emitting device, which are mainly caused by the voltage drop due to the above-mentioned wiring resistance, are reduced. A further object of the present invention is to provide an image forming apparatus such as a flat panel display which uses the above-mentioned electron source and has reduced luminance variations.

【0026】[0026]

【課題を解決するための手段】上記目的を達成する本発
明は、正極側電極と負極側電極との間に、複数の電子放
出素子が電気的に並列に接続された素子列を有する電子
源において、前記一対の電極の少なくとも一方の電極と
前記電子放出素子との間に、前記電子放出素子の各々に
印加される電圧が実質的に同程度となるように抵抗体が
配置されていることを特徴とする電子源である。
The present invention for achieving the above object provides an electron source having an element array in which a plurality of electron-emitting devices are electrically connected in parallel between a positive electrode and a negative electrode. In, the resistor is disposed between at least one electrode of the pair of electrodes and the electron-emitting device so that the voltages applied to the respective electron-emitting devices are substantially the same. Is an electron source.

【0027】更に本発明は、上記電子源と、前記電子源
から放出される電子線を情報信号に応じて変調するため
の変調手段と、電子線の照射により画像を形成する画像
形成部材とを有する画像形成装置である。
Further, the present invention comprises the above electron source, a modulation means for modulating the electron beam emitted from the electron source according to an information signal, and an image forming member for forming an image by irradiation of the electron beam. The image forming apparatus having the above.

【0028】表面伝導形電子放出素子の電子放出特性
は、図13に示すように、素子印加電圧Vfが8V程度
となったときから電子放出が始まり、Vfに比例して放
出電流Ieが急激に増加する。
As shown in FIG. 13, the electron emission characteristic of the surface conduction electron-emitting device is such that the electron emission starts when the device applied voltage Vf becomes about 8 V and the emission current Ie rapidly increases in proportion to Vf. To increase.

【0029】従って、電圧降下によって各素子の印加電
圧にばらつきが生じる場合、そのばらつきは、大きな放
出電流ばらつきをもたらす。そこで上述のように抵抗体
を設け、各素子に実質的に印加される電圧を一定にする
ことで、各素子からの放出電流を実質的に均一とするこ
とができる。以下、好ましい態様について詳述する。図
1に示すごとく、並列接続された電子放出素子列の正極
側及び負極側の各取り出し端子が素子列の同一端の正極
側電極、負極側電極に各々配置されている場合、抵抗体
1 〜RN の抵抗値が取り出し電極から遠くなるに従っ
て低くなる。すなわち、抵抗体R1 〜RN の抵抗値が2
1 、2R2 =2R1 −(N−1)4r、2R3 =2R
2 −(N−2)4r、……、2Rn =2Rn-1 −{N−
(n−1)}4rとなるよう設けることにより、実質的
に各素子D1 〜DN に印加される電圧が一定となる。ま
た、上記例では各々の電子放出素子D1 〜DN の両側に
抵抗体がR1 〜RN が配置されているが、どちらか一方
のみ抵抗体を設けた場合、抵抗体R1 〜RN の抵抗値
が、R1 、R2 =R1 −(N−1)2r、R3 =R2
(N−2)2r、……、Rn =Rn-1 −{N−(n−
1)}2rとなるよう設ければよい。
Therefore, when the voltage applied to each element varies due to the voltage drop, the variation causes a large variation in the emission current. Therefore, by providing the resistor as described above and making the voltage substantially applied to each element constant, the emission current from each element can be made substantially uniform. Hereinafter, a preferred embodiment will be described in detail. As shown in FIG. 1, when the positive electrode side and the negative electrode side extraction terminals of the electron-emitting device array connected in parallel are arranged on the positive electrode side electrode and the negative electrode side electrode at the same end of the device array, respectively, the resistor R 1 becomes lower as the resistance value of the to R N is the distance from the take-out electrode. That is, the resistance value of the resistor R 1 to R N is 2
R 1, 2R 2 = 2R 1 - (N-1) 4r, 2R 3 = 2R
2- (N-2) 4r, ..., 2R n = 2R n-1- {N-
By providing (n-1)} 4r become so, the voltage substantially applied to each element D 1 to D N is constant. Also, if the resistor on both sides of each of the electron-emitting devices D 1 to D N in the above example is but R 1 to R N is arranged, provided with only one of the resistor, the resistor R 1 to R The resistance value of N is R 1 , R 2 = R 1 − (N−1) 2r, R 3 = R 2
(N-2) 2r, ...... , R n = R n-1 - {N- (n-
1)} 2r.

【0030】また、図2に示すごとく、並列接続された
電子放出素子列の正極側取り出し端子が素子列の正極側
電極の一端に配置され、負極側取り出し端子が素子列の
負極側電極の他の一端に配置されている場合、抵抗体R
1 〜RN の抵抗値が素子列中央部が両端より低くなる。
すなわち、抵抗体R1 〜RN の抵抗値が2R1 、2R2
=2R1 −(N−2)2r、2R3 =2R2 −(N−
4)2r、……、2Rn=2Rn-1 −2{N−2(n−
1)}rとなるよう設けることにより、実質的に各素子
1 〜DN に印加される電圧が一定となる。また、上記
例では各々の電子放出素子D1 〜DN の両側に抵抗体R
1 〜RN が配置されているが、どちらか一方のみ抵抗体
を設けた場合、抵抗体R1 〜RN の抵抗値が、R1 、R
2 =R1 −(N−2)r、R3 =R2 −(N−4)r、
n =Rn-1 −{N−2(n−1)}rとなるよう設け
ればよい。
Further, as shown in FIG. 2, the positive electrode side take-out terminal of the electron-emitting device row connected in parallel is arranged at one end of the positive electrode side electrode of the element row, and the negative electrode side take-out terminal is other than the negative electrode side electrode of the element row. If it is placed at one end of the resistor R
1 the resistance value of the to R N is lower than both ends element array central portion.
That is, the resistance value of the resistor R 1 to R N is 2R 1, 2R 2
= 2R 1- (N-2) 2r, 2R 3 = 2R 2- (N-
4) 2r, ......, 2R n = 2R n-1 -2 {N-2 (n-
1)} r, the voltage applied to each of the elements D 1 to DN becomes substantially constant. In the above example, resistors R are provided on both sides of each electron-emitting device D 1 -D N.
1 When it to R N is arranged, provided with only one of the resistor, the resistance value of the resistor R 1 to R N is, R 1, R
2 = R 1 - (N- 2) r, R 3 = R 2 - (N-4) r,
R n = R n-1 - {N-2 (n-1)} may be provided so as to be r.

【0031】以上、図1及び図2で示したごとく、電圧
降下が最大となる部位の抵抗体の抵抗値を最小とし、電
圧降下が最小となる部位の抵抗体の抵抗値が最大となる
よう設けることで、全素子から同様の電子放出量が得ら
れることになる。
As described above, as shown in FIGS. 1 and 2, the resistance value of the resistor at the portion where the voltage drop is maximized is minimized, and the resistance value of the resistor at the portion where the voltage drop is minimized is maximized. By providing the same, the same amount of electron emission can be obtained from all the elements.

【0032】また抵抗体の抵抗値は配線電極(正極側電
極及び負極側電極)の抵抗値、すなわち電圧降下を補正
できる抵抗値以上であればよく電子放出部の抵抗値の
0.01〜1倍の範囲であれば、放出電流を低下させる
ことなしに放出電流量のゆらぎが低下するよう作用す
る。抵抗体材料としては、上記抵抗値を有するものであ
ればどのようなものでもかまわない。例を上げるなら
ば、材料としてニクロム合金、酸化スズ、Ta2 N、C
r −S−O等のサーメット材が代表的なものとして挙げ
られる。
The resistance value of the resistor may be equal to or higher than the resistance value of the wiring electrodes (the positive electrode side electrode and the negative electrode side electrode), that is, the resistance value capable of correcting the voltage drop. In the double range, the fluctuation of the emission current amount is reduced without reducing the emission current. Any resistor material may be used as long as it has the above resistance value. For example, Nichrome alloy, tin oxide, Ta 2 N, C
Typical examples include cermet materials such as r- S-O.

【0033】また、本発明にかかる抵抗体は、電子放出
素子に対して別個、設けられる上述の態様に限られず、
図6、図7の22、23で示される素子電極を上記抵抗
体として用いても良い。
Further, the resistor according to the present invention is not limited to the above-mentioned mode in which it is provided separately for the electron-emitting device,
The element electrodes indicated by 22 and 23 in FIGS. 6 and 7 may be used as the resistor.

【0034】以上述べたように、本発明によれば配線電
極による電圧降下がもたらす各電子放出素子の印加電圧
のばらつきを上記抵抗体の電圧降下で補正し、各電子放
出素子に実効的に同一電圧が印加させることで配線抵抗
による電圧降下の影響を無視しうる電子源が得られる。
As described above, according to the present invention, the variation in the applied voltage of each electron-emitting device caused by the voltage drop due to the wiring electrode is corrected by the voltage drop of the resistor so that each electron-emitting device is effectively the same. By applying a voltage, an electron source in which the influence of the voltage drop due to the wiring resistance can be ignored can be obtained.

【0035】以上、本発明の好ましい態様について述べ
たが、特に、抵抗体は複数の電子放出素子の全てに対し
て配置されている必要はなく、いくつかの電子放出素子
に対してのみ配置されてある場合でも、先に述べたよう
に、電子放出素子の各々に印加される電圧が実質的に同
程度となるよう配置されてあれば良い。ここで、上記実
質的に同程度とは、後述するように好ましはくは、各輝
度ばらつきが5%以内となる程度であることが望まし
い。
The preferred embodiment of the present invention has been described above. In particular, the resistor need not be arranged for all of the plurality of electron-emitting devices, but may be arranged for only some of the electron-emitting devices. In this case, as described above, the voltage applied to each electron-emitting device may be set to be substantially the same. Here, the above-mentioned “substantially the same degree” is preferably such that each luminance variation is within 5%, as described later.

【0036】[0036]

【実施例】以下に実施例を挙げて本発明を更に詳細に説
明する。
The present invention will be described in more detail with reference to the following examples.

【0037】〔実施例1〕図5は本発明にかかる画像形
成装置。図3の(a)は、図5の画像形成装置に用いら
れる電子源の並列接続された電子放出素子上面図ではあ
る。図5、図3の(a)において、2、3は素子電極、
4は電子放出部を含む薄膜、5は抵抗体、6、7は配線
電極、即ち上述した正極側電極及び負極側電極である。
又11、12は配線電極6、7に電圧を印加する際に用
いられる取り出し端子である。
[Embodiment 1] FIG. 5 shows an image forming apparatus according to the present invention. FIG. 3A is a top view of electron-emitting devices, in which electron sources used in the image forming apparatus of FIG. 5 are connected in parallel. In FIGS. 5 and 3A, reference numerals 2 and 3 denote device electrodes,
Reference numeral 4 is a thin film including an electron emitting portion, 5 is a resistor, and 6 and 7 are wiring electrodes, that is, the above-mentioned positive electrode side electrode and negative electrode side electrode.
Reference numerals 11 and 12 are lead terminals used when a voltage is applied to the wiring electrodes 6 and 7.

【0038】まず、実際に電子放出素子を作製する前
に、典型的な表面伝導形電子放出素子の特性をもとに1
000素子並列接続されたときの配線抵抗による電圧降
下を見積もったところ、配線抵抗r=1mΩ、素子抵抗
Rdを1000Ωとして実際の素子に印加される電圧
は、両端部分が最大Vfmax 、中央部分が最小Vfmin
とするとその比Vfmax :Vfmin 127:100と
なった。
First, before actually manufacturing the electron-emitting device, 1 based on the characteristics of a typical surface conduction electron-emitting device.
When the voltage drop due to the wiring resistance when 000 elements were connected in parallel was estimated, the wiring resistance r = 1 mΩ, the element resistance Rd was 1000Ω, and the voltage applied to the actual element was the maximum Vf max at both ends and the central portion. Minimum Vf min
Then, the ratio becomes Vf max : Vf min to 127: 100.

【0039】これは、正極側及び負極側両電極の両端
(A−C間)に駆動電圧17Vを印加したとき、抵抗体
を設けない場合、両端部分の電子放出素子(D1 及びD
1000には、ほぼ17Vが印加され、中央部分の電子放出
素子D500 、D501 には、13.4V程度の電圧が印加
されることを示している。この印加電圧差3.6Vを補
正し、各電子放出素子に印加される電圧を14Vに一定
にするには、両端部分の電子放出素子の抵抗体(R1
1000)を110Ω程度とし、中央部分の電子放出素子
の抵抗体を(R500 、R501 )50Ω程度になる様、抵
抗体5を0.12Ω程度順次小さくし配置することによ
り全ての素子に、ほぼ同程度の電圧が印加されることに
なる。
This is because when a driving voltage of 17 V is applied to both ends (between A and C) of both the positive electrode side and the negative electrode side, no electron-emitting device (D 1 and D
It is shown that about 17 V is applied to 1000 and a voltage of about 13.4 V is applied to the electron-emitting devices D 500 and D 501 in the central portion. In order to correct this applied voltage difference of 3.6 V and make the voltage applied to each electron-emitting device constant at 14 V, the resistors (R 1 , R 1 ,
R 1000 ) is set to about 110Ω, and the resistor 5 of the electron-emitting device in the center portion is set to about 50Ω (R 500 , R 501 ). , About the same voltage will be applied.

【0040】また、抵抗体5の抵抗値を素子抵抗Rdの
0.01〜1倍程度に設定し、画像形成装置として必要
な放出電流Ieを得られる様印加電圧を設定することに
よりほぼ一様でゆらぎの小さい放出電流が得られる。
Further, the resistance value of the resistor 5 is set to about 0.01 to 1 times the element resistance Rd, and the applied voltage is set so that the emission current Ie necessary for the image forming apparatus is set. Thus, an emission current with small fluctuation can be obtained.

【0041】上記の様な見積りのもとに各電子放出素子
の抵抗体(R1 〜R1000)と、その抵抗値の関係をプロ
ットしたものが図3の(b)である。
FIG. 3B is a plot of the relationship between the resistors (R 1 to R 1000 ) of each electron-emitting device and the resistance values thereof, based on the above estimation.

【0042】図3の(b)に従って本実施例の電子源、
図3の(a)を以下の様に作成した。 絶縁性基体1として石英基板を用い、これを有機溶剤
により充分に洗浄後、該基体1面上に素子電極2、3を
形成した。素子電極の材料として、Ni金属を用いた。
素子電極間隔を2μm素子電極の幅を300μm、その
厚さを1000Åとした。 次に抵抗体5にNiCr(60:40wt%、p=約
1×10-6Ωm)を用い、R1 、R1000の抵抗体5は幅
300μm、長さ5.5μm、厚さ1000Åで抵抗値
約110Ω、R500 の抵抗体5は幅300μm、長さ
2.5μm、厚さ1000Åで抵抗値約50Ω、R1
らR1000までの抵抗体5は、R1 からR500まで順次約
0.12Ωずつ小さく、R501 からR1000まで順次、約
0.12Ωずつ大きくなる様に抵抗体の長さを変化させ
素子電極2、3の両側に形成した。 次に、配線電極6、7にAl(P=約3×10-8Ω
m)を用い、幅600μm、厚さ50μmとし形成し
た。このときの配線抵抗rは約1mΩであった。 次に、有機パラジウム化合物を含む有機溶媒(奥野製
薬(株)製CCP−4230)を全面に回転塗布後、空
気中で300℃にて10分間の加熱処理をして、酸化パ
ラジウム(PdO)微粒子からなる薄膜を形成した。そ
の後、素子電極2、3の間に電圧を印加し、前記薄膜を
通電処理(フォーミング処理)することにより電子放出
部を含む薄膜4とした。尚フォーミング処理の電圧波形
を図14に示す。
According to FIG. 3B, the electron source of this embodiment,
FIG. 3A was created as follows. A quartz substrate was used as the insulative substrate 1, and after thoroughly washing it with an organic solvent, element electrodes 2 and 3 were formed on the surface of the substrate 1. Ni metal was used as the material of the device electrode.
The element electrode spacing was 2 μm, the element electrode width was 300 μm, and the thickness was 1000 Å. Next, NiCr (60:40 wt%, p = about 1 × 10 −6 Ωm) is used for the resistor 5, and the resistors 5 of R 1 and R 1000 have a width of 300 μm, a length of 5.5 μm, and a thickness of 1000Å. value of about 110 ohm, resistor 5 width 300μm of R 500, length 2.5 [mu] m, the resistance value of about 50Ω at a thickness 1000 Å, resistor 5 from R 1 to R 1000 sequentially about 0 R 1 to R 500 The resistors were formed on both sides of the element electrodes 2 and 3 by changing the length of the resistor so as to decrease by 12 Ω and increase from R 501 to R 1000 by about 0.12 Ω. Next, Al (P = about 3 × 10 −8 Ω is applied to the wiring electrodes 6 and 7).
m) was used to form a film having a width of 600 μm and a thickness of 50 μm. The wiring resistance r at this time was about 1 mΩ. Next, an organic solvent containing an organopalladium compound (CCP-4230 manufactured by Okuno Chemical Industries Co., Ltd.) was spin-coated on the entire surface, and then heat-treated in air at 300 ° C. for 10 minutes to obtain palladium oxide (PdO) fine particles. Was formed. After that, a voltage is applied between the device electrodes 2 and 3, and the thin film is subjected to an energization process (forming process) to form a thin film 4 including an electron emitting portion. The voltage waveform of the forming process is shown in FIG.

【0043】図14中、T1及びT2は電圧波形のパル
ス幅とパルス間隔であり、本実施例ではT1を1ミリ
秒、T2を10ミリ秒とし、三角波の波高値(フォーミ
ング時のピーク電圧)は5Vとし、フォーミング処理は
約10のマイナス6乗torrの真空雰囲気下で60秒
間行った。このように作成された電子放出部は、パラジ
ウム元素を主成分とする微粒子が分散配置された状態と
なり、その微粒子の平均粒径は30オングストロームで
あった。 次に上記のごとく作成した電子源上に、図5に示した
様に5mm厚のガラススペーサー10を設け、スペーサ
ー上に、一様に蛍光体(不図示)を塗布した蛍光体基板
9及び透明電極(不図示)を設けた後、全体を1×10
-6Torr程度の真空度にして封止し画像形成装置を作
成した。透明電極に加速電圧1KVで電子放出実験を行
った。電源の接続方法は図3の(a)に示したように、
素子電極2のD1 側Aを電源正極、素子電極3のD1000
側Cをアースとし、駆動電圧17Vを印加し動作させた
ところ各放出部に対応した輝点が観察され、各輝点の輝
度は目視でほぼ均一であった。また、各輝度のばらつき
をスポット輝度計を用いて測定したところ、ばらつきは
5%以内であった。
In FIG. 14, T1 and T2 are the pulse width and pulse interval of the voltage waveform. In the present embodiment, T1 is 1 ms and T2 is 10 ms, and the peak value of the triangular wave (peak voltage during forming). Was 5 V, and the forming treatment was performed for 60 seconds in a vacuum atmosphere of about 10 −6 torr. In the electron-emitting portion thus produced, fine particles containing palladium element as a main component were dispersed and arranged, and the average particle diameter of the fine particles was 30 Å. Next, as shown in FIG. 5, a glass spacer 10 having a thickness of 5 mm is provided on the electron source prepared as described above, and a phosphor substrate 9 and a transparent substrate 9 in which a phosphor (not shown) is uniformly applied on the spacer. After installing the electrode (not shown), the whole area is 1 × 10
An image forming apparatus was prepared by sealing at a vacuum degree of about -6 Torr. An electron emission experiment was performed on the transparent electrode at an accelerating voltage of 1 KV. As shown in Fig. 3 (a), the power connection method is as follows.
The D 1 side A of the element electrode 2 is the power source positive electrode, and the D 1000 of the element electrode 3 is D 1000.
When the side C was grounded and a drive voltage of 17 V was applied to operate, bright spots corresponding to each emitting portion were observed, and the brightness of each bright spot was visually almost uniform. Moreover, when the variation in each luminance was measured using a spot luminance meter, the variation was within 5%.

【0044】〔実施例2〕本実施例の電子源は、抵抗体
5を電子放出素子の片端のみに設けた以外は、実施例1
と同様に作成した。抵抗体5は図3の(b)(A−B間
の抵抗値)のごとく、R1 が幅300μm長さ16μ
m、厚さ100Åで抵抗値約320Ω、R1000が幅30
0μm、長さ5μm、厚さ1000Åで抵抗値約100
Ωとし、R1からR1000まで順次、抵抗体の長さを変化
させることで抵抗値を約0.22Ω程度ずつ小さくして
形成した。
[Embodiment 2] The electron source of this embodiment is the same as Embodiment 1 except that the resistor 5 is provided only at one end of the electron-emitting device.
Created in the same way. As the resistor 5 of FIG. 3 (b) (resistance between A-B), R 1 is the width 300μm length 16μ
m, thickness 100Å, resistance value about 320Ω, R 1000 width 30
0μm, length 5μm, thickness 1000Å, resistance value about 100
The resistance value was gradually changed from R 1 to R 1000 by sequentially changing the length of the resistor to reduce the resistance value by about 0.22 Ω.

【0045】本実施例の上記電子源を、実施例1と同様
に図5の画像形成装置に用いて、A−B間に駆動電圧1
7Vを印加し、動作させたところ、実施例1と同様の結
果を得た。
The electron source of the present embodiment is used in the image forming apparatus of FIG. 5 as in the first embodiment, and the driving voltage 1 is applied between A and B.
When 7 V was applied and operated, the same results as in Example 1 were obtained.

【0046】〔実施例3〕本実施例の電子源は、図4に
示したように、電子放出素子の素子電極自体を抵抗体5
として用いた以外、実施例1と同様に作成した。本実施
例の抵抗体5はHfB2 (P=11×10-8Ω・m)を
用い、R1 、R1000の長さ110μm幅300μm、厚
さ1000Å、抵抗値、約200Ω、R500の長さ5
0μm抵抗値約90Ωにし、実施例1と同様にR1 から
1000の抵抗値を順次変えて形成した。
[Embodiment 3] In the electron source of this embodiment, as shown in FIG.
It was prepared in the same manner as in Example 1 except that it was used as. HfB 2 (P = 11 × 10 −8 Ω · m) is used for the resistor 5 of this embodiment, and the length of R 1 and R 1000 is 110 μm, the width is 300 μm, the thickness is 1000 Å, the resistance value is about 200 Ω, and the length of R 500 is R 500. 5
A resistance value of 0 μm was set to about 90Ω and resistance values of R 1 to R 1000 were sequentially changed in the same manner as in Example 1.

【0047】本実施例の上記電子源を実施例1と同様に
図5の画像形成装置を用いて、A−C間に駆動電圧17
Vを印加し、動作させたところ実施例1と同様の結果を
得た。
As in the first embodiment, the electron source of the present embodiment is used with the image forming apparatus of FIG.
When V was applied and operated, the same results as in Example 1 were obtained.

【0048】〔実施例4〕本実施例の電子源は、電子放
出素子の素子電極の一方のみを抵抗体5として用いた以
外、実施例3と同様に作成した。抵抗体5は実施例3と
同じ材料を用い、R1 が幅300μm、長さ220μ
m、厚さ1000Åで抵抗値約400Ω、R1000が幅3
00μm、長さ100μm、厚さ1000Å、抵抗値約
180Ωにし、実施例2と同様にR1 からR1000の抵抗
値を順次変えて形成した。
Example 4 The electron source of this example was made in the same manner as in Example 3 except that only one of the device electrodes of the electron-emitting device was used as the resistor 5. The resistor 5 is made of the same material as in Example 3, and R 1 has a width of 300 μm and a length of 220 μm.
m, thickness 1000Å, resistance value about 400Ω, R 1000 width 3
The resistance values of R 1 to R 1000 were sequentially changed in the same manner as in Example 2 to form a film having a thickness of 00 μm, a length of 100 μm, a thickness of 1000 Å and a resistance value of about 180Ω.

【0049】本実施例の上記電子源を実施例1と同様に
図5の画像形成装置を用いてA−B間に、駆動電圧17
Vを印加し、動作させたところ実施例1と同様の結果を
得た。
In the same manner as in the first embodiment, the electron source of the present embodiment is used with the image forming apparatus of FIG.
When V was applied and operated, the same results as in Example 1 were obtained.

【0050】[0050]

【発明の効果】以上説明したように、本発明の電子源
は、配線抵抗により生じる電圧降下に応じて、抵抗体の
抵抗値を任意に制御し、表面伝導形電子放出素子の正極
側電極、負極側電極の少なくともどちらか一方に、上記
抵抗体を設けた構成を探ることにより、各電子放出素子
から放出される電流のばらつきを抑えることができ、し
かも、このような電子源を用いた画像形成装置は、輝度
ばらつきの低減された装置となる。
As described above, according to the electron source of the present invention, the resistance value of the resistor is arbitrarily controlled according to the voltage drop caused by the wiring resistance, and the positive electrode of the surface conduction electron-emitting device, By investigating a configuration in which the resistor is provided on at least one of the negative electrode, it is possible to suppress the variation in the current emitted from each electron-emitting device, and moreover, an image using such an electron source. The forming device is a device with reduced luminance variation.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の電子源の(a)等価回路、(b)電
位、(c)抵抗体抵抗値、(d)印加電圧を示す図。
FIG. 1 is a diagram showing (a) equivalent circuit, (b) potential, (c) resistor resistance value, and (d) applied voltage of an electron source of the present invention.

【図2】本発明の他の電子源の(a)等価回路、(b)
電位、(c)抵抗体抵抗値、(d)印加電圧を示す図。
FIG. 2 (a) equivalent circuit of another electron source of the present invention, (b)
The figure which shows an electric potential, (c) resistor resistance value, and (d) applied voltage.

【図3】本発明の電子源の実施態様例を示す(a)概略
構成図及び(b)抵抗体抵抗値を示す図。
FIG. 3A is a schematic configuration diagram showing an embodiment of an electron source of the present invention, and FIG. 3B is a diagram showing a resistance value of a resistor.

【図4】本発明の電子源の他の実施態様例を示す概略構
成図。
FIG. 4 is a schematic configuration diagram showing another embodiment example of the electron source of the present invention.

【図5】本発明の画像形成装置の実施態様例を示す概略
構成図。
FIG. 5 is a schematic configuration diagram showing an embodiment of an image forming apparatus of the present invention.

【図6】表面伝導形電子放出素子を示す概略構成図。FIG. 6 is a schematic configuration diagram showing a surface conduction electron-emitting device.

【図7】別の態様の表面伝導形電子放出素子を示す概略
構成図。
FIG. 7 is a schematic configuration diagram showing a surface conduction electron-emitting device of another embodiment.

【図8】従来の画像形成装置を示す概略構成図。FIG. 8 is a schematic configuration diagram showing a conventional image forming apparatus.

【図9】従来の画像形成装置を示す概略構成図。FIG. 9 is a schematic configuration diagram showing a conventional image forming apparatus.

【図10】従来の画像形成装置を示す概略構成図。FIG. 10 is a schematic configuration diagram showing a conventional image forming apparatus.

【図11】従来の電子源の(a)等価回路、(b)電
位、(c)印加電圧を示す図。
FIG. 11 is a diagram showing (a) equivalent circuit, (b) potential, and (c) applied voltage of a conventional electron source.

【図12】従来の別の態様の電子源の(a)等価回路、
(b)電位、(c)印加電圧を示す図。
FIG. 12 (a) equivalent circuit of another conventional electron source,
The figure which shows (b) electric potential and (c) applied voltage.

【図13】典型的な表面伝導形電子放出素子の電子放出
特性を示す図。
FIG. 13 is a diagram showing electron emission characteristics of a typical surface conduction electron-emitting device.

【図14】本発明の電子放出素子の製造行程の中で行わ
れる、フォーミング処理時の電圧パルスの波形を示す
図。
FIG. 14 is a diagram showing waveforms of voltage pulses at the time of forming processing, which is performed in the manufacturing process of the electron-emitting device of the present invention.

【符号の説明】[Explanation of symbols]

1、21、31 絶縁性基体 2、3、22、23、32、33 素子電極 4、25、26、34 電子放出部を含む薄膜 5、38 抵抗体 6、7、39、40 配線電極 8、35 グリッド電極 9、37 画像形成部材 10 スペーサー 24 電子放出部 36 電子通過孔 41 蛍光体 1, 21, 31 Insulating substrate 2, 3, 22, 23, 32, 33 Element electrode 4, 25, 26, 34 Thin film including electron-emitting portion 5, 38 Resistor 6, 7, 39, 40 Wiring electrode 8, 35 grid electrode 9, 37 image forming member 10 spacer 24 electron emission part 36 electron passage hole 41 phosphor

フロントページの続き (72)発明者 野村 一郎 東京都大田区下丸子3丁目30番2号キヤノ ン株式会社内 (72)発明者 三道 和宏 東京都大田区下丸子3丁目30番2号キヤノ ン株式会社内 (72)発明者 鱸 英俊 東京都大田区下丸子3丁目30番2号キヤノ ン株式会社内Front page continuation (72) Inventor Ichiro Nomura 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Kazuhiro Michi 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Hidetoshi Haru, 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc.

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】 正極側電極と負極側電極との間に、複数
の電子放出素子が電気的に並列に接続された素子列を有
する電子源において、前記一対の電極の少なくとも一方
の電極と前記電子放出素子との間に、前記電子放出素子
の各々に印加される電圧が実質的に同程度となるように
抵抗体が配置されていることを特徴とする電子源。
1. An electron source having an element array in which a plurality of electron-emitting devices are electrically connected in parallel between a positive electrode and a negative electrode, wherein at least one electrode of the pair of electrodes and the electrode An electron source, wherein a resistor is arranged between the electron-emitting device and the electron-emitting device so that the voltages applied to the respective electron-emitting devices are substantially the same.
【請求項2】 互いに抵抗値の異なる2種以上の抵抗体
が配置されている請求項1に記載の電子源。
2. The electron source according to claim 1, wherein two or more kinds of resistors having different resistance values are arranged.
【請求項3】 前記正極側及び負極側電極の各々に設け
られた取り出し端子が、前記素子列の互いに異なる側端
に配置されており、前記複数の抵抗体は、その抵抗値が
素子列両端から素子列中央に向かって低くなるように設
定されている請求項2に記載の電子源。
3. The lead-out terminals provided on each of the positive electrode side and the negative electrode side electrodes are arranged at different side ends of the element row, and the resistance values of the plurality of resistors are at both ends of the element row. The electron source according to claim 2, wherein the electron source is set to be lower from the element array toward the center of the element array.
【請求項4】 前記正極側及び負極側電極の各々に設け
られた取り出し端子が、前記素子列の同じ側端に配置さ
れ おり、前記複数の抵抗体は、その抵抗値が素子列の
取り出し端子配置端から他端に向かって低くなるように
設定されている請求項2に記載の電子源。
4. The lead terminals provided on each of the positive electrode side and the negative electrode side are arranged at the same side end of the element row, and the resistance values of the plurality of resistors are the lead terminals of the element row. The electron source according to claim 2, wherein the electron source is set to be lower from the arrangement end toward the other end.
【請求項5】 前記電子放出素子が、表面伝導形電子放
出素子である請求項1に記載の電子源。
5. The electron source according to claim 1, wherein the electron-emitting device is a surface conduction electron-emitting device.
【請求項6】 更に、前記電子放出素子から放出される
電子線を情報信号に応じて変調するための変調手段を有
する請求項1〜5のいずれかに記載の電子源。
6. The electron source according to claim 1, further comprising a modulation means for modulating an electron beam emitted from the electron-emitting device according to an information signal.
【請求項7】 請求項1〜5のいずれかに記載の電子源
と、前記電子源から放出される電子線を情報信号に応じ
て変調するための変調手段と、電子線の照射により画像
を形成する画像形成部材とを有する画像形成装置。
7. The electron source according to claim 1, a modulation means for modulating an electron beam emitted from the electron source according to an information signal, and an image is formed by irradiating the electron beam. An image forming apparatus having an image forming member to be formed.
JP7816393A 1993-04-05 1993-04-05 Electron source and image forming apparatus Expired - Fee Related JP3210129B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7816393A JP3210129B2 (en) 1993-04-05 1993-04-05 Electron source and image forming apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7816393A JP3210129B2 (en) 1993-04-05 1993-04-05 Electron source and image forming apparatus

Publications (2)

Publication Number Publication Date
JPH06295659A true JPH06295659A (en) 1994-10-21
JP3210129B2 JP3210129B2 (en) 2001-09-17

Family

ID=13654266

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7816393A Expired - Fee Related JP3210129B2 (en) 1993-04-05 1993-04-05 Electron source and image forming apparatus

Country Status (1)

Country Link
JP (1) JP3210129B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7097530B2 (en) 2001-09-07 2006-08-29 Canon Kabushiki Kaisha Electron source substrate and display apparatus using it

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7097530B2 (en) 2001-09-07 2006-08-29 Canon Kabushiki Kaisha Electron source substrate and display apparatus using it

Also Published As

Publication number Publication date
JP3210129B2 (en) 2001-09-17

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