JPH06291628A - Switch circuit - Google Patents

Abstract

PURPOSE:To provide the switch circuit for turning on/off a power source only with a momentary switch such as a toggle switch to take two states. CONSTITUTION:When a switch SW is depressed at the time of OFF, a capacitor C outputs a voltage E0. While receiving the voltage E0, a drive circuit D outputs a high voltage. When the high voltage outputted from the drive circuit D is received, a self-holding circuit B outputs a drive signal to the dirve circuit D so that the high voltage can be outputted, and the state is held. When the switch SW is depressed at such a time, the capacitor C outputs a voltage '0' after a voltage 2E0 is outputted. While receiving this voltage 2E0, a reset circuit A impresses a drive signal to the drive circuit D so that the drive circuit D can outputs a low voltage. While receiving this drive signal, the drive circuit D outputs the low voltage. Further, the drive circuit D receives the voltage '0' and outputs the low voltage.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switch that alternates between a plurality of states each time the switch is pressed.

[0002]

2. Description of the Related Art A switch circuit according to the present invention is, for example,
It is used as a push button switch (for example, a panel touch switch) for turning on / off the power source, and the power source is alternately turned on / off each time the switch is pushed.

Conventionally, as a switch circuit of this type, for example, there is one shown in FIG.

The operation of the conventional switch will be described. The main switch SW1 is a switch that is turned off when it is not used for a long period of time, and is usually attached to the back of the device.

When the main switch SW1 is turned on, the switching regulator S1 operates to supply 5V which is the operating voltage of the CPU1 to the CPU1, and the CPU1 turns on the POWER switch (panel switch) SW2 which is one of the panel keys. wait.

When the POWER switch SW2 is pressed, CP
U1 sends a Power Enable signal to the main switching power supply S2 to operate the main switching power supply S2, and a voltage is supplied to the output side. PO again
When the WER switch SW2 is pressed, the main switching power supply S2 is turned off.

[0007]

However, a toggle switch has been conventionally used for such a conventional power switch (main switch).

However, recently, it has been desired from a design point of view to turn on / off the power by a momentary switch which is the same as other operation switches (panel key switches).

An object of the present invention is to provide a switch circuit capable of turning on / off a power supply only by a momentary switch which is not a switch such as a toggle switch which takes two states.

[0010]

SUMMARY OF THE INVENTION The present invention has been made by paying attention to such a problem (deficiency) of the related art. The first voltage is applied every time an input voltage is externally loaded and the switch is pressed. In a switch circuit that transitions between a state of outputting a voltage and a state of outputting a second voltage, in the state of being output the second voltage following the switch,
A drive signal that outputs a first drive signal when the switch is pressed, and outputs a second drive signal when the switch is pressed while the first voltage is being output. A voltage output means, which follows the generation means and the drive signal generation means, receives the first drive signal and outputs the first voltage, and follows the voltage output means, and outputs the voltage output means. When it receives the first voltage, it outputs a drive signal for outputting the first voltage to the voltage output means, and when it receives the second voltage output by the voltage output means, it outputs to the voltage output means. Self-holding means for stopping the output of the drive signal for outputting the first voltage, and following the drive signal output means, receiving the second drive signal, and applying the second voltage to the voltage output means. The drive signal for output is In which it was decided to have a reset means for applying to the.

[0011]

In the switch circuit configured as described above, the drive signal generating means outputs the first drive signal when the switch is pressed while the second voltage is being output. When the switch is pressed in the state of outputting and outputting the first voltage, the second drive signal is output and then the third drive signal is output.

The voltage output means receives the first drive signal and outputs the first voltage. When the self-holding means receives the first voltage output by the voltage output means, it outputs a drive signal for outputting the first voltage to the voltage output means, and outputs the first voltage. Is maintained.

At this time, when the switch is pressed, the drive signal generating means outputs the second drive signal and then the third drive signal.
Drive signal is output. The reset means is the second
In response to the drive signal, the drive signal for causing the voltage output means to output the second voltage is applied to the voltage output means. The voltage output means receives the drive signal and outputs the second voltage. When the self-holding means receives the second voltage output by the voltage output means, the self-holding means stops the output of the drive signal for outputting the first voltage to the voltage output means.

As a result, it is possible to provide a switch circuit capable of turning on / off the power supply only by a momentary switch which is not a switch such as a toggle switch which takes two states.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing an embodiment of the present invention.

This switch circuit receives an input DC power source E0 and outputs an output voltage EOUT. First, the structure will be described. A capacitor C which is a drive signal generating means.
, Resistors R1 and R2, reset circuit A that is reset means, self-holding circuit B that is self-holding means, drive circuit D that is voltage output means, and pushbutton switch SW
Have and.

In the switch circuit configured as described above, the capacitor C is the first when the switch is pressed while the second voltage is being output.
Is output to the signal line 11 and the second voltage is output to the signal line 11 when the switch is pressed while the first voltage is being output.

The drive circuit D receives the first drive signal from the signal line 11 and outputs the first voltage to the signal line 13. The self-holding circuit B is the drive circuit D.
When the above-mentioned first voltage output from the signal line 13 is received,
The voltage E0 is received from the signal line 15 and via the signal line 12,
It outputs as a drive signal for outputting the first voltage to the drive circuit D, and the state of outputting the first voltage is maintained.

At this time, when the switch is pressed, the capacitor C outputs the second drive signal to the signal line 11. The reset circuit A receives the second drive signal from the signal line 16 and applies a drive signal for causing the drive circuit D to output the second voltage to the drive circuit D via the signal line 14. The drive circuit D receives the drive signal and outputs the second voltage to the signal line 13. When the self-holding circuit B receives the second voltage output from the drive circuit D from the signal line 13, the self-holding circuit B stops outputting the drive signal for outputting the first voltage to the drive circuit D.

The operating principle of the present invention is that the state PQ before the switch SW is pressed and the information P due to the switch SW being pressed.
From 1, it is detected whether PQ + P1 is EQ or 2 EQ, and the output voltage is changed every time the switch SW is pressed.

Further, the present invention can solve the following problems. That is, in the conventional switch method using a control circuit such as a CPU, it is necessary to supply a standby (standby ON) current to the CPU or the like when the power is turned off.
Therefore, power is consumed though it is small even when it is off. This means that when the power supply is a battery, it turns off.
Even during this period, there is a problem that the battery capacity is reduced and the usage time is shortened. Therefore, when it is not actually used for a long time, the main toggle switch is added to the back of the device. On the other hand, the present invention can solve the above-mentioned problems by configuring the circuit so that the current flowing through the switch circuit becomes zero when the output voltage is 0V.

FIG. 3 is an operation timing chart of FIG.

The operation will be described assuming that the initial condition is EOUT = 0V (second state). Before t1, the voltage is 0V.
When switch SW is pushed until time t2 at time t1 V1 =
It becomes EQ.

V2 is E at the time of t1 by the capacitor C.
It becomes Q. Here, the zener voltage VCR of the zener diode CR1 is EQ <VCR + (reset signal voltage) <2
Since it is EQ, V3 remains 0.

The output of V2 drives the drive circuit D to output the output EOUT = EQ. Since the drive current flows from the capacitor C during the period from t1 to t2, V2 decreases. At time t2, the self-holding circuit B operates with the EOUT = EQ voltage signal to change the V2 voltage to the EQ voltage.

Therefore, after t2 (after the self-holding circuit B operates), when the hand is released from the switch SW at time t3, V1 =
Although it becomes 0 V, the output EOUT = EQ voltage (first state) is continuously output because the self-holding circuit B is operating.

After that, when the switch SW is pressed again (t
4), V1 = EQ, so V2 is EQ at t4.
To 2 EQ. Since the voltage of V2 becomes 2 EQ, V2
A voltage of 2 EQ-VCR is generated at 3.

The reset circuit A operates at the voltage of V3 (2EQ-VCR), and the drive circuit D stops and V2
Is also set to 0V and the output voltage EOUT is set to 0V.
The self-holding circuit B is restored by the output 0V. Of course, even if the switch SW is kept pressed, the output remains 0V. When the switch SW is released, the initial condition EOUT = 0V is restored. When the switch SW is pressed again (t6), the state becomes t1.

When the output EOUT = 0V, V2 = 0V. Therefore, it is easy to consider a circuit in which no current flows to the reset circuit, the self-holding circuit, and the drive circuit. According to the above description, ON-OFF is alternately repeated each time SW is pressed.

Another circuit system of the embodiment is shown in FIG. The operation timing chart is shown in FIG.

To explain the configuration, a capacitor C which is a drive signal generating means, resistors R1 and R2, a reset circuit A1 which is a reset means, a self-holding circuit B1 which is a self-holding means, and a drive which is a voltage output means. Circuit D1 and
And a push button switch SW. Reset circuit A1
Has a thyristor CR2, resistors R3 and R4, and a capacitor C2. The self-holding circuit B1 has a relay K and a diode CR3. The relay K has a contact KS. The drive circuit D1 has a transistor Q1, a diode CR4, and a resistor R5.

The resistor R3 and the capacitor C2 prevent malfunction of the thyristor CR2 due to noise and set the time constant of the OFF time. The resistor R4 is for limiting the excessive current of the thyristor CR2.

The diode CR3 is V2 at the time of OFF.
= 2 EQ to prevent reverse current (C1 → KS → EQ), resistor R5 to limit excessive base current of transistor Q1 at ON time, diode CR4 to prevent reverse voltage between base and emitter of transistor Q1 at OFF time (thyristor operation) It is for. Of course, when EOUT = 0, V2 =
Since it is 0, the current from EQ is 0.

In the above switch circuit, it is the capacitor C1, the diode CR1, the resistors R1 and R2 that generate the first, second and third drive signals. That is, the state before the push button switch SW is pressed is the V2 voltage state X (0V or E ₀ ), and the pressed state YY = X + EQ is determined by the Zener diode CR1 and output as the V3 voltage.

That is, V3 = Y-VCR (Low o
r Hi). The above is summarized in Table 1.

[0036]

[Table 1]

As described above, the present invention has the following effects. That is, in the conventional switch method using a control circuit such as a CPU, it is necessary to supply a standby (standby ON) current to the CPU or the like when the power is turned off. Therefore, power is consumed though it is small even when it is off. This causes a problem that when the power supply is a battery, the battery capacity is reduced and the usage time is shortened even when the power is off. Therefore, when it is not actually used for a long time, the main toggle switch is added to the back of the device. On the other hand, according to the present invention, even though the momentary switch is used, the power consumption is zero even when the power is off, and the power can be turned on and off alternately each time the switch is pressed with a simple circuit configuration. .

In the above embodiment, the ON voltage and the OFF voltage are considered as the first voltage and the second voltage, but the present invention is not limited to this combination and other voltage values may be used. It is also possible to combine them, or to connect a plurality of switch circuits to output a plurality of voltages.

Although the self-holding means is arranged to follow the voltage output means, the present invention is not limited to this, and the driving voltage applied to the voltage output means may be received.

[0040]

As described above, according to the present invention, it is possible to provide a switch circuit capable of turning on / off the power supply only by a momentary switch which is not a switch such as a toggle switch which takes two states.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of a switch circuit according to the present invention.

FIG. 2 is a block diagram of a switch circuit according to a conventional technique.

FIG. 3 is an operation timing chart of the switch circuit according to the present invention.

FIG. 4 is a circuit diagram of another embodiment of the switch circuit according to the present invention.

5 is an operation timing chart of the circuit shown in FIG.

[Explanation of symbols]

 A ... Reset circuit B ... Self-holding circuit C ... Capacitor D ... Drive circuit CR1 ... Zener diode R1 ... Resistor R2 ... Resistor

Claims (1)

[Claims] 1. A switch circuit, which receives an input voltage from the outside and makes a transition between a state in which a first voltage is output and a state in which a second voltage is output alternately each time the switch is pressed. When the switch is pressed after the switch and the second voltage is being output, the first drive signal is output and the first voltage is output. At this time, when the switch is pressed, a drive signal generating unit that outputs a second drive signal, and a drive signal generating unit that follows the drive signal generating unit, receives the first drive signal, and outputs the first voltage When the voltage output means for outputting and the first voltage output by the voltage output means following the voltage output means are received, the voltage output means outputs a first voltage to the voltage output means.
Output a drive signal for outputting the voltage and when receiving the second voltage output by the voltage output means, stop outputting the drive signal for outputting the first voltage to the voltage output means. A reset, which follows the self-holding means and the drive signal output means, receives the second drive signal, and applies a drive signal for causing the voltage output means to output a second voltage to the voltage output means. And a switch circuit.