JPH06289477A - Data recorder - Google Patents

Abstract

PURPOSE:To prevent the imprinting of erroneous date data and to secure a copyright by inhibiting the imprinting of date data and recording data on the copyright when the date data is set to an initial value. CONSTITUTION:A signal for commanding a data pack 5 to imprint is transferred via the contact 13 of a camera 1 and the contact 16 of the data pack 5. The resetting circuit 39 of the data pack 5 detects the rising of a voltage after a battery 35 is exchanged to output a resetting signal to a CPU 36 and it drives an LCD 7 to display imprinted data. At this time, the LCD 7 does not have the segment of the year data as long as the setting of the year data and name data is not operated just after the initialization of the CPU 36 by the exchange of the battery and an LED array 47 never imprints erroneous year data. A symbolic mark showing the copyright is always displayed, and the imprinting recording is surely executed in any case.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data recording device suitable for a camera data bag.

[0002]

2. Description of the Related Art Conventionally, a data back (data recording device) for recording data such as date information and copyright information on a film has been used as a camera accessory.
It is known from Japanese Patent No. 318631. This data recording device optically records or images time information, name information of a photographer, and the like on the inside and outside of a photographing screen on a film by a light emitting diode (LED) array or the like. This data recording device automatically records necessary information on the film, which is useful for asserting copyright. The recorded data is displayed on a liquid crystal display device (LCD),
It can be confirmed by the photographer before it is recorded.

In such a data recording device, an electric circuit that constantly keeps the timekeeping operation is required. Generally, a CPU is adopted as such an electric circuit, and a crystal oscillator is connected as a clock signal oscillation source of the CPU. There is. C
The PU integrates an accurate clock signal obtained from the oscillation of the crystal oscillator, so that it is possible to set a correct time. Further, regarding the copyright information, the selective storage means capable of describing the name in the alphabet is realized by using the same CPU.

On the other hand, a reset circuit is always connected to the CPU. This reset circuit is for resetting the operation of the CPU when a new battery is connected to the data bag (data recording device) and power supply is started when the battery is replaced.

When the operation of the CPU is reset, the date and time data operates so as to start timing from a predetermined initial value. Since the initial value of this date and time data is set to a date and time (past date and time) considerably before the actual shooting time, the user himself / herself should use a well-known method so that the time will be correct when the battery is replaced. Needs to be modified.

[0006]

In the conventional data back (data recording device), even if the date and time data is reset to the initial value as described above, it is possible to print on the film. Therefore, if the user neglects the adjustment, there is a problem that the time measurement is started from the initial value (past date and time) and incorrect date and time data is recorded on the film.

Further, the reset circuit operates not only when the battery is replaced, but also when the contact cannot be recognized by the user, such as when the contact is momentarily separated from the battery due to vibration or when static electricity noise or the like enters from the outside. In some cases, the above problem may occur accidentally.

In such a situation, the external LC
Unless you notice that the time displayed in D has been reset to the past value, incorrect date and time data will be imprinted, making it impossible to claim the original copyright. Have a point.

The present invention has been made in view of the above problems, and prevents incorrect date and time data from being imprinted, and at the same time ensures that data relating to copyright is imprinted, thereby claiming copyright. The purpose is to avoid the situation where it becomes impossible.

[0010]

In order to achieve this object, the data recording apparatus according to the present invention measures time from a predetermined date and time when the power is turned on and generates time and date data, and an external operation. In a data recording device which is capable of changing date and time data by operation, a predetermined data generating means for generating predetermined data, a recording means for recording the date and time data and the predetermined data on a recording medium, and date and time data Discriminating means for discriminating whether or not the state is the initial state during time counting from a predetermined date and time, and when the discriminating means discriminates the initial state, recording of the date and time data on the recording medium by the recording means is prohibited. And has a control means for permitting recording of predetermined data.

[0011]

In the data recording device having the above structure, when the CPU in the data bag (data recording device) is reset and it is detected that the date and time data is set to the initial value, the copying of the date and time data is prohibited. Then, predetermined data such as copyright data is recorded. That is,
In addition to preventing incorrect date and time data from being imprinted, the copyright data is always imprinted to avoid a situation where copyright assertion is impossible.

[0012]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block connection diagram showing an embodiment of a data recording apparatus according to the present invention.

In FIG. 1, a data back (data recording device) 5 is mounted on the back surface of the camera 1. Camera 1
The subject image that has passed through the lens 2 mounted on the front side of the is visible on the viewfinder 3 and is exposed on the film (not shown) loaded when the release button 4 is pressed.

The data back 5 has a plurality of operation buttons 1
It has LCDs 7, 18 and 19 and an LCD 7 for displaying various operating states of the camera 1. Operation buttons 17, 1
Reference numerals 8 and 19 are for arbitrarily modifying or setting the year data and the name data displayed on the LCD 7 as described later.

FIG. 2 is a perspective view of the data back 5 shown in FIG. 1 in an open state.

A film cartridge (not shown) is loaded in the film chamber 10, and the drawn film passes through the aperture 11 and is wound on the spool 12. The subject light that has passed through the lens 2 is imaged on a film existing near the aperture 11 via a shutter (not shown).
A pressure plate 14 having a function of bringing the film into close contact with the aperture 11 is fixedly provided inside the data back 5.

A hole 15 is provided in a part of the pressure plate 14, and the data to be imprinted through the hole 15 is projected on the back surface of the film and optically recorded. A segment 42, which will be described later, is arranged at the back of the hole 15.

The imprinting signal for instructing the imprinting operation to the data back 5 is provided with a contact 13 provided on the outer periphery under the aperture 11 of the camera 1 and the pressure plate 1 of the data back 5.
4 is transmitted and received via a contact 16 provided on the lower part.

FIG. 3 is a block connection diagram showing the data back 5 and the camera 1 according to the present invention. In FIG. 3, the left side from the contact 13 corresponds to the camera 1, and the right side from the contact 16 corresponds to the data back 5.

First, the circuit portion on the camera 1 side will be described.
The operation of the circuit of the camera 1 is entirely powered by the battery 20. The control of the camera 1 is executed mainly by the CPU 24. As is well known, the CPU 24 has a subject brightness signal from the photometry circuit 21, a film sensitivity signal from the film sensitivity detection circuit 22, and a state detection circuit 2 for various switches.
3 and the status signal from 3. Switch detection circuit 2
Reference numeral 3 includes a power switch and a release switch which are interlocked with the above-mentioned release button 4, a switch which indicates an operation sequence state of the camera 1, and the like.

The CPU 24 displays the exposure conditions on the LCD 25 installed in the finder 3 or the like, and the shutter 26
Is opened and closed to perform exposure for a predetermined time, the aperture diameter of the diaphragm 27 is varied to control the amount of transmitted light, and the motor 28 is rotated to wind and rewind the film. Further, with respect to the data back 5, the transistor 29 is driven at a predetermined timing to output a copy signal via the contacts 13 and 16. One of the contacts 13 and 16 is a ground-level signal terminal.

Next, the circuit on the data back 5 side will be described below.

A battery 35 supplies power to each part including the CPU 36. Input signals of the CPU 36 include the following. First, the switch detection circuit 37 inputs the ON / OFF states of the plurality of operation buttons 17, 18, and 19 described above. By setting the operation buttons 17, 18, and 19, it is possible to modify the year data and name data to be recorded. Further, the imprinting timing signal is input via the contacts 13 and 16. The output from the switch detection circuit 37 is also transmitted to the flip-flop circuit (FF circuit) 38.

The CPU 36 has a reset circuit (RS circuit).
A reset signal is input from 39. Reset circuit 39
Monitors the voltage of the battery 35, and detects the rising of the voltage when the battery 35 is newly loaded as described above and outputs a reset signal. The output from the reset circuit 39 is also transmitted to the flip-flop circuit 38.

Further, an oscillator 44 for supplying an accurate original oscillation frequency is connected to the CPU 36, and as described above, CP
It is used as a clock for clocking the operation and time of U36. The CPU 36 controls the output device as described below.

First, the LCD 7 is driven to display the data to be imprinted. The details of the display segment on the LCD 7 will be described later,

[Outer 1] Display year, year, and name. Further, the segment 42 is caused to emit light in accordance with the above-mentioned imprinting timing signal, and imprinting of year data and name data is executed. Next, details of the operation will be described.

In the flip-flop circuit 38, the reset circuit 39 operates with the battery 35 loaded, and the CPU 3
It is a circuit for storing whether the state in which 6 is left in the initial state or in which the operation buttons 18 and 19 are simultaneously operated to correct the time is correct.

As described above, the reset circuit 39 operates not only when the battery 35 is replaced, but also when the contact that comes into contact with the battery 35 is momentarily separated or when static electricity noise enters. Reset circuit 39
Is activated, the flip-flop circuit 38 sets its output to "L" and transmits it to the CPU 36. CPU
36 determines from this "L" signal that it is still in the initial state.

As described above, the switch detection circuit 37 detects that the operation buttons 18 and 19 have been simultaneously pressed. However, operating the operation buttons 18 and 19 means that the year data has been adjusted. There is. In most cases, the user operates the operation buttons 18 and 19 after replacing the battery and adjusts the year data to the correct numerical values at that time, but if it is detected that the operation buttons 18 and 19 are operated, the set year is set. It is possible to determine that the data is correct. Therefore, when the operation buttons 18 and 19 are operated, the output of the switch detection circuit 37 is transmitted to the flip-flop circuit 38, and the output of the flip-flop circuit 38 is inverted to "H". CPU36
Recognizes this "H" signal to determine that the year has been corrected.

FIG. 4 is a block connection diagram of the switch detection circuit 37, the flip-flop circuit 38, and the reset circuit 39 shown in FIG.

In FIG. 4, the switch detection circuit 37 is provided with three operation buttons 17, 18 and 19.
Each is independently connected to the CPU 36. As described above, it is possible to change the name data by pressing the operation button 19 while pressing the operation button 17, and to change the year data by pressing the operation button 19 while pressing the operation button 18. The signals of the operation buttons 18 and 19 are N
Since it is also input to the OR gate 50, the NOR gate 50 outputs "H" only when the operation buttons 18 and 19 are simultaneously operated, that is, when the year data is changed.

The output of the NOR gate 50 is transmitted to the NAND gate 51 which constitutes the flip-flop circuit 38.

The flip-flop circuit 38 has two NANs.
The D gates 51 and 52 form a flip-flop circuit. The output of the NAND gate 51 is NA
When the "L" signal is input to the ND gate 51 and the "L" signal is input to the NAND gate 52, it is set to "H". When the NAND gate 52 receives the "H" signal and the NAND gate 51 receives the "H" signal, it is set to "L". The output of the NAND gate 51 is transmitted to the CPU 36.

The reset circuit 39 includes a comparator 53,
It is composed of a reference voltage source 56, a resistor 54, and a capacitor 55. Since the connection point between the resistor 54 and the capacitor 55 is at a low voltage during the rise of the power supply voltage immediately after the battery 35 is loaded, the output of the comparator 53 to be compared with the voltage of the reference voltage source 56 becomes "L". This output is C
It is transmitted to the PU 36 and sets the CPU 36 to the initial state. As a result, as described above, the CPU 36 operates to execute a predetermined program from the beginning.

The output of the comparator 53 is also connected to the NAND gate 52, and the output of the comparator 53 is "
Since it is L ”and the output of the NOR gate 50 is“ L ”,
The output of the NAND gate 51 becomes "H", and the CPU 36
Be transmitted to.

After a while, when the power supply voltage finishes increasing, the output of the comparator 53 is inverted to "H". The output of the comparator 53 is also connected to the NAND gate 52, and the “H” signal is applied to the NAND gate 52.
In this state, when the operation buttons 18 and 19 are simultaneously operated to change the year data, the NOR gate 50 will be
The H "signal is output to the NAND gate 51. As described above, since the" H "signal is applied to the NAND gate 52, the output of the NAND gate 51 is inverted to" L ".
It becomes a signal and is transmitted to the CPU 36.

As described above, the output of the NAND gate 51 is set to "H" by the output of the comparator 53 when the battery 35 is loaded, and is inverted to "L" by the simultaneous operation of the operation buttons 18 and 19. CPU 36 is NAN
If the output of the D gate 51 is "H", it remains in the reset state, and if it is "L", it is recognized that the year data change operation has been performed.

5 to 7 show display examples on the LCD 7.

FIG. 5 shows L immediately after the CPU 36 is initialized.
The display on CD7 is shown. In FIG. 5, the CPU 36 has just been initialized due to the replacement of the battery, and the year data and the name data have not been set. Therefore, the year data segment 41 is blank, and the name data segment 42 displays "NAME" to prompt the setting.

In this state, shooting is performed, and when the imprinting signal is generated, imprinting is performed as in this display example. Since no year data is recorded, the problem of incorrect data being recorded does not occur. In addition, in order to encourage setting of yearly data, in segment 41, "YEA
"R" may be displayed or "?" Is displayed in segments 41 and 42. ? ? ? "Or"? ? ? ? It is also possible to display “” to call further attention.

Also in the name data segment 42, "NAME" may be displayed in a blinking manner so as to prompt the setting of the name data, and the name data may not be recorded when a copy signal is generated.

FIG. 6 shows the contents displayed on the LCD 7 when only the name data "GOTO" is set.
In this figure, year data has not been set yet, so
The segment 41 is blank, and when shooting is performed, recording is performed as in this display example.

FIG. 7 shows a display on the LCD 7 in a state where all the year data (1993) is set. In FIG. 7, all the display segments 40 to 42 perform the original correct display.

Common to FIGS. 5 to 7, a symbol mark indicating that it is a copyright

[External 1] is always displayed using the segment 40, and is always imprinted and recorded in any state.
FIG. 8 is a flowchart showing a processing routine by the CPU 24 shown in FIG. This routine is repeatedly executed while power is being supplied to the CPU 24.

When the routine starts, in step S1, the photometric signal from the photometric circuit 21 and the sensitivity detection circuit 2 are detected.
Take in the sensitivity signal from 2. In step S2, both are calculated to calculate a shutter time and an aperture value which are proper exposure conditions. In step S3, the LCD 25 displays the exposure conditions determined above and the photographing mode set by the switch state detection circuit 23. Step S4
At, it is determined whether or not the release button 4 has been pressed via the switch state detection circuit 23. If it has not been pressed, the process returns to step S1 to repeat the above process. When it is determined in step S4 that the release button 4 has been pressed, the process proceeds to step S5.

In step S4, in addition to the determination as to whether or not the release button 4 has been pressed, the setting state of the data back 5 is determined and the mode for prohibiting the imprinting of date and time data is set. It is also possible to prohibit the photographing by returning to step S1 without performing the release operation after step S5.

In step S5, the transistor 29
(See FIG. 3) is turned on for a certain period of time, a timing signal is output to the data back 5 via the contacts 13 and 16, and a data copying operation is instructed. In step S6, the reflecting mirror (not shown) is raised and retracted from the photographing optical path. In step S7, the diaphragm 27 is controlled to have a predetermined diaphragm opening. In step S8, the shutter 26 is opened and closed to control the exposure of the film. In step S9, the exposure operation is completed.
(See FIG. 3) is rotated forward to feed the film and urge the mechanism.

Since the exposure operation has completed one cycle as described above, the process returns to step S1 and the above processing is repeated.

FIG. 9 is a flow chart showing an example of a processing routine by the CPU 36 shown in FIG. This routine is repeatedly executed while power is being supplied to the CPU 36, but the function of counting the output of the oscillator 44 and updating the year data is omitted for ease of explanation. As is well known, they will be described as being always performed behind the routine.

When the routine starts, it is determined in step S15 whether the operation button 18 is pressed.
If the operation button 18 has been pressed, the process proceeds to step S16, and if the operation button 18 has not been pressed, the process proceeds to step S18.

In step S16, it is determined whether the operation button 19 is pressed. If the operation button 19 has been pressed, the process proceeds to step S17, and if the operation button 19 has not been pressed, the process proceeds to step S18. In step S17, since the operation buttons 18 and 19 are simultaneously operated, the year data correction mode is executed. At this time, the flip-flop circuit 38 outputs "L" to the CPU 36 at the same time as described with reference to FIG.

In step S18, it is determined whether the operation button 17 is pressed. If the operation button 17 has been pressed, the process proceeds to step S19, and if the operation button 17 has not been pressed, the process proceeds to step S21.

In step S19, it is determined whether the operation button 19 is pressed. If the operation button 19 has been pressed, the process proceeds to step S20, and if the operation button 19 has not been pressed, the process proceeds to step S21. In step S20, since the operation buttons 17 and 19 are operated at the same time, the name data correction mode is executed.

In step S21, the signal from the flip-flop circuit 38 is read. Flip-flop circuit 3
When it is determined that the signal from 8 is the “H” signal, that is, when it is determined in step S17 that the year data is adjusted by the simultaneous operation of the operation buttons 18 and 19, the year by the segment 41 is determined. The display is performed (step S22), and the process proceeds to step S24. When the signal from the flip-flop circuit 38 is determined to be the "L" signal, it is determined that the year data has not been adjusted, so the segment 41 is turned off (step S23), and the process proceeds to step S24. To do.

In step S23, the segment 4
It is also possible to give a warning to the photographer, instead of turning off 1. As a warning, a warning by sound or "DATE"
The blinking display of the character string is preferable. Further, in step S4 (FIG. 8) described above, when the setting state of the data back 5 is judged and the mode for prohibiting the imprinting of the date and time data is set, the release operation after step S5 is not performed and the step is performed. When the process returns to S1 and photography is also prohibited, it is preferable to inform the camera 1 of the setting state of the data back 5 in step S23.

In step S24, it is determined from the signal state of the contact 16 whether or not the photographing timing signal is input from the camera 1. When the imprinting timing signal is not generated, the process returns to step S15 and the above process is repeated. When the imprinting timing signal is generated, the LED array 47 is driven based on the date and time data, the data is imprinted on the film surface (step S25), the process returns to step S15, and the above process is repeated.

As a result of the above processing, unless the year data modification by the operation buttons 18 and 19 is performed after the CPU 36 is reset, the routine of step S23 is executed, so that the year data is not displayed by the segment 42. This is not done, and moreover, the LED array 47 does not copy wrong year data. Also at this time, a symbol mark indicating that it is copyright

[External 1] is always displayed using the segment 40, and is always imprinted and recorded in any state.
In the embodiment, a still camera using a silver salt film is taken as an example, but the recording method is not limited to this, but a still camera or a video camera using a magnetic recording medium such as a tape or a disk, a semiconductor memory such as an IC card, or the like. Although it is different, it can be applied to an apparatus capable of recording date and time data and character string data in a medium.

[0059]

As described above, according to the data recording device of the present invention, the CPU in the data bag (data recording device)
When it is detected that the date and time data has been reset to the initial value, the copying of the date and time data is prohibited,
Since the specified data such as the copyright data is recorded, it is possible to prevent the incorrect date and time data from being copied, and the data related to the copyright is always copied to make it impossible to claim the copyright. It becomes possible to avoid the situation where

[Outer 1]

[Brief description of drawings]

FIG. 1 is a perspective view showing an embodiment of a data recording device according to the present invention.

FIG. 2 is a perspective view showing an embodiment of a data recording device according to the present invention.

FIG. 3 is a block connection diagram showing an embodiment of a data recording device according to the present invention.

FIG. 4 is a block connection diagram showing an embodiment of a data recording device according to the present invention.

FIG. 5 is a front view showing an embodiment of a data recording device according to the present invention.

FIG. 6 is a front view showing an embodiment of a data recording device according to the present invention.

FIG. 7 is a front view showing an embodiment of a data recording device according to the present invention.

FIG. 8 is a flowchart showing an embodiment of a data recording device according to the present invention.

FIG. 9 is a flowchart showing an embodiment of a data recording device according to the present invention.

[Explanation of symbols]

 1 Camera 2 Lens 3 Finder 4 Release Button 5 Data Back 7 LCD 10 Film Chamber 11 Aperture 12 Spool 13 Contact 14 Pressure Plate 16 Contact 17 Operation Button 18 Operation Button 19 Operation Button 20 Battery 21 Photometry Circuit 22 Film Sensitivity Detection Circuit 23 Switch Detection Circuit 23 Switch State Detection Circuit 24 CPU 25 LCD 26 Shutter 28 Motor 29 Transistor 35 Battery 36 CPU 37 Switch Detection Circuit 38 Flip-Flop Circuit 39 Reset Circuit 40 Display Segment 41 Year Data Segment 42 Name Data Segment 44 Oscillator 47 LED Array 50 NOR Gate 51 NAND gate 52 NAND gate 53 Comparator 54 Resistor 55 Capacitor 56 Reference voltage source

Claims (5)

[Claims] 1. A data record having time keeping means for counting time from a predetermined date and time when power is turned on and generating date and time data, and externally operable change means for changing the date and time data by the operation. In the device, a predetermined data generating unit that generates predetermined data, a recording unit that records the date and time data and the predetermined data in a recording medium, and a state of the date and time data is an initial state during time counting from the predetermined date and time. Discriminating means for discriminating whether or not it is the initial state by the discriminating means, prohibiting recording of the date and time data on the recording medium by the recording means, and permitting recording of the predetermined data. And a control means for controlling the data recording apparatus. 2. The determination means generates an initial state signal indicating the initial state when the power is turned on, and a non-initial state signal indicating a state other than the initial state when the changing means is operated. The data recording device according to claim 1, wherein: 3. The data recording device according to claim 1, wherein the predetermined data is copyright data. 4. The apparatus further comprises warning means for performing a warning operation indicating that the date / time data is not recorded on the recording medium when the judging means judges that the initial state is set. The data recording device described in. 5. A communication is possible with a camera provided with an exposing means for exposing subject light to the recording medium, and when the determining means determines that the initial state is set, the exposing operation of the exposing means is prohibited. The data recording apparatus according to claim 1, further comprising: a prohibiting unit that controls the operation.