JPH06284793A - Stepping motor driving gear - Google Patents

Abstract

PURPOSE:To reduce current consumption by generating an output pulse a pulse generating circuit by setting a value accordant with the second duty ratio smaller than the first duty ratio in a duty register. CONSTITUTION:When driving a stepping motor 2 is started, a drive pulse is generated by a control part 3, simultaneously with setting a value of adding excitation period X and a rotational period Y to drive pulse generating timing relating to registers OCR1, OCR2, and when the rotational period Y is elapsed, the timing set to the OCR2 is obtained. Here the second interruption means OC12 sets a value T in accordance with the second duty ratio smaller than the first duty ratio, thereby generating a duty register of a pulse generating circuit 8, an output pulse of pulse width T1. Accordingly, the motor can be driven by current consumption smaller than the rotational period Y. Successively when the excitation period X is elapsed, the timing set to the first register OCR1 is obtained. Accordingly, current consumption can be reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a stepping motor drive device. More specifically, the present invention relates to a stepping motor drive device suitable for driving a stepping motor of an infusion pump used in the medical field.

[0002]

2. Description of the Related Art Recently, an infusion pump has been used in the medical field to infuse a patient. The infusion pump has a pump head driven by a stepping motor to mechanically act on an infusion tube connected to the drug bag to infuse the solution.

Conventionally, a stepping motor of an infusion pump has been driven by a driving device shown in FIG. 7, for example. The drive device includes a control unit 53 that executes software described below, a pulse generation circuit 55, and a gate circuit 59. The pump head unit 51 is further driven by driving the stepping motor 52.

The control unit 53 is a free running
Counter FRC, output compare register OCR1, and output compare register OCR
2 and output compare register flag OC
And RFLG. FRC, OCR1 and OCR2 have 16 bits, and OCRFLG has 8 bits. The FRC automatically increments the count every 500 nsec independently of the execution of the software of the control unit 53, and
Starting from, when FFFF is displayed in hexadecimal, the next 5
It returns to 0 again after 00nsec. The OCR1 and OCR2 can write and read arbitrary values from 0 to FFFF independently of each other by the above software. The software of the control unit 53 has two output functions as an interrupt function for the main processing.
Generates compare interrupts OCI1 and OCI2. OC
I1 occurs when the value of FRC becomes equal to the value of OCR1, while OCI2 occurs when the value of FRC becomes equal to the value of OCR2. OCRFLG represents that an interrupt of OCI1 is generated when bit 0 is 1 and an interrupt of OCI2 is generated when bit 1 is 1. In addition, OCRFL
Although each bit of G can be reset to 0 by the main processing, setting each bit to 1 makes OCI1 and OCI
This is possible only by the hardware of the control unit 53 when CR2 occurs. As will be described later, the control unit 53 outputs drive pulses of four systems (shown in FIGS. 8A, 8B, 8C, and 8D) to drive the stepping motor 52.

Further, the pulse generation circuit 55 has a built-in hardware counter counter_pwm and a duty register duty_reg. The hardware counter counter_pwm is 125 nsec.
It is incremented every time and cleared every cycle of the output pulse. The duty register duty_reg contains
The controller 53 sets the numerical value S indicating the high level period of one pulse. This pulse generation circuit 55 is shown in FIG.
As shown in, the counter is counted at 125 nsec intervals.
Each time r_pwm is counted up (S23), the value of the counter counter_pwm is compared with the value of the duty register duty_reg (S24). The value of the counter counter_pwm is the duty register d
While it is smaller than the value of uty_reg, a high level (logic "1") is output as an output pulse (S26). On the other hand, if the value of the counter counter_pwm is greater than or equal to the value of the duty register duty_reg, a low level (logic "0") is output as an output pulse (S25). Therefore, as shown in FIG. 8 (e), an output pulse whose frequency is higher than that of the drive pulse (pulse width of Ts in the high level period) is generated with a duty ratio according to the numerical value S set in the duty register duty_reg. can do.
The numerical value S is set so that a current required to rotate the stepping motor 52 one step can be obtained by the signal from the control unit 53 shown in FIG. 7.

The gate circuit 59 includes four AND circuits (A
ND gate) 59a, 59b, 59c, 59d,
As shown in FIGS. 8 (f), (g), (h), and (i), a signal representing the product of the drive pulse from the control unit 53 and the output pulse from the pulse generation circuit 55 is output to the stepping motor 52. To do. As a result, the stepping motor 52 is driven over the excitation period of the drive pulse.

Specifically, as shown in FIG. 9, the control unit 5
3 is the process of main processing by software, first,
It is checked whether the stepping motor 52 is started (S14). When starting the stepping motor 52, a drive pulse width X that determines the rotation speed of the stepping motor 52 is obtained from a storage unit (not shown) (S1).
5). Next, in step S16, the numerical value S is set in the duty register duty_reg in the pulse generation circuit 55 (duty_reg = S). As a result, the pulse generation circuit 55 starts to generate an output pulse having a pulse width Ts.
Next, in step S17, the control unit 53 causes the control unit 53 shown in FIGS.
Begins to output the drive pulse shown in FIG.
(It is assumed that FRC = f0 at the output start timing). Then, set OCR1 = f0 + X,
The interrupt process OCI1 is generated after a period X from the start timing of the first drive pulse output. After this,
The drive pulse output is the interrupt processing OCI shown in FIG.
Done in 1.

When the interrupt OCI1 occurs, the control unit 53 immediately outputs the drive pulse shown in FIGS. 8A to 8D in step S21 (it is assumed that FRC = fn at the timing of generation of the interrupt OCI1). ). continue,
OCR1 = fn + X is set (S22), and the interrupt process ends. Due to the setting of the OCR1, the interrupt OCI1 is generated next after a period X from the previous interrupt. In this way, the drive pulse having the pulse width X can be generated.

In the main process, as shown in FIG. 9, it is checked whether the stepping motor 52 is stopped (S19). When stopped, the generation of OCI1 is prohibited, and the generation of pulses is stopped by setting the duty register of the pulse generation circuit 55 to zero (duty_reg = 0) (S20). This stops the stepping motor 52.

[0010]

By the way, the stepping motor 52, as shown in FIG. 8, is a period from the input of a drive pulse to the step of rotating by one step until it stops with a holding force (substantially 1 step). (Rotating period) I,
It rotates by repeating the period (substantially stopped period) II from the stop with holding force until the next drive pulse is input. Generally, the current required for the stepping motor 52 in the period II is smaller than that in the period I.

However, in the above conventional stepping motor driving device, the duty ratio of the output pulse of the pulse generating circuit 55 is always constant, that is, the pulse width Ts is constant according to the numerical value S set in the duty register duty_reg. Therefore, there is a problem that an excessive amount of current is applied during the period II of the two periods I and II. Therefore, the current consumption is large.

SUMMARY OF THE INVENTION An object of the present invention is to provide a stepping motor drive device capable of reducing current consumption by limiting the flow of an electric current to a stepping motor more than necessary.

[0013]

In order to achieve the above object, the present invention has first and second registers in which a timing for starting interrupt processing is set, and the interrupt processing is performed at a predetermined timing. , Which has a control unit that generates a drive pulse having a pulse width that determines the rotation speed of the stepping motor and a duty register, and outputs a higher frequency than the drive pulse with a duty ratio according to the numerical value set in the duty register. In a stepping motor drive device including a pulse generation circuit that generates a pulse, and a gate circuit that applies a product of a drive pulse of the control unit and an output pulse of the pulse generation circuit to a stepping motor, The excitation period represented by the pulse width and the stepping motor actually makes one step within the excitation period. At the timing set in the storage unit that stores the rotation period of rotation and the first register,
A numerical value corresponding to the first duty ratio required for the rotation period is set in the duty register of the pulse generation circuit to cause the pulse generation circuit to generate an output pulse at the first duty ratio, and A value obtained by causing the control section to generate the drive pulse, and at the same time as generating the drive pulse, adding the excitation period and the rotation period to the drive pulse generation timing (FRC value) for the first and second registers, respectively. A first interrupt means for setting
At the timing set in the second register, a numerical value corresponding to a second duty ratio smaller than the first duty ratio is set in the duty register of the pulse generation circuit, and the pulse generation circuit is set to the above value. It is characterized by having a second interruption means for generating an output pulse with a second duty ratio.

[0014]

First, it is assumed that the timing set in the first register is reached and the first interrupt means operates. At this time, the first interrupt means sets a numerical value corresponding to the first duty ratio (duty ratio required for the rotation period) in the duty register of the pulse generation circuit, and causes the pulse generation circuit to output the first value. Generate an output pulse with a duty ratio. Further, it causes the control section to generate a drive pulse. Since the drive pulse is generated (within the excitation period),
The stepping motor is driven via the gate circuit.
At this time, a sufficient current for actually rotating the stepping motor is supplied according to the first duty ratio.
Further, the first interrupt means sets a value obtained by adding the excitation period and the rotation period to the drive pulse generation timing (FRC value) in the first and second registers at the same time as the generation of the drive pulse. To do.

When the rotation period elapses from the timing when the drive pulse is generated, the timing is set in the second register (at this point, the stepping motor rotates one step and has already stopped with a holding force. .). At this time, the second interruption means is the first interruption means.
A value corresponding to a second duty ratio (duty ratio required during a substantially stopped period) that is smaller than the duty ratio of the pulse generator circuit is set in the duty register of the pulse generator circuit, An output pulse is generated with the second duty ratio. Since it is within the excitation period, current is supplied to the stepping motor through the gate circuit. At this time, according to the second duty ratio, for example, the minimum necessary current for maintaining the phase is supplied. Therefore, the current consumption is reduced as compared with the conventional case.

When the excitation period elapses from the timing when the drive pulse is generated, the timing is set in the first register. Therefore, the first interrupt means operates. In this way, the processing by the first and second interruption means is repeated, and the stepping motor is driven step by step.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The stepping motor drive device of the present invention will be described in detail below with reference to embodiments.

FIG. 1 shows a block configuration of a stepping motor driving device of one embodiment. This stepping motor drive device includes a control unit 3 that executes software described below, a pulse generation circuit 8, and a gate circuit 10. The pump head unit 1 is further driven by driving the stepping motor 2.

The control unit 3 includes a free running counter FRC and an output compare register O.
CR1 and output compare register OCR2
And output compare register flag OCR
And FLG. FRC, OCR1 and OCR2 are 1
6 bits and OCRFLG have 8 bits. The FRC automatically increases the count every 500 nsec independently of the execution of the software of the control unit 3, and when it starts from 0 and becomes FFFF in hexadecimal notation, the next 50
It returns to 0 again after 0 nsec. The OCR1 and OCR2 can write and read arbitrary values from 0 to FFFF independently of each other by the above software. The software of the control unit 3 generates two output compare interrupts OCI1 and OCI2 as an interrupt function for the main processing. OCI1
Occurs when the value of FRC becomes equal to the value of OCR1, while OCI2 occurs when the value of FRC becomes equal to the value of OCR2. OCRFLG represents that an interrupt of OCI1 is generated when bit 0 is 1 and an interrupt of OCI2 is generated when bit 1 is 1. Although each bit of OCRFLG can be reset to 0 by the main processing, setting each bit to 1 is OCI1, OCR.
2 is possible only by the hardware of the control unit 3. As will be described later, the control unit 3 drives the stepping motor 2 in order to drive four system drive pulses (see FIG.
(shown in (a), (b), (c), (d)) is output.

Further, the pulse generation circuit 8 has a hardware counter counter_pwm and a duty register duty_reg built therein. The hardware counter counter_pwm is counted up every 125 nsec and cleared every cycle of the output pulse. The duty register duty_reg has a numerical value S indicating a high level period of one pulse by the control unit 3.
(Or T) is set. This pulse generation circuit 8 is similar to that shown in FIG. 11, every time the counter counter_pwm is counted up at intervals of 125 nsec.
(S23), the value of the counter counter_pwm is compared with the value of the duty register duty_reg (S23).
24). While the value of the counter counter_pwm is smaller than the value of the duty register duty_reg,
Outputs a high level (logic "1") as an output pulse (S
26). On the other hand, if the value of the counter counter_pwm is greater than or equal to the value of the duty register duty_reg, a low level (logic “0”) is output as an output pulse.
(S25). Therefore, the duty register duty_
As shown in FIG. 2 (e), with the duty ratio according to the numerical value S (or T) set in reg, as shown in FIG.
(Or Tt)) can be generated. The numerical value S
Corresponds to the duty ratio required in the rotation period I in which the stepping motor 2 is actually rotated by one step. On the other hand, the numerical value T corresponds to the duty ratio required in the period II in which the stepping motor 2 is stopped with holding force.

The gate circuit 10 includes four AND circuits (A
ND gate) 10a, 10b, 10c, 10d,
As shown in FIGS. 2 (f), (g), (h), and (i), a signal representing the product of the drive pulse from the control unit 3 and the output pulse from the pulse generation circuit 8 is output to the stepping motor 2. To do. As a result, the stepping motor 2 is driven over the excitation period of the drive pulse, and the pump head unit 1 connected to the stepping motor 2 is driven.
To drive.

This stepping motor drive device operates as follows according to the flow shown in FIGS. 3, 4, and 5. In advance, the pulse width (excitation period) X of the drive pulse that determines the rotation speed of the stepping motor, and the rotation period required for the stepping motor 2 to actually rotate one step and stop with holding force (add a little margin) Y) is stored in a storage unit (not shown).

First, the control unit 3 checks whether or not the stepping motor 2 is started during the main processing (S1). When starting, the excitation period X and the rotation period Y are read from the storage unit (S2). Also,
Duty register duty_re of the pulse generation circuit 8
A numerical value S corresponding to the first duty ratio (duty ratio required for the rotation period) is set to g (duty_reg =
S). This causes the pulse generation circuit 8 to generate an output pulse having a pulse width Ts (S3). At the same time, in step S4, the first drive pulse shown in FIGS. 2A to 2D is generated (it is assumed that FRC = f0 at the output start timing of this drive pulse). As a result, the driving of the stepping motor 2 is started via the gate circuit 10. At the same time that the drive pulse is generated, the control unit 3 outputs the drive pulse generation timing to the first register OCR1 and the second register OCR2 in step S5.
(FRC = f0), the excitation period X and the rotation period Y are respectively
Is set (OCR1 = f0 + X, OCR2
= F0 + Y). Then, interrupt processing OCI1, OCI2
Is made possible. After that, the output of the driving pulse is performed by the interrupt processing OCI1 and OCI2 shown in FIGS.

When the rotation period Y elapses from the timing f0 at which the first drive pulse is generated, the timing set in OCR2 is reached (at this point, the stepping motor has rotated one step and has already stopped with a holding force. .). At this time, as shown in FIG. 5, the second interruption means OCI2 sets the numerical value T corresponding to the second duty ratio smaller than the first duty ratio in the duty register duty_reg of the pulse generation circuit 8.
(S12). As a result, the pulse width T
Generate an output pulse of t (<Ts). Therefore, it is possible to drive the stepping motor with a current consumption smaller than that in the rotation period Y, for example, a minimum current for maintaining the phase. The control unit 3 prohibits the OCI2 so that the second interrupt process does not occur again within the excitation period X (S13).

Subsequently, when the excitation period X elapses from the timing f0 at which the first drive pulse is generated, the timing set in the first register OCR1 is reached. Therefore, the first interrupt processing OCI1 shown in FIG. 4 is started. At this time, the first interruption means OCI1
A numerical value S corresponding to the duty ratio (duty ratio required in the rotation period) of is set in the duty register duty_reg of the pulse generation circuit 8 (S8). This causes the pulse generation circuit 8 to generate an output pulse having a pulse width Ts. At the same time, in step S9, the control unit 3 generates the next drive pulse following the first drive pulse (the FRC = f at the output start timing of this drive pulse).
Suppose it was n. ). Since it is within the excitation period X,
The stepping motor 2 is driven via the gate circuit 10. At this time, it is possible to supply a sufficient current for the stepping motor 2 to actually rotate according to the first duty ratio. Also, the first interruption means OC
At the same time that the next driving pulse is generated, the I1 outputs the first register OCI1 and the second register in steps S10 and S11.
Pulse generation timing for the register OCI2 of
A value obtained by adding the excitation period X and the rotation period Y to (FRC = fn) is set (OCI1 = fn + X, OCI2 = fn +
Y).

Further, when the rotation period Y elapses from the timing fn at which the next driving pulse is generated, the timing set in the second register OCR2 is reached (at this point, the stepping motor rotates one step and the holding force is increased). Has already stopped.). So again,
The second interrupt processing OCI2 shown in FIG. 5 is started. That is, the second interrupt means OCI2 outputs the numerical value T corresponding to the second duty ratio smaller than the first duty ratio to the duty register d of the pulse generation circuit 8.
It is set to uty_reg (S12). As a result, the pulse generator 8 is caused to generate an output pulse having a pulse width Tt (<Ts). Therefore, it is possible to drive the stepping motor with a current consumption smaller than that in the rotation period Y, for example, a minimum current for maintaining the phase.

After that, the operation described above is repeated to drive the stepping motor 2 step by step.

In the main process, as shown in FIG. 3, it is checked whether the stepping motor 2 is stopped (S6). To stop, OCI1, OC
The generation of I2 is prohibited, and the duty register duty_reg of the pulse generation circuit 8 is set to zero (duty_reg).
The pulse generation is stopped by setting reg = 0) (S7). As a result, the stepping motor 2 is stopped and the pump head unit 1 is stopped.

Incidentally, as shown in FIG. 1, a step operation monitor section for detecting whether the stepping motor 2 is rotating (moving) or stopped and feeding back information indicating the detection result to the control section 3. 9 may be provided. In this case, the rotation period Y can be sequentially detected in the main processing, the first interrupt processing, and the second interrupt processing shown in FIGS. 3, 4, and 5. Therefore, the control unit 3
The rotation period Y can be known more accurately, and by using the rotation period Y obtained accurately, it is possible to shorten the period in which an unnecessarily large amount of current is passed through the stepping motor 2. Therefore, the current consumption can be further reduced.

FIG. 6 shows an example of an infusion pump device provided with the stepping motor drive device.

This infusion pump device comprises a CPU (central processing unit) 3 as a control unit, a pump head unit 1, a stepping motor 2, a motor drive circuit 8'as a pulse generation circuit and a gate circuit, and a motor. The rotation detection circuit 9'and a RAM (random access
The memory) 119 is provided.

The RAM 119 temporarily stores various data used for the arithmetic processing of the CPU 3. In particular, in this example, the pulse width (excitation period) X of the drive pulse that determines the rotation speed of the stepping motor and the rotation period Y required for the stepping motor 2 to actually rotate one step and stop with holding force are stored. can do.

The pump head 1 has a mechanism for pressing a predetermined infusion tube in a linear peristaltic manner by the operation of the stepping motor 2 and is driven by a motor drive circuit 8'on the basis of a signal from the CPU 3. It At this time, the amount of liquid to be sent (for example, the unit flow rate was 1 ml)
Is detected by the motor rotation detection circuit 9'based on the rotation angle of the stepping motor 2. CPU3 is A / D
The operation of the pump head unit 1 is controlled based on the output of the motor drive circuit 8'received via the converter 116 and the output of the motor rotation detection circuit 9 '.

The CPU 3 has a ROM (program section) 1
According to the program stored in 20, the operation of the whole infusion pump device is controlled. ROM 120 is shown in FIG.
The algorithm for executing the main process, the first interrupt process, and the second interrupt process shown in FIGS. 4 and 5 is stored, and as a result, the CPU 3 can execute each of the above processes. . Therefore, the current consumption can be reduced as compared with the case where the stepping motor 2 is driven at a constant duty ratio over the entire excitation period.

In addition, each element in the drawing is provided in this infusion pump device.

The power supply circuit 115 supplies power to the entire infusion pump device.

The alarm / warning indicator 102 receives a signal detected by a detector or the like, which will be described later, via the CPU 3, and thereby displays all alarm and warning messages.

The operation lamp 105 indicates by a lamp that the infusion pump device is in the alarm, infusion, and stopped states.

The programming display unit 103 displays all information relating to the infusion, such as the infusion flow rate input to the infusion injection pump device, the planned infusion volume, and the infused volume.

The alarm / warning sound buzzer drive circuit 114 is
When this infusion pump device enters an alarm state, a buzzer sound is generated to notify the doctor or nurse.

The bubble detection circuit 113 detects by a sensor whether or not there are bubbles exceeding a specified amount in the infusion tube.

The battery voltage detection circuit 112 detects the voltage of the built-in battery (storage battery) and outputs the detected voltage value to the CPU 3.

The door open detection circuit 106 detects whether the door of the infusion pump device is in an open state.
When the door is inadvertently opened during infusion, the CPU 3 stops the pump head unit 1 by a signal from the door opening detection circuit 106 and issues an alarm. The door of the infusion pump is opened and closed when the infusion tube is set on the pump head 1.

The A / D conversion circuit 116 converts analog signals such as bubble detection level and battery voltage level into digital signals and outputs them to the CPU 3.

The upstream blockage detector 107 detects a pressure drop state due to an abnormality (for example, clogging of a chemical solution filter) between the chemical solution bag and the pump head portion 1.

The downstream blockage detector 111 has an abnormality between the pump head 1 and the patient (eg blockage of an infusion tube).
The pressure rise state due to is detected.

The key panel 104 includes numerical keys for inputting the infusion flow rate and the planned infusion volume, control keys for assisting the input, a start key and a stop key for starting and stopping the pump drive section. , Has a call key for displaying the infused amount. The operator can enter the infusion flow rate and the planned infusion volume with the numerical keys.

The panel lock switch 117 is a switch for turning off various keys and a power switch,
This infusion pump device can be set to be unintentionally operated by anyone other than a doctor or a nurse.

[0049]

As is clear from the above, the present invention is
First, the timing to start interrupt processing is set,
It has a second register, a control unit for generating a drive pulse having a pulse width that determines the rotation speed of the stepping motor at a predetermined timing by the interrupt processing, and a duty register, which is set in the duty register. A pulse generation circuit that generates an output pulse whose frequency is higher than that of the drive pulse with a duty ratio according to a numerical value, and the product of the drive pulse of the control unit and the output pulse of the pulse generation circuit are applied to the stepping motor. In a stepping motor drive device including a gate circuit, a storage unit that stores an excitation period represented by the pulse width of the drive pulse and a rotation period in which the stepping motor actually rotates one step within the excitation period, and First
A value corresponding to the first duty ratio required in the rotation period is set in the duty register of the pulse generation circuit at the timing set in the register of the pulse generation circuit, and the first duty ratio is set in the pulse generation circuit. A first interrupt for generating the output pulse, generating the drive pulse in the control section, and adding the excitation period and the rotation period to the first and second registers at the same time when the drive pulse is generated. And a value corresponding to a second duty ratio smaller than the first duty ratio, at the timing set in the second register, and in the duty register of the pulse generating circuit to generate the pulse. Since the circuit has the second interrupt means for generating the output pulse with the second duty ratio, the rotation period is within the excitation period. After There has passed, it is possible to suppress the current flowing to the stepping motor to a minimum level. Therefore, the current consumption can be reduced as compared with the conventional case.

[Brief description of drawings]

FIG. 1 is a diagram showing a schematic configuration of a stepping motor drive device according to an embodiment of the present invention.

FIG. 2 is a diagram showing an output waveform of the stepping motor driving device.

FIG. 3 is a diagram showing an operation flow of the stepping motor drive device.

FIG. 4 is a diagram showing an operation flow of the stepping motor drive device.

FIG. 5 is a diagram showing an operation flow of the stepping motor drive device.

FIG. 6 is a diagram showing a schematic configuration of an infusion pump device provided with the stepping motor drive device.

FIG. 7 is a diagram showing a schematic configuration of a conventional stepping motor drive device.

FIG. 8 is a diagram showing an operation flow of the stepping motor drive device.

FIG. 9 is a diagram showing an operation flow of the stepping motor drive device.

FIG. 10 is a diagram showing an operation flow of the stepping motor drive device.

FIG. 11 is a diagram showing an operation flow of the stepping motor drive device.

[Explanation of symbols]

 1 Pump Head Section 2 Stepping Motor 3 Control Section 8 Pulse Generation Circuit 9 Step Operation Monitoring Section 10 Gate Circuit

Claims (1)

[Claims] 1. A drive pulse having a pulse width for determining a rotation speed of a stepping motor is generated at a predetermined timing by the interrupt processing, the first and second registers having a timing for starting the interrupt processing set therein. A pulse generator circuit for generating an output pulse having a higher frequency than the drive pulse at a duty ratio according to the numerical value set in the duty register, and a drive pulse for the control unit. A stepping motor drive device comprising: a gate circuit that applies a product to an output pulse of the pulse generation circuit and applies the stepping motor to the stepping motor, wherein an excitation period represented by a pulse width of the drive pulse and the stepping motor within the excitation period. A storage unit that stores a rotation period during which the actual rotation is performed by one step; A value corresponding to the first duty ratio required in the rotation period is set in the duty register of the pulse generation circuit at the timing set in the star, and the pulse generation circuit is set to the first duty ratio with the first duty ratio. A first interrupt means for generating an output pulse, generating the drive pulse in the control section, and adding the excitation period and the rotation period to the first and second registers at the same time when the drive pulse is generated. And at the timing set in the second register, a value corresponding to a second duty ratio smaller than the first duty ratio is set in the duty register of the pulse generation circuit to set the pulse generation circuit. A stepping motor drive having a second interruption means for generating an output pulse at the second duty ratio Location.