JPH06284560A - System anomaly detection method - Google Patents
System anomaly detection methodInfo
- Publication number
- JPH06284560A JPH06284560A JP6512193A JP6512193A JPH06284560A JP H06284560 A JPH06284560 A JP H06284560A JP 6512193 A JP6512193 A JP 6512193A JP 6512193 A JP6512193 A JP 6512193A JP H06284560 A JPH06284560 A JP H06284560A
- Authority
- JP
- Japan
- Prior art keywords
- pulses
- zero point
- counter
- voltage
- period
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Landscapes
- Measuring Frequencies, Analyzing Spectra (AREA)
- Testing Electric Properties And Detecting Electric Faults (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、系統電圧の位相跳躍や
周波数異常等の系統異常を正確に検出することができる
系統異常の検出方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a system abnormality detecting method capable of accurately detecting system abnormalities such as phase jump of system voltage and frequency abnormality.
【0002】[0002]
【従来の技術】例えば低圧配電線や高圧配電線に太陽電
池等の分散型電源システムが連系された系統において
は、系統が停止したときに分散型電源システムが単独運
転状態になり、系統を配電用遮断器等により停止したに
もかかわらず系統に電圧が残る逆充電現象が起こる可能
性がある。2. Description of the Related Art For example, in a system in which a distributed power system such as a solar cell is connected to a low-voltage distribution line or a high-voltage distribution line, when the system is stopped, the distributed power system goes into an independent operation state, There is a possibility that a reverse charging phenomenon may occur in which the voltage remains in the system even though the circuit breaker for distribution has stopped.
【0003】このために系統が停止したことを検出する
ための様々な方式が検討されているが、その中の一つと
して系統停止時に系統電圧の位相が跳躍することを利用
する位相跳躍検出方式が知られている。ここで位相跳躍
とは、図1の実線で示す系統電圧の位相が、系統停止時
に破線で示すようにαだけずれる現象を意味するもので
ある。For this reason, various methods have been studied for detecting that the system has stopped. One of them is a phase jump detection method which utilizes the fact that the phase of the system voltage jumps when the system is stopped. It has been known. Here, the phase jump means a phenomenon in which the phase of the system voltage shown by the solid line in FIG. 1 shifts by α as shown by the broken line when the system is stopped.
【0004】従来、位相跳躍の検出には図4に示すよう
に系統周波数をF−Vコンバータ11によって電圧に変換
し、F−Vコンバータ11の出力電圧を基準電圧発生器12
の基準電圧と比較器13により比較する方式が採用されて
いた。ところが、系統停止による位相跳躍は1回しか発
生しないためにF−Vコンバータ11の出力電圧の変動が
小さいこと、位相跳躍量が少ないときには検出が困難で
あること、通常の系統周波数の変動によっても誤動作が
生ずる可能性があること等の欠点があった。Conventionally, to detect a phase jump, a system frequency is converted into a voltage by an FV converter 11 as shown in FIG. 4, and an output voltage of the FV converter 11 is converted into a reference voltage generator 12.
The method of comparing with the reference voltage of 3 by the comparator 13 was adopted. However, since the phase jump due to the system stop occurs only once, the fluctuation of the output voltage of the FV converter 11 is small, the detection is difficult when the amount of phase jump is small, and the fluctuation of the normal system frequency is also caused. There are drawbacks such as the possibility of malfunction.
【0005】[0005]
【発明が解決しようとする課題】本発明は上記した従来
の問題点を解決し、位相跳躍等の系統異常が生じたとき
にこれを精度よく検出することができる系統異常の検出
方法を提供するためになされたものである。SUMMARY OF THE INVENTION The present invention solves the above-mentioned conventional problems and provides a method for detecting a system abnormality that can accurately detect a system abnormality such as a phase jump. It was done for good.
【0006】[0006]
【課題を解決するための手段】上記の課題を解決するた
めになされた本発明は、系統電圧のゼロ点からN/2 周期
後のゼロ点までの間に基準発振器が発するパルスをカウ
ントし、そのカウント数を直前のN/2 周期間のカウント
数と比較してその差が設定値を越えたとき系統異常と判
定することを特徴とするものである。なおNは1〜10程
度の正の整数である。Means for Solving the Problems The present invention made to solve the above problems is to count the pulses generated by a reference oscillator between the zero point of a system voltage and the zero point after N / 2 cycles, The feature is that the count number is compared with the count number in the immediately preceding N / 2 cycle and a system abnormality is judged when the difference exceeds a set value. N is a positive integer of about 1-10.
【0007】[0007]
【作用】本発明によれば、系統電圧のN/2 周期間に基準
発振器が発するパルス数と、その直前のN/2 周期間のパ
ルス数とを比較するので、基準発振器の発信周波数を高
く設定しておけば、図1に示すように系統停止前の定常
時系統電圧波形が系統停止以後に系統停止電圧波形に位
相跳躍し、その位相跳躍量がわずかでも発生したときに
は明らかなパルス数の差が検出されることとなり、位相
跳躍を確実に検出することができる。また本発明によれ
ば、直前のN/2 周期間のパルス数との間で比較を行うの
で、通常の系統周波数のゆるやかな変動の場合には系統
異常と判定せず、誤動作を生じない。According to the present invention, since the number of pulses generated by the reference oscillator during the N / 2 cycle of the system voltage is compared with the number of pulses during the N / 2 cycle immediately before that, the oscillation frequency of the reference oscillator is increased. If set, the steady-state system voltage waveform before the system stop jumps to the system stop voltage waveform after the system stop as shown in FIG. Since the difference is detected, the phase jump can be surely detected. Further, according to the present invention, since the comparison is made with the number of pulses in the immediately preceding N / 2 cycle, in the case of a gradual fluctuation of the normal system frequency, it is not judged as a system abnormality and no malfunction occurs.
【0008】[0008]
【実施例】以下に本発明を図2、図3の実施例によって
更に詳細に説明する。図2は本発明の第1の実施例を示
すもので、系統電圧のゼロ点をゼロ点検出器1により常
時検出している。一方、基準発振器2が系統周波数より
も十分に高周波数(例えば10kH) のパルスを発生してお
り、ゲート回路3でゼロ点検出器1からの信号を受け取
るごとに基準発振器2から送られるパルスの出力先を第
1カウンター4と第2カウンター5とに交互に切り換え
る。The present invention will be described in more detail below with reference to the embodiments shown in FIGS. FIG. 2 shows a first embodiment of the present invention, in which the zero point of the system voltage is constantly detected by the zero point detector 1. On the other hand, the reference oscillator 2 generates a pulse having a frequency sufficiently higher than the system frequency (for example, 10 kH), and each time the gate circuit 3 receives a signal from the zero-point detector 1, the pulse transmitted from the reference oscillator 2 is The output destination is alternately switched to the first counter 4 and the second counter 5.
【0009】これらのカウンターはパルス数をカウント
して演算器6に出力するが、この場合には系統電圧の1/
2 周期毎にゼロ点検出器1からリセット信号を兼ねる切
り換え信号が出るので、第1カウンター4と第2カウン
ター5とはそれぞれ隣接する1/2 周期間のパルス数を常
時カウントしていることとなる。そして演算器6は両者
を比較し、その差が設定値を越えたとき位相跳躍と判定
する。These counters count the number of pulses and output them to the arithmetic unit 6. In this case, 1 / of the system voltage
Since the switching signal that also serves as the reset signal is output from the zero-point detector 1 every two cycles, the first counter 4 and the second counter 5 are always counting the number of pulses between adjacent 1/2 cycles. Become. Then, the arithmetic unit 6 compares the two, and when the difference exceeds the set value, it is determined that the phase jump occurs.
【0010】このように本発明では系統電圧の1/2 周期
の長さをパルス数で比較するので、位相跳躍量が小さい
ときにも確実な検出が可能であり、また系統周波数のゆ
るやかな変動は直前の1/2 周期との比較ではほとんど現
れないので、位相跳躍だけを確実に検出することができ
る。As described above, according to the present invention, since the length of the 1/2 cycle of the system voltage is compared by the number of pulses, reliable detection is possible even when the amount of phase jump is small, and the system frequency fluctuates gently. Since it hardly appears in comparison with the immediately preceding 1/2 cycle, only the phase jump can be detected reliably.
【0011】なお、カウンターの出力(1/2 周期のパル
ス数)をDとし、基準発振器2の発振周波数をfとする
と、系統周波数FはF=f/2Dの式で算出できるの
で、系統周波数Fを求めることもできる。このため、こ
のようにして求められた系統周波数Fが許容範囲を越え
たときに系統異常と判定する機能を演算器6に付加して
おけば、周波数異常をも検出できることとなる。When the output of the counter (the number of pulses of 1/2 cycle) is D and the oscillation frequency of the reference oscillator 2 is f, the system frequency F can be calculated by the formula F = f / 2D. You can also ask for F. Therefore, if the function of determining the system abnormality when the system frequency F thus obtained exceeds the allowable range is added to the arithmetic unit 6, the frequency abnormality can be detected.
【0012】以上に説明した第1の実施例では、第1カ
ウンター4と第2カウンター5とによってそれぞれパル
ス数をカウントさせたが、図3に示す第2の実施例では
第2カウンター5に代えてメモリー7を設置し、第1カ
ウンター4の出力をメモリー7に送り込む方式を取って
いる。この結果、メモリー7には直前の1/2 周期のパル
ス数が記憶されていることとなり、第1カウンター4の
出力とメモリー7の出力とを比較すれば、前記したと同
様に位相跳躍等の系統異常が検出できることとなる。な
お実施例では1/2 周期のパルス数をカウントしている
が、Nを2以上として1周期、1.5 周期、2周期等のパ
ルス数をカウントするようにしてもよい。但しNを大き
くすると位相跳躍の検出精度が低下するので、Nを10以
上とすることは好ましくない。In the first embodiment described above, the number of pulses is counted by the first counter 4 and the second counter 5, respectively. However, in the second embodiment shown in FIG. 3, the second counter 5 is used instead. The memory 7 is installed and the output of the first counter 4 is sent to the memory 7. As a result, the number of pulses of the immediately preceding 1/2 cycle is stored in the memory 7, and if the output of the first counter 4 and the output of the memory 7 are compared, the phase jump etc. will occur in the same manner as described above. A system abnormality can be detected. Although the number of pulses of 1/2 cycle is counted in the embodiment, the number of pulses of 1 cycle, 1.5 cycles, 2 cycles, etc. may be counted by setting N to 2 or more. However, if N is increased, the accuracy of phase jump detection decreases, so it is not preferable to set N to 10 or more.
【0013】[0013]
【発明の効果】以上に説明したように、本発明の系統異
常の検出方法によれば、位相跳躍や周波数異常等の系統
異常が生じたときにこれを精度よく検出することがで
き、例えば低圧配電線や高圧配電線に分散型電源システ
ムが連系された系統において、系統が停止したことを確
実に検出するうえで利用価値の大きいものである。As described above, according to the method of detecting a system abnormality of the present invention, when a system abnormality such as a phase jump or a frequency abnormality occurs, it can be detected with high accuracy. In a system in which a distributed power supply system is connected to a distribution line or a high-voltage distribution line, it has a great utility value in reliably detecting that the system has stopped.
【図面の簡単な説明】[Brief description of drawings]
【図1】位相跳躍を説明する波形図である。FIG. 1 is a waveform diagram illustrating phase jump.
【図2】本発明の第1の実施例を説明するブロック図で
ある。FIG. 2 is a block diagram illustrating a first embodiment of the present invention.
【図3】本発明の第2の実施例を説明するブロック図で
ある。FIG. 3 is a block diagram illustrating a second embodiment of the present invention.
【図4】従来の位相跳躍検出方式を説明するブロック図
である。FIG. 4 is a block diagram illustrating a conventional phase jump detection method.
1 ゼロ点検出器 2 基準発振器 3 ゲート回路 4 第1カウンター 5 第2カウンター 6 演算器 7 メモリー 1 Zero point detector 2 Reference oscillator 3 Gate circuit 4 1st counter 5 2nd counter 6 Arithmetic unit 7 Memory
───────────────────────────────────────────────────── フロントページの続き (72)発明者 櫻井 佳彦 長野県小県郡東部町大字加沢873番地の1 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Yoshihiko Sakurai 1 of 873 Kazawa, Tobu-cho, Ogata-gun, Nagano Prefecture
Claims (2)
点までの間に基準発振器が発するパルスをカウントし、
そのカウント数を直前のN/2 周期間のカウント数と比較
してその差が設定値を越えたとき系統異常と判定するこ
とを特徴とする系統異常の検出方法。1. The number of pulses generated by the reference oscillator is counted from the zero point of the system voltage to the zero point after N / 2 cycles,
A method for detecting a system abnormality, which compares the count number with the count number in the immediately preceding N / 2 cycle and determines that the system abnormality occurs when the difference exceeds a set value.
し、この演算された周波数が許容範囲を越えたときに系
統異常と判定する機能を付加したことを特徴とする請求
項1記載の系統異常の検出方法。2. The system abnormality according to claim 1, further comprising a function for calculating a system frequency from the count number and determining a system abnormality when the calculated frequency exceeds an allowable range. Detection method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6512193A JPH06284560A (en) | 1993-03-24 | 1993-03-24 | System anomaly detection method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6512193A JPH06284560A (en) | 1993-03-24 | 1993-03-24 | System anomaly detection method |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH06284560A true JPH06284560A (en) | 1994-10-07 |
Family
ID=13277737
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6512193A Withdrawn JPH06284560A (en) | 1993-03-24 | 1993-03-24 | System anomaly detection method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH06284560A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100333108B1 (en) * | 1998-09-30 | 2002-06-20 | 황기연 | Circuit and method for detecting a phase of load break switch |
JP2007512000A (en) * | 2003-11-14 | 2007-05-10 | ゼネラル・エレクトリック・カンパニイ | Method, memory medium and apparatus for detection of grid disconnection |
JPWO2021240639A1 (en) * | 2020-05-26 | 2021-12-02 |
-
1993
- 1993-03-24 JP JP6512193A patent/JPH06284560A/en not_active Withdrawn
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100333108B1 (en) * | 1998-09-30 | 2002-06-20 | 황기연 | Circuit and method for detecting a phase of load break switch |
JP2007512000A (en) * | 2003-11-14 | 2007-05-10 | ゼネラル・エレクトリック・カンパニイ | Method, memory medium and apparatus for detection of grid disconnection |
JP4719691B2 (en) * | 2003-11-14 | 2011-07-06 | ゼネラル・エレクトリック・カンパニイ | Method, memory medium and apparatus for detection of grid disconnection |
JPWO2021240639A1 (en) * | 2020-05-26 | 2021-12-02 | ||
WO2021240639A1 (en) * | 2020-05-26 | 2021-12-02 | 東芝三菱電機産業システム株式会社 | System frequency detector |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 20000530 |