JPH06268018A - Method for mounting electronic component provided with bump - Google Patents

Method for mounting electronic component provided with bump

Info

Publication number
JPH06268018A
JPH06268018A JP5046493A JP5046493A JPH06268018A JP H06268018 A JPH06268018 A JP H06268018A JP 5046493 A JP5046493 A JP 5046493A JP 5046493 A JP5046493 A JP 5046493A JP H06268018 A JPH06268018 A JP H06268018A
Authority
JP
Japan
Prior art keywords
substrate
bump
bumps
electronic component
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5046493A
Other languages
Japanese (ja)
Other versions
JP3146726B2 (en
Inventor
Seiji Sakami
省二 酒見
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=12859605&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=JPH06268018(A) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP5046493A priority Critical patent/JP3146726B2/en
Publication of JPH06268018A publication Critical patent/JPH06268018A/en
Priority to US08/457,805 priority patent/US5489750A/en
Application granted granted Critical
Publication of JP3146726B2 publication Critical patent/JP3146726B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75Apparatus for connecting with bump connectors or layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector

Abstract

PURPOSE:To provide a method for mounting an electronic component provided with a bump so as to surely bond a bump on the electrode of a substrate and perform accurate defect judgement. CONSTITUTION:A bump 4 heated and melted by reflow process is diffused on the electrode 6 of a substrate 5 so as to permit the cross-section shape to be trapezoid by forming the area of the electrode 6 of the substrate 5 larger than the area of the electrode of an electronic component 2. Since the cross-section shape of the bump 4 changes to be trapezoid and the height remarkably reduces at the time of reflowing, the problems of the bump height nonuniformity and the warping of the substrate 5 are solved and all of the bumps 4 can be bonded with the electrodes 6 of the substrate 5. Bonding defects can be accurately judged by measuring the flat area of the bump 4 at the time of reflowing.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、電子部品の電極に突設
されたバンプを基板の電極に着地させ、次にリフロー処
理を行ってバンプを加熱溶融させることによりバンプを
基板の電極にボンディングするバンプ付電子部品の実装
方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is to bond bumps to electrodes on a substrate by landing bumps protruding from electrodes of electronic parts on electrodes on the substrate and then performing reflow treatment to heat and melt the bumps. The present invention relates to a method for mounting a bumped electronic component.

【0002】[0002]

【従来の技術】バンプ付電子部品はリード付電子部品と
比較して実装面積を小さくできることから、近年、次第
に普及してきている。図8は、基板に実装された従来の
バンプ付電子部品の側面図である。バンプ付電子部品1
は、電子部品2の電極3にバンプ(突出電極)4を突設
して形成されており、このバンプ4を基板5の電極6に
着地させた後、リフロー処理を行ってバンプ4を加熱溶
融させることにより、バンプ4を電極6にボンディング
する。
2. Description of the Related Art Electronic components with bumps have become more popular in recent years because their mounting area can be made smaller than that of electronic components with leads. FIG. 8 is a side view of a conventional bumped electronic component mounted on a substrate. Electronic component with bump 1
Is formed by protruding bumps (protruding electrodes) 4 on the electrodes 3 of the electronic component 2. After the bumps 4 are landed on the electrodes 6 of the substrate 5, a reflow process is performed to heat and melt the bumps 4. By doing so, the bump 4 is bonded to the electrode 6.

【0003】図9は、バンプ4を基板5の電極6にボン
ディングする前の部分拡大図であって、バンプ4の断面
形状は略円球状である。また図10はボンディング後の
部分拡大図であって、バンプ4は加熱溶融時の表面張力
と電子部品2の自重により押し潰されて、やや扁平な断
面形状となっている。
FIG. 9 is a partially enlarged view of the bump 4 before it is bonded to the electrode 6 of the substrate 5. The bump 4 has a substantially spherical cross section. Further, FIG. 10 is a partially enlarged view after bonding, and the bump 4 is crushed by the surface tension during heating and melting and the self-weight of the electronic component 2 to have a slightly flat cross-sectional shape.

【0004】電子部品2に突設されるバンプ4の数は、
一般に10個以上、若しくは数100個以上であってき
わめて多いが、すべてのバンプ4を基板5の電極6に確
実に着地させてボンディングしなければならず、ボンデ
ィング不良のバンプ4が1個でもあると、不良品となっ
てしまう。
The number of bumps 4 protruding from the electronic component 2 is
Generally, the number is 10 or more, or several 100 or more, which is extremely large, but all the bumps 4 must be surely landed on the electrodes 6 of the substrate 5 to be bonded, and even one bump 4 with a defective bonding is present. Then, it becomes a defective product.

【0005】[0005]

【発明が解決しようとする課題】ところがバンプ4の高
さd1にばらつきが生じることはその製造上避けられ
ず、また基板5にも反りが生じることはその製造上避け
られないことから、従来の実装方法では、多数個のすべ
てのバンプ4を基板5の電極6に確実に着地させてボン
ディングさせることはかなり困難であるという問題点が
あった。因みに、バンプ4はスクリーン印刷法やメッキ
法などにより形成される。
However, variations in the height d1 of the bumps 4 are unavoidable in manufacturing, and warping of the substrate 5 is unavoidable in manufacturing. The mounting method has a problem that it is quite difficult to surely land and bond the large number of all the bumps 4 on the electrodes 6 of the substrate 5. Incidentally, the bumps 4 are formed by a screen printing method, a plating method or the like.

【0006】またバンプ付電子部品1を基板5に実装し
た後、バンプ4が基板5の電極6にしっかりボンディン
グされているか否かを検査する必要があるが、従来の実
装方法では、ボンディング良とボンディング不良のバン
プ4には形状的な差異はあまり無いので、例えば軟X線
による外観検査を行っても信頼性の高い良否判定結果を
得にくいという問題点があった。
After mounting the electronic component 1 with bumps on the substrate 5, it is necessary to inspect whether or not the bumps 4 are firmly bonded to the electrodes 6 of the substrate 5. However, in the conventional mounting method, good bonding is achieved. Since there is not much difference in shape between the bumps 4 with defective bonding, there is a problem that it is difficult to obtain a highly reliable pass / fail judgment result even if an external appearance inspection using soft X-rays is performed.

【0007】ところで、図9に示すリフロー前のバンプ
4の高さd1と、図10に示すリフロー後のバンプ4の
高さd2の差△d=d1−d2が大きい程、すなわちリ
フロー処理によってバンプ4の高さが収縮する程、バン
プ4の高さのばらつきや基板5の反りを吸収でき、すべ
てのバンプ4を基板5の電極6に確実にボンディングで
きる。また図9に示すバンプ4の形状と、図10に示す
バンプ4の形状に顕著な差異がある程、ボンディング良
・ボンディング不良の外観検査の良否判定を行いやすい
ものである。
By the way, the larger the difference Δd = d1-d2 between the height d1 of the bump 4 before reflow shown in FIG. 9 and the height d2 of the bump 4 after reflow shown in FIG. As the height of the bumps 4 shrinks, variations in the height of the bumps 4 and the warp of the substrate 5 can be absorbed, and all the bumps 4 can be reliably bonded to the electrodes 6 of the substrate 5. Further, the more the shape of the bump 4 shown in FIG. 9 differs from the shape of the bump 4 shown in FIG. 10, the easier it is to perform the visual inspection of the good / bad bonding for visual inspection.

【0008】そこで本発明は叙上の点を勘案してなされ
たものであって、電子部品のすべてのバンプを基板の電
極に確実にボンディングでき、且つ実装後の外観検査に
おいてボンディング良・ボンディング不良を的確に判定
することが可能なバンプ付電子部品の実装方法を提供す
ることを目的とする。
Therefore, the present invention has been made in consideration of the above points, and it is possible to reliably bond all the bumps of the electronic component to the electrodes of the substrate, and the bonding is good and the bonding is defective in the visual inspection after mounting. It is an object of the present invention to provide a mounting method of an electronic component with bumps capable of accurately determining.

【0009】[0009]

【課題を解決するための手段】このために本発明のバン
プ付電子部品の実装方法は、基板の電極の面積を電子部
品の電極の面積よりも大きく形成することにより、リフ
ロー処理において加熱溶融したバンプを基板の電極上に
拡散させてその断面形状を台形状にするようにしたもの
である。
For this reason, in the method of mounting an electronic component with bumps according to the present invention, the area of the electrode of the substrate is formed larger than the area of the electrode of the electronic component, so that it is heated and melted in the reflow process. The bumps are diffused on the electrodes of the substrate so that the cross-sectional shape is trapezoidal.

【0010】[0010]

【作用】上記構成によれば、リフロー時に加熱溶融した
バンプが面積の大きい基板の電極上に拡散することによ
り、その断面形状は台形となることから、リフロー前の
バンプの高さとリフロー後のバンプ高さの差が大きくな
り、このようなバンプの高さの収縮によってバンプの高
さのばらつきや基板の反りを吸収してすべてのバンプを
基板の電極にボンディングできる。またリフロー後には
バンプの平面積はリフロー前に比較して著しく大きくな
るので、例えば軟X線を使用してバンプの平面積の大き
さを測定することにより、ボンディング良・ボンディン
グ不良の良否判定を的確に行える。
According to the above construction, since the bumps heated and melted during reflow diffuse on the electrodes of the substrate having a large area, the cross-sectional shape becomes a trapezoid. Therefore, the bump height before reflow and the bump after reflow are increased. The difference in height becomes large, and the contraction of the height of the bumps absorbs the variation in the height of the bumps and the warp of the substrate, so that all the bumps can be bonded to the electrodes of the substrate. After the reflow, the flat area of the bump becomes significantly larger than that before the reflow. Therefore, by measuring the flat area of the bump using, for example, soft X-ray, it is possible to judge whether the bonding is good or the bonding is defective. Can be done accurately.

【0011】[0011]

【実施例】次に、図面を参照しながら本発明の実施例を
説明する。
Embodiments of the present invention will now be described with reference to the drawings.

【0012】図1は実装前のバンプ付電子部品と基板の
斜視図である。バンプ付電子部品1は、電子部品2の下
面に形成された電極3上にバンプ4を突設して形成され
ている。このバンプ付電子部品1は、上記した従来のバ
ンプ付電子部品と同じものである。また基板5の上面に
は電極6がエッチング法などにより形成されているが、
基板5の電極6の面積は、電子部品2の電極3の面積よ
りもかなり大きくしてある。なお本実施例の電極3,6
の平面形状は円形であるが、四角形などでもよい。
FIG. 1 is a perspective view of an electronic component with bumps and a substrate before mounting. The electronic component 1 with bumps is formed by protruding bumps 4 on electrodes 3 formed on the lower surface of the electronic component 2. The bumped electronic component 1 is the same as the conventional bumped electronic component described above. Further, the electrode 6 is formed on the upper surface of the substrate 5 by an etching method or the like.
The area of the electrode 6 of the substrate 5 is made considerably larger than the area of the electrode 3 of the electronic component 2. The electrodes 3 and 6 of this example
The planar shape of is circular, but may be rectangular or the like.

【0013】このバンプ付電子部品1は、基板5の電極
6にフラックスを塗布した後、バンプ4を電極6に着地
させて基板5に搭載され、続いてリフロー処理が行われ
る。図2はリフロー装置の内部構造を示す断面図であ
る。加熱室11の内部には基板5を搬送するコンベア1
2が配設されており、またコンベア12の上方にはヒー
タ13とファン14が配設されている。15はファン1
4の駆動用モータである。また加熱室11の後方には冷
却室16が設けられており、この冷却室16には冷却用
のファン14が配設されている。
The electronic component 1 with bumps is applied to the electrodes 6 of the substrate 5 with flux, then the bumps 4 are landed on the electrodes 6 and mounted on the substrate 5, and then a reflow process is performed. FIG. 2 is a sectional view showing the internal structure of the reflow apparatus. Inside the heating chamber 11, a conveyor 1 that conveys the substrate 5
2 is provided, and a heater 13 and a fan 14 are provided above the conveyor 12. 15 is fan 1
4 is a driving motor. A cooling chamber 16 is provided behind the heating chamber 11, and a cooling fan 14 is provided in the cooling chamber 16.

【0014】コンベア12により基板5を右方へ搬送し
ながら、ヒータ13で加熱された空気をファン14によ
り基板5に吹き付け、バンプ4を加熱溶融させてリフロ
ー処理した後、冷却室16において基板5に冷風を吹き
付けることにより、加熱溶融したバンプ4を冷却して固
化させる。なおリフロー装置としては、加熱室にチッソ
ガスを供給するチッソリフロー装置も適用できる。
While the substrate 5 is conveyed rightward by the conveyor 12, the air heated by the heater 13 is blown onto the substrate 5 by the fan 14 to heat and melt the bumps 4 for reflow processing, and then the substrate 5 is placed in the cooling chamber 16. By blowing cold air onto the bumps 4, the heated and melted bumps 4 are cooled and solidified. As the reflow device, a nitrogen reflow device that supplies nitrogen gas to the heating chamber can also be applied.

【0015】図3はリフロー後のバンプ付電子部品1と
基板5の側面図、図4はその部分拡大図である。図示す
るように、基板5の電極6の面積は電子部品2の電極3
の面積より大きいので、リフロー時には加熱溶融したバ
ンプ4は流動し、電極6の全面若しくはほぼ全面に拡散
して、その断面形状は台形状となり、その高さd2はリ
フロー前の高さd1(図8参照)よりも著しく収縮し、
その差△d=d1−d2は上記従来の場合よりもかなり
大きい。したがってバンプ4の高さのばらつきや基板5
の反りは十分に吸収され、すべてのバンプ4は基板5の
電極6にしっかりボンディングされる。
FIG. 3 is a side view of the electronic component 1 with bumps and the substrate 5 after reflow, and FIG. 4 is a partially enlarged view thereof. As shown in the figure, the area of the electrode 6 of the substrate 5 is equal to that of the electrode 3 of the electronic component 2.
Since the bumps 4 are heated and melted during reflow, the bumps 4 flow over the entire surface or almost the entire surface of the electrode 6 to have a trapezoidal cross section, and the height d2 thereof is the height d1 before reflow (see FIG. 8) and contracted significantly,
The difference Δd = d1-d2 is considerably larger than that in the conventional case. Therefore, the height variation of the bumps 4 and the substrate 5
Warp is sufficiently absorbed and all the bumps 4 are firmly bonded to the electrodes 6 of the substrate 5.

【0016】図5は、バンプ付電子部品1が搭載された
基板5を軟X線装置により観察している側面図であっ
て、17は軟X線照射部、18は受像部である。また図
6(a)は、軟X線装置で入手したリフロー前のバンプ
4の画像、図6(b)はリフロー後の画像である。軟X
線は、電子部品2や基板5を透過するので、バンプ4の
画像を入手することができる。図示するように、リフロ
ー後には、バンプ4は基板5の電極6の全面に拡散する
ので、その平面積はリフロー前よりも著しく大きくな
る。ところで、基板5の電極6に着地できなかったバン
プ4は、基板5の電極6上に拡散できないので、その平
面形状はリフロー後においても図6(a)に示す小面積
のままとなる。そこでリフロー後にバンプ4の平面積を
軟X線により観察し、その平面積の大小を測定すること
により、ボンディング良・ボンディング不良を的確に判
定できる。
FIG. 5 is a side view of the substrate 5 on which the bumped electronic component 1 is mounted, which is observed by a soft X-ray apparatus, in which 17 is a soft X-ray irradiation unit and 18 is an image receiving unit. Further, FIG. 6A is an image of the bumps 4 obtained by the soft X-ray apparatus before the reflow, and FIG. 6B is an image after the reflow. Soft X
Since the line penetrates the electronic component 2 and the substrate 5, an image of the bump 4 can be obtained. As shown in the drawing, after the reflow, the bumps 4 are diffused over the entire surface of the electrode 6 of the substrate 5, so that the plane area thereof is significantly larger than that before the reflow. By the way, since the bumps 4 that cannot land on the electrodes 6 of the substrate 5 cannot diffuse on the electrodes 6 of the substrate 5, their planar shape remains the small area shown in FIG. 6A even after the reflow. Therefore, by observing the plane area of the bump 4 with a soft X-ray after the reflow and measuring the size of the plane area, it is possible to accurately determine whether the bonding is good or the bonding is defective.

【0017】図7(a)(b)(c)は、電極6の平面
形状を4角形にした場合の軟X線の画像を示している。
図7(a)はリフロー前の画像、図7(b)(c)はリ
フロー後の画像である。図7(b)に示すものは、リフ
ローによりバンプ4は電極6の全面に拡散してバンプ4
の平面形状は4角形になっており良品である。これに対
し図7(c)に示すものは、リフローによりバンプ4は
十分に拡散しておらず、その平面形状は円形のままであ
り、不良品である。したがってこのように電極3と電極
6の平面形状を異ならせておけば、リフロー後のバンプ
4の平面形状から良否を容易に判定できる。電極6の形
状としては、4角形以外にも6角形などでもよい。
7A, 7B and 7C show soft X-ray images when the planar shape of the electrode 6 is a quadrangle.
7A is an image before reflow, and FIGS. 7B and 7C are images after reflow. In the structure shown in FIG. 7B, the bumps 4 are diffused over the entire surface of the electrodes 6 by reflow and the bumps 4 are formed.
The plane shape of is a square and is a good product. On the other hand, in the case shown in FIG. 7C, the bumps 4 have not been sufficiently diffused by the reflow, and the planar shape thereof is still circular, which is a defective product. Therefore, if the planar shapes of the electrode 3 and the electrode 6 are made different in this way, it is possible to easily determine the quality based on the planar shape of the bump 4 after the reflow. The shape of the electrode 6 may be a hexagon or the like other than the square.

【0018】本発明は上記実施例に限定されないのであ
って、例えばバンプ付電子部品としては、複数個のチッ
プをパッケージしたマルチップパッケージタイプのバン
プ付電子部品にも適用できる。
The present invention is not limited to the above-described embodiments, and for example, the bumped electronic component can be applied to a multi-chip package type bumped electronic component in which a plurality of chips are packaged.

【0019】[0019]

【発明の効果】以上説明したように本発明のバンプ付電
子部品の実装方法によれば、リフロー時に加熱溶融した
バンプが面積の大きい基板の電極上に拡散することによ
り、その断面形状は台形となることから、リフロー前の
バンプの高さとリフロー後のバンプ高さの差が大きくな
り、バンプの高さのばらつきや基板の反りを吸収してす
べてのバンプを基板の電極にボンディングできる。また
リフロー後にはバンプの平面積はリフロー前に比較して
著しく大きくなるので、例えば軟X線を使用してバンプ
の平面積の大きさを測定することにより、ボンディング
良・ボンディング不良の良否判定を的確に行える。
As described above, according to the method for mounting electronic components with bumps of the present invention, the bumps that are heated and melted during reflow diffuse on the electrodes of the substrate having a large area, so that the cross-sectional shape is trapezoidal. Therefore, the difference between the height of the bumps before reflow and the height of the bumps after reflow becomes large, and variations in bump heights and warpage of the substrate can be absorbed to bond all the bumps to the electrodes of the substrate. After the reflow, the flat area of the bump becomes significantly larger than that before the reflow. Therefore, by measuring the flat area of the bump using, for example, soft X-ray, it is possible to judge whether the bonding is good or the bonding is defective. Can be done accurately.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例のバンプ付電子部品と基板の
斜視図
FIG. 1 is a perspective view of a bumped electronic component and a substrate according to an embodiment of the present invention.

【図2】本発明の一実施例のリフロー装置の断面図FIG. 2 is a sectional view of a reflow apparatus according to an embodiment of the present invention.

【図3】本発明の一実施例のリフロー後のバンプ付電子
部品と基板の側面図
FIG. 3 is a side view of a bumped electronic component and a substrate after reflow according to an embodiment of the present invention.

【図4】本発明の一実施例のリフロー後のバンプ付電子
部品と基板の部分拡大図
FIG. 4 is a partially enlarged view of a bumped electronic component and a substrate after reflow according to an embodiment of the present invention.

【図5】本発明の一実施例の軟X線装置の側面図FIG. 5 is a side view of a soft X-ray apparatus according to an embodiment of the present invention.

【図6】(a)本発明の一実施例のリフロー前のバンプ
の画像図 (b)本発明の一実施例のリフロー後のバンプの画像図
6A is an image diagram of bumps before reflow according to an embodiment of the present invention. FIG. 6B is an image diagram of bumps after reflow according to an embodiment of the present invention.

【図7】(a)本発明の他の実施例のリフロー前のバン
プの画像図 (b)本発明の他の実施例のリフロー後のバンプの画像
図 (c)本発明の他の実施例のリフロー後のバンプの画像
7A is an image diagram of bumps before reflow according to another embodiment of the present invention. FIG. 7B is an image diagram of bumps after reflow according to another embodiment of the present invention. FIG. 7C is another embodiment of the present invention. Image of bump after reflow

【図8】従来のバンプ付電子部品と基板のリフロー後の
側面図
FIG. 8 is a side view of a conventional electronic component with bumps and a substrate after reflow.

【図9】従来のバンプ付電子部品と基板のリフロー前の
部分拡大図
FIG. 9 is a partially enlarged view of a conventional electronic component with bumps and a substrate before reflow.

【図10】従来のバンプ付電子部品と基板のリフロー後
の部分拡大図
FIG. 10 is a partially enlarged view of a conventional electronic component with bumps and a substrate after reflow.

【符号の説明】[Explanation of symbols]

1 バンプ付電子部品 2 電子部品 3 電極 4 バンプ 5 基板 6 電極 1 Electronic component with bump 2 Electronic component 3 Electrode 4 Bump 5 Substrate 6 Electrode

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】電子部品の電極に突設されたバンプを基板
の電極に着地させ、次にリフロー処理を行ってバンプを
加熱溶融させることによりバンプを基板の電極にボンデ
ィングするバンプ付電子部品の実装方法であって、前記
基板の電極の面積を前記電子部品の電極の面積よりも大
きく形成することにより、前記リフロー処理において加
熱溶融したバンプを前記基板の電極上に拡散させてその
断面形状を台形状にすることを特徴とするバンプ付電子
部品の実装方法。
1. A bumped electronic component for bonding a bump to an electrode of a substrate by landing a bump protruding from an electrode of the electronic component on the electrode of the substrate and then performing reflow treatment to heat and melt the bump. In the mounting method, by forming the area of the electrode of the substrate larger than the area of the electrode of the electronic component, the bumps heated and melted in the reflow process are diffused onto the electrode of the substrate to have a cross-sectional shape. A mounting method for an electronic component with bumps, which is characterized by a trapezoidal shape.
JP5046493A 1993-03-11 1993-03-11 How to mount electronic components with bumps Expired - Fee Related JP3146726B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP5046493A JP3146726B2 (en) 1993-03-11 1993-03-11 How to mount electronic components with bumps
US08/457,805 US5489750A (en) 1993-03-11 1995-06-01 Method of mounting an electronic part with bumps on a circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5046493A JP3146726B2 (en) 1993-03-11 1993-03-11 How to mount electronic components with bumps

Publications (2)

Publication Number Publication Date
JPH06268018A true JPH06268018A (en) 1994-09-22
JP3146726B2 JP3146726B2 (en) 2001-03-19

Family

ID=12859605

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5046493A Expired - Fee Related JP3146726B2 (en) 1993-03-11 1993-03-11 How to mount electronic components with bumps

Country Status (1)

Country Link
JP (1) JP3146726B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6768062B2 (en) 2000-10-12 2004-07-27 Murata Manufacturing Co., Ltd. Connection method and connection structure of pad electrodes, and inspecting methods for connection state thereof
JP2007324528A (en) * 2006-06-05 2007-12-13 Alps Electric Co Ltd Inspection method for solder connection structure, and solder connection structure
JP2012216616A (en) * 2011-03-31 2012-11-08 Internatl Business Mach Corp <Ibm> Semiconductor bonding device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4631460B2 (en) * 2005-02-18 2011-02-16 パナソニック株式会社 X-ray inspection method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6768062B2 (en) 2000-10-12 2004-07-27 Murata Manufacturing Co., Ltd. Connection method and connection structure of pad electrodes, and inspecting methods for connection state thereof
JP2007324528A (en) * 2006-06-05 2007-12-13 Alps Electric Co Ltd Inspection method for solder connection structure, and solder connection structure
JP2012216616A (en) * 2011-03-31 2012-11-08 Internatl Business Mach Corp <Ibm> Semiconductor bonding device

Also Published As

Publication number Publication date
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