JPH06267946A - Selective forming method of metallic film - Google Patents
Selective forming method of metallic filmInfo
- Publication number
- JPH06267946A JPH06267946A JP5600493A JP5600493A JPH06267946A JP H06267946 A JPH06267946 A JP H06267946A JP 5600493 A JP5600493 A JP 5600493A JP 5600493 A JP5600493 A JP 5600493A JP H06267946 A JPH06267946 A JP H06267946A
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- interlayer insulating
- via hole
- film
- metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は金属膜をヴィア孔に選択
的に形成させる金属膜の選択形成方法に関するものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for selectively forming a metal film for selectively forming a metal film in a via hole.
【０００２】[0002]
【従来の技術】従来、絶縁膜を介して多層に積層された
Ａｌ配線間の接続は、絶縁膜に形成されたヴィア孔に埋
め込まれるプラグによって行われている（特開平３−２
９１９２０号公報等）。このような多層配線構造を形成
する際、金属薄膜を絶縁膜上に蒸着する前処理として一
般的に基板表面の洗浄が行われる。絶縁膜に形成された
ヴィア孔にプラグを埋め込む前にも、水洗浄が行われ
る。2. Description of the Related Art Conventionally, a connection between Al wirings laminated in multiple layers via an insulating film has been performed by a plug embedded in a via hole formed in the insulating film (Japanese Patent Laid-Open No. 3-2).
91920 publication). When forming such a multilayer wiring structure, cleaning of the substrate surface is generally performed as a pretreatment for depositing a metal thin film on the insulating film. Water cleaning is also performed before the plug is embedded in the via hole formed in the insulating film.
【０００３】[0003]
【発明が解決しようとする課題】しかしながら、このよ
うな水処理を施しただけでは絶縁膜の表面に多数存在す
るシラノール基は除去しきれない。また、洗浄後、基板
が長時間大気中に放置されていると、このシラノール基
はさらに増大する。このため、この絶縁膜表面に存在す
るシラノール基が原因になり、ヴィア孔に金属膜を安定
して選択堆積させることが困難となり、所望通りに埋込
プラグを形成できなかった。However, the silanol groups present in large numbers on the surface of the insulating film cannot be completely removed only by performing such a water treatment. If the substrate is left in the atmosphere for a long time after cleaning, the silanol groups will increase further. For this reason, the silanol groups present on the surface of the insulating film are a cause, making it difficult to stably and selectively deposit the metal film in the via hole, and the buried plug cannot be formed as desired.
【０００４】[0004]
【課題を解決するための手段】本発明はこのような課題
を解消するためになされたもので、金属膜上の絶縁膜に
ヴィア孔を形成する工程と、絶縁膜表面を洗浄する工程
と、絶縁膜表面を乾燥させる工程と、絶縁膜表面をアル
コール類有機溶剤を用いて表面処理する工程と、ヴィア
孔に選択的に金属膜を形成する工程とを備えたものであ
る。The present invention has been made in order to solve such a problem, and comprises a step of forming a via hole in an insulating film on a metal film, a step of cleaning the surface of the insulating film, The method includes a step of drying the surface of the insulating film, a step of surface-treating the surface of the insulating film with an alcohol organic solvent, and a step of selectively forming a metal film in the via hole.
【０００５】[0005]
【作用】絶縁膜表面のシラノール基はアルコール類有機
溶剤による表面処理によって除去される。[Function] The silanol group on the surface of the insulating film is removed by the surface treatment with an alcohol organic solvent.
【０００６】[0006]
【実施例】図１は本発明の一実施例による金属膜の選択
形成方法を示す工程断面図である。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a process sectional view showing a method of selectively forming a metal film according to an embodiment of the present invention.
【０００７】まず、Ｓｉ基板１上にＳｉＯ2 膜２が形成
され、このＳｉＯ2 膜２上にＡｌ金属からなる配線金属
膜３が形成される。次に、この配線金属膜３上にＳｉＯ
2 からなる層間絶縁膜４が形成される（図１（ａ）参
照）。この層間絶縁膜４はホトリソグラフィ技術を用い
てパターニングされる。つまり、ホトレジスト５が露光
・現像処理によりパターニングされ、パターニングされ
たこのホトレジスト５をマスクに層間絶縁膜４が選択除
去される。この結果、所定箇所にヴィア孔４ａが形成さ
れる（同図（ｂ）参照）。次に、層間絶縁膜４上にある
ホトレジスト５を除去するため、酸素プラズマアッシン
グおよびレジスト剥離液により基板表面が洗浄される。
さらに基板表面は純水によって洗浄され、洗浄後、乾燥
される。First, the SiO 2 film 2 is formed on the Si substrate 1, and the wiring metal film 3 made of Al metal is formed on the SiO 2 film 2. Then, SiO is formed on the wiring metal film 3.
The interlayer insulating film 4 made of 2 is formed (see FIG. 1A). The interlayer insulating film 4 is patterned by using the photolithography technique. That is, the photoresist 5 is patterned by exposure / development processing, and the interlayer insulating film 4 is selectively removed by using the patterned photoresist 5 as a mask. As a result, the via hole 4a is formed at the predetermined location (see FIG. 7B). Next, in order to remove the photoresist 5 on the interlayer insulating film 4, the substrate surface is washed with oxygen plasma ashing and a resist stripping solution.
Further, the surface of the substrate is washed with pure water, and after washing, dried.
【０００８】その後、層間絶縁膜４はアルコール類有機
溶剤によって表面処理される。例えば、エタノール（Ｃ
2 Ｈ5 ＯＨ）溶液に基板が浸された後にスピン乾燥され
ることにより、層間絶縁膜４が表面処理される。このエ
タノールによる処理は、後述する埋込プラグ形成を実施
する直前か、または少なくとも処理後２４時間以内に行
うのが望ましい。エタノール処理によってシラノール基
が除去された層間絶縁膜４の表面が大気に晒され、再び
シラノール基が形成されることを防ぐためである。この
エタノール処理は、ホトレジスト５を除去するための洗
浄処理に連続して行ってもよいし、別個の工程として行
ってもよい。また、連続して行う場合には、各処理をそ
れぞれ別の装置を用いて行ってもよいし、同一の装置を
用いて行ってもよい。同一の装置を用いる場合には、例
えば、スピン乾燥機にレジスト剥離液、純水、エタノー
ルの供給系を設けた装置を使用することができる。After that, the interlayer insulating film 4 is surface-treated with an alcoholic organic solvent. For example, ethanol (C
The substrate is dipped in a ( 2 H 5 OH) solution and then spin-dried, so that the interlayer insulating film 4 is surface-treated. It is desirable that the treatment with ethanol be performed immediately before performing a buried plug formation described below, or at least within 24 hours after the treatment. This is to prevent the surface of the interlayer insulating film 4 from which the silanol group has been removed by the ethanol treatment, from being exposed to the atmosphere and forming a silanol group again. This ethanol treatment may be performed continuously with the cleaning treatment for removing the photoresist 5 or as a separate step. In the case of continuous processing, each process may be performed using a different device or the same device. When the same apparatus is used, for example, an apparatus in which a resist dryer, pure water, and ethanol supply system are provided in a spin dryer can be used.
【０００９】次に、ＤＭＡＨを原料とする化学気相成長
（ＣＶＤ）法により、層間絶縁膜４の表面にＡｌ元素を
含むガスが流される。このＣＶＤ法により、層間絶縁膜
４の表面に形成されたヴィア孔４ａにのみＡｌ金属が選
択的に堆積され、Ａｌ金属からなる埋込プラグ６が形成
される（同図（ｃ）参照）。Then, a gas containing Al element is flown on the surface of the interlayer insulating film 4 by the chemical vapor deposition (CVD) method using DMAH as a raw material. By this CVD method, the Al metal is selectively deposited only in the via hole 4a formed on the surface of the interlayer insulating film 4, and the embedded plug 6 made of the Al metal is formed (see FIG. 3C).
【００１０】本実施例においては、埋込プラグ６を形成
する前処理として、層間絶縁膜４の表面がアルコール類
有機溶剤によって基板に対する濡れ性良く表面処理され
る。このため、層間絶縁膜４の表面のシラノール基は容
易に除去され、層間絶縁膜４の表面に多数存在する金属
汚染物はなくなる。従って、その後に行われるＣＶＤ法
によるＡｌ金属膜の堆積は、ヴィア孔４ａに一部露出す
る配線金属膜３上にのみ選択的に行われる。このため、
所望通りに埋込プラグ６を形成することが可能になる。In this embodiment, as a pretreatment for forming the buried plug 6, the surface of the interlayer insulating film 4 is surface-treated with an organic solvent such as alcohol with good wettability to the substrate. Therefore, the silanol groups on the surface of the interlayer insulating film 4 are easily removed, and many metal contaminants existing on the surface of the interlayer insulating film 4 are eliminated. Therefore, the subsequent deposition of the Al metal film by the CVD method is selectively performed only on the wiring metal film 3 partially exposed in the via hole 4a. For this reason,
It becomes possible to form the buried plug 6 as desired.
【００１１】上記実施例ではアルコール類有機溶剤の一
例としてエタノールを挙げたがこれに限定される必要は
ない。最も好ましいアルコール類有機溶剤としてはこの
エタノールの他にメタノールが挙げられる。その他に好
ましいアルコール類有機溶剤としては１−プロパノー
ル、２−プロパノール等が挙げられる。これらアルコー
ル類有機溶剤はＯＨ基を有するため、層間絶縁膜４の表
面に多数存在するシラノール基とよく結び付き、シラノ
ール基に吸着しやすい。特に飽和アルコールは吸着した
分子が安定であり、汚染防止効果が高い。さらに、アル
コール分子が小さいほどシラノール基に結び付きやす
く、汚染防止効果が高い。In the above embodiment, ethanol was mentioned as an example of the alcohol organic solvent, but it is not limited to this. As the most preferable organic solvent for alcohols, methanol can be mentioned in addition to this ethanol. Other preferable organic solvents for alcohols include 1-propanol and 2-propanol. Since these alcohol organic solvents have an OH group, they are well bound to many silanol groups existing on the surface of the interlayer insulating film 4, and are easily adsorbed by the silanol groups. In particular, saturated alcohol has a stable adsorbed molecule and has a high contamination preventing effect. Furthermore, the smaller the alcohol molecule, the easier it is to bind to silanol groups, and the higher the effect of preventing contamination.
【００１２】また、上記実施例では、層間絶縁膜４のア
ルコール類有機溶剤による表面処理は基板を溶液に浸す
ことにより行ったが、これに限定される必要はない。例
えば、アルコール類有機溶剤を基板表面に滴下し、スピ
ンコートして溶剤を塗布して表面処理をしても良い。ま
た、アルコール類有機溶剤を蒸気にし、この蒸気に基板
を暴露することにより表面処理をしても良い。このよう
な表面処理法によっても上記実施例と同様な効果が奏さ
れる。In the above embodiment, the surface treatment of the interlayer insulating film 4 with the alcohol organic solvent is performed by immersing the substrate in the solution, but the invention is not limited to this. For example, an organic solvent of alcohols may be dropped on the surface of the substrate, spin-coated, and the solvent may be applied to perform the surface treatment. Further, the surface treatment may be carried out by vaporizing an alcoholic organic solvent and exposing the substrate to this vapor. With such a surface treatment method, the same effect as in the above embodiment can be obtained.
【００１３】[0013]
【発明の効果】以上説明したように本発明によれば、絶
縁膜表面のシラノール基はアルコール類有機溶剤による
表面処理によって除去される。このため、ヴィア孔に一
部露出する金属膜上にのみ選択性よく金属膜が堆積さ
れ、所望のプラグが容易に形成される。As described above, according to the present invention, the silanol groups on the surface of the insulating film are removed by the surface treatment with the alcohol organic solvent. Therefore, the metal film is deposited with good selectivity only on the metal film partially exposed in the via hole, and the desired plug is easily formed.
【図１】本発明の一実施例による金属膜の形成方法を示
す工程断面図である。FIG. 1 is a process sectional view showing a method of forming a metal film according to an embodiment of the present invention.
１…Ｓｉ基板、２…ＳｉＯ2 膜、３…配線金属膜（Ａ
ｌ）、４…層間絶縁膜（ＳｉＯ2 ）、４ａ…ヴィア孔、
５…ホトレジスト、６…プラグ（Ａｌ）。1 ... Si substrate, 2 ... SiO 2 film, 3 ... wiring metal film (A
l), 4 ... Interlayer insulating film (SiO 2 ), 4a ... Via hole,
5 ... Photoresist, 6 ... Plug (Al).
Claims (1)
工程と、前記絶縁膜表面を洗浄する工程と、前記絶縁膜
表面を乾燥させる工程と、前記絶縁膜表面をアルコール
類有機溶剤を用いて表面処理する工程と、前記ヴィア孔
に選択的に金属膜を形成する工程とを備えたことを特徴
とする金属膜の選択形成方法。1. A step of forming via holes in an insulating film on a metal film, a step of cleaning the surface of the insulating film, a step of drying the surface of the insulating film, and a step of drying the surface of the insulating film with an alcohol organic solvent. A method of selectively forming a metal film, comprising the steps of: surface-treating using the same and a step of selectively forming a metal film in the via hole.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5600493A JPH06267946A (en) | 1993-03-16 | 1993-03-16 | Selective forming method of metallic film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5600493A JPH06267946A (en) | 1993-03-16 | 1993-03-16 | Selective forming method of metallic film |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06267946A true JPH06267946A (en) | 1994-09-22 |
Family
ID=13014920
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5600493A Pending JPH06267946A (en) | 1993-03-16 | 1993-03-16 | Selective forming method of metallic film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06267946A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100290131B1 (en) * | 1998-05-15 | 2001-05-15 | 박종섭 | Method for forming multi layer of semiconductor device |
| WO2008111134A1 (en) | 2007-03-15 | 2008-09-18 | Fujitsu Limited | Surface-hydrophobicized film, material for formation of surface-hydrophobicized film, wiring layer, semiconductor device and process for producing semiconductor device |
| US7928536B2 (en) | 2006-03-29 | 2011-04-19 | Fujitsu Limited | Roughness reducing film at interface, materials for forming roughness reducing film at interface, wiring layer and semiconductor device using the same, and method for manufacturing semiconductor device |
| US8164166B2 (en) | 2007-09-27 | 2012-04-24 | Fujitsu Limited | Interfacial roughness reducing film, wiring layer, semiconductor device, and method of manufacturing semiconductor device |
| US8617281B2 (en) | 2007-08-13 | 2013-12-31 | Applied Cleantech, Inc | Methods and systems for feedstock production from sewage and product manufacturing therefrom |
-
1993
- 1993-03-16 JP JP5600493A patent/JPH06267946A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100290131B1 (en) * | 1998-05-15 | 2001-05-15 | 박종섭 | Method for forming multi layer of semiconductor device |
| US7928536B2 (en) | 2006-03-29 | 2011-04-19 | Fujitsu Limited | Roughness reducing film at interface, materials for forming roughness reducing film at interface, wiring layer and semiconductor device using the same, and method for manufacturing semiconductor device |
| EP3240017A1 (en) | 2006-03-29 | 2017-11-01 | Fujitsu Limited | Method for forming a roughness reducing film at an interface and corresponding semiconductor device |
| WO2008111134A1 (en) | 2007-03-15 | 2008-09-18 | Fujitsu Limited | Surface-hydrophobicized film, material for formation of surface-hydrophobicized film, wiring layer, semiconductor device and process for producing semiconductor device |
| US8089138B2 (en) | 2007-03-15 | 2012-01-03 | Fujitsu Limited | Surface-hydrophobicized film, material for formation of surface-hydrophobicized film, wiring layer, semiconductor device and process for producing semiconductor device |
| US8617281B2 (en) | 2007-08-13 | 2013-12-31 | Applied Cleantech, Inc | Methods and systems for feedstock production from sewage and product manufacturing therefrom |
| US8164166B2 (en) | 2007-09-27 | 2012-04-24 | Fujitsu Limited | Interfacial roughness reducing film, wiring layer, semiconductor device, and method of manufacturing semiconductor device |
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