JPH06259395A - Process scheduling system - Google Patents

Abstract

PURPOSE:To efficiently execute a process by setting a schedule so that a process between processors is inhibited when the traffic of a bus exceeds a certain threshold value. CONSTITUTION:A bus traffic monitor device 12 monitors the traffic of the bus 16 at all times, and sends a signal to all processors 11a, 11b, 11c, and 11d through the bus 16 and also stores information indicating that the traffic exceeds the threshold value when the traffic exceeds the threshold value. The respective processors 11a-11d once receiving this signal writes the processor IDs in execution processor ID fields 17a, 17b...17e in process information storage use areas 15a, 15b...15e as to currently executed processes, so that the processes will be executed thereafter only by the specific processors. Consequently, the snoop processing of a cache between processors is inhibited and the traffic of the bus is reducible.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a process scheduling method for realizing high speed process execution in a multiprocessor system.

[0002]

2. Description of the Related Art In a multiprocessor system,
Scheduling is required to allocate the process to each processor. In a conventional multiprocessor system, processes are allocated to idle processors as appropriate, so process movement between processors is complicated, and as a result cache snoop processing between processes is complicated, and This was one of the factors that increased the traffic and deteriorated the system performance.

[0003]

As described above, in the conventional multiprocessor system, since the bus traffic is not taken into consideration in the process scheduling, the movement of the process between the processors is complicated, and therefore, the interprocessor processing is performed. There is a problem in that the snoop processing of the cache in the system occurs complicatedly, the bus traffic increases, and the system performance deteriorates.

An object of the present invention is to eliminate the above-mentioned drawbacks of the prior art, and to provide a process scheduling method that realizes efficient process execution by reducing bus traffic by appropriately scheduling processes. Is.

[0005]

To achieve the above object, according to the present invention, a means for monitoring the traffic volume of a bus in a multiprocessor system in which a plurality of processors are coupled via a bus; Means for notifying the processor of information about bus traffic and process scheduling; Means for scheduling a process to prevent process movement between processors when the amount of bus traffic exceeds a certain threshold And; means for scheduling a process that allows movement of the process between arbitrary processors when the traffic volume of the bus falls below a certain threshold value.

According to the present invention, when bus traffic exceeds a certain threshold, scheduling is performed so as to prevent process movement between processors, and as a result, cache snooping between processors is performed. Processing is suppressed, bus traffic is reduced, and processes can be executed efficiently.

[0007]

FIG. 1 is a block diagram showing an embodiment of a multiprocessor system to which the process scheduling system of the present invention is applied. This multiprocessor system is a shared main memory multiprocessor system in which a plurality of processors each have a cache memory.
A plurality of processors 11a, 11b, 11c, 11d are coupled via a bus 16. Each processor 11a,
11b, 11c and 11d are cache memories 1 respectively
It has 8a, 18b, 18c and 18d. Further, a bus traffic monitoring device 12 and a shared memory 13 are connected to the bus 16. Each processor 11a, 1
1b ,. ． ． 11d goes to the dispatch queue 14 on the shared memory 13 when executing the process,
The process is sequentially executed from there. At this time, the process information storage areas 15a, 15b ,. ． ． 15e in the execution processor fields 17a, 17b ,. ． ． 17
The processor in which the process should be stored is stored in e. Normally, "-1" is written in this area to indicate that it may be executed by any processor.
On the other hand, the bus traffic monitoring device 12 constantly monitors the traffic on the bus 16, and when the traffic exceeds a certain threshold, all the processors 11a,
A signal is sent to 11b, 11c, and 11d, and the fact that the traffic exceeds the threshold value is stored. This storage area may be secured on a shared memory, or may be stored by providing a memory in the bus traffic monitoring device.
Upon receipt of this signal, each processor receives the process information storage areas 15a, 15 for the currently executing process.
b ,. ． ． Execution processor ID field 1 in 15e
7a, 17b ,. ． ． The processor ID is written in 17e so that the process will be executed only by a specific processor thereafter. When each processor newly executes a process, the process information storage area 15
a, 15b ,. ． ． 15e in the execution processor ID fields 17a, 17b ,. ． ． Read the value of 17e,
The process is executed only when its value matches with its own processor ID or when its value is "-1". Execution processor ID fields 17a, 17
b ,. ． ． When the value of 17e is "-1", the processor ID is written so that each process is executed only on a specific processor. However, if there is no process that can be executed by a certain processor, the dispatch queue is checked, and if it is not empty, another execution processor ID field is changed. In this way, by controlling the process to be executed only on a specific processor, it is possible to suppress cache snoop processing between the processors and reduce bus traffic.

In this way, the traffic on the bus 16 decreases, and when the traffic falls below a certain threshold value, the bus traffic monitoring device sends a signal to all the processors via the bus 16 and Remember that is below the threshold. When each of the processors 11a, 11b, 11c, 11d receives this signal, the process information storage areas 15a, 15b ,. ． ． 1
Execution processor ID fields 17a and 17 in 5e
b ,. ． ． "-1" is written in 17e to indicate that any of the processors 11a, 11b, 11c and 11d may execute the process thereafter. In addition, each processor 11
Each time a, 11b, 11c, 11d is newly executed, the process information storage area 15 of the process is stored.
a, 15b ,. ． ． 15e in the execution processor ID fields 17a, 17b ,. ． ． If 17e is not "-1", "-1" is written so that each process again causes any of the processors 11a, 11b, 11c, 11d.
It will be able to be executed on the above, and the load will be distributed among multiple processors.

FIG. 2 is a flowchart showing an algorithm of the bus traffic monitoring device 12 shown in FIG.
In step 21, the bus traffic monitoring device 12
Monitors the traffic on bus 16 and determines in step 23 whether the traffic on bus 16 exceeds a threshold. If the traffic on the bus 16 exceeds the threshold value in step 23, it is stored that the processor fixed scheduling has been changed, and in step 27, all the processors 11a, 11b, 11c,
Signals 11d to change scheduling. If the traffic on the bus 16 falls below a certain threshold value in step 31, it is stored that the scheduling is changed to processor free, and in step 35, all the processors 11a, 11
Signals b, 11c, 11d to change the scheduling.

FIGS. 3 and 4 are conceptual diagrams showing a method of determining a threshold value used when determining a change in scheduling in the embodiment shown in FIG. 1, and the vertical axis represents the traffic volume of the bus.

The threshold value used by the bus traffic monitoring device 12 in deciding a scheduling change is shown in FIG.
Processor-free scheduling → processor fixed scheduling threshold value and processor fixed scheduling → processor free scheduling threshold value may be set to the same value. -> Processor fixed scheduling threshold and processor fixed scheduling-> processor free scheduling threshold may be changed. Since the setting of these thresholds differs depending on, for example, the computer system and the operating system (OS), it may be appropriately determined by performing a simulation or a performance evaluation test.

[0012]

As described above, according to the present invention, the bus traffic is monitored, and when the bus traffic exceeds a certain threshold, the movement of processes between processors is suppressed. By performing such scheduling, the snoop processing of the cache between the connected processors is suppressed, the bus traffic is reduced, and the process can be efficiently executed.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a multiprocessor system to which a process scheduling method of the present invention is applied.

FIG. 2 is a flowchart showing a processing flow of the bus traffic monitoring device shown in FIG.

FIG. 3 is a conceptual diagram showing a method of determining a threshold value used in determining a scheduling change in the embodiment shown in FIG.

FIG. 4 is a conceptual diagram showing a method of determining a threshold value used in determining a scheduling change in the embodiment shown in FIG.

[Explanation of symbols]

11a, 11b, 11c, 11d. ． ． Processor, 1
2. ． ． Bus traffic monitoring device, 13. ． ． Memory, 14. ． ． Dispatch queue, 15a, 15b,
15c, 15d, 15e. ． ． Area for storing process information, 16. ． ． Bus, 17a, 17b, 17c, 17
d, 17e. ． ． Execution processor ID field

Claims (6)

[Claims] 1. In a multiprocessor system in which a plurality of processors are coupled via a bus, means for monitoring the traffic volume on the bus; means for notifying the processor of information about the traffic on the bus and scheduling of the process; Means for scheduling a process so as to prevent the movement of processes between processors when the traffic volume exceeds a certain threshold; an arbitrary processor when the bus traffic volume falls below a certain threshold. A process scheduling method comprising means for scheduling a process that allows the process to move between processes. 2. A main memory shared multiprocessor system in which a plurality of processors each having a cache memory are coupled to a bus, and a bus traffic monitoring device for monitoring the traffic volume of the bus; Means for fixedly assigning to each processor each process executing in each processor when the monitoring traffic amount exceeds a set value, and setting processor fixed scheduling; and setting the monitoring traffic amount of the bus traffic monitoring device A process scheduling method, comprising means for allocating each process executed by each processor to an arbitrary processor when the value is less than or equal to a value and setting the arbitrary scheduling of the processor. 3. The shared memory is provided with an execution processor ID field for each process, and by writing information indicating a specific processor in this field, movement of processes between processors is suppressed. The process scheduling method according to Item 1. 4. Movement of processes between processors is provided by providing an execution processor ID field for each process in the shared memory, and writing information indicating which processor may execute the process in this field. The process scheduling method according to claim 1, wherein the process scheduling is permitted. 5. The processor fixed scheduling is set by providing an execution processor ID field for each process in the shared memory and writing information indicating a specific processor in this field. The described process scheduling method. 6. A processor arbitrary scheduling is set by providing an execution processor ID field for each process in the shared memory, and writing information indicating that any processor may execute the process in this field. The process scheduling method according to claim 2, wherein: