JPH06255217A - Image forming apparatus - Google Patents

Abstract

PURPOSE:To provide an image forming apparatus capable of ensuring the stable formation of an image by providing a confirmation means confirming that the clocking of a clocking means normally advances and a stop means stopping the clocking means when clocking does not normally advance. CONSTITUTION:A window comparator 17 compares whether the twofold value of voltage after t-sec from the start of the charging of a clocking condenser 128 coincides with a voltage value after 2t-sec within a definite tolerance range and outputs HIGH when both values are within the range and outputs LOW when both values are out of the range. That is, the output of the window comparator 17 becomes LOW after 2t-sec from the start point of time of the charging of the condenser 128 and, when the voltage value after 2t-sec does not become the twofold value of voltage after t-sec, the output of an NOR gate 21 becomes HIGH to grasp that the charging of the condenser 128 is not normal. When the output of the NOR gate 21 becomes HIGH, a transistor 22 is turned ON and the current flowing through a constant current diode 11 is not supplied to the condenser 128 to stop charging.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to means for suppressing malfunction of a safety circuit for preventing smoke and ignition of an image forming apparatus.

[0002]

2. Description of the Related Art Conventionally, an image forming apparatus that visualizes an image stored in a memory by fixing toner as a recording medium onto a print sheet is typified by a laser beam printer or a copying machine. It is widely used because of its quietness.

The printing operation in such an image forming apparatus is carried out by a known electrophotographic technique, that is, a process of exposing, developing and transferring, visualizing the toner on the printing paper, and finally fixing the toner on the printing paper. finish.

In order to fix the toner on the printing paper, any one of a heat method, a pressure method, and a method of using heat and pressure together is selected.

By the way, when the heat fixing method is selected, the print paper, which can be a pyrotechnic, is heated, which may cause a fire accident, and ensuring safety at this time is a very important technique.

FIG. 4 is a circuit diagram showing a control circuit of the fixing device heater and a circuit for ensuring the safety (hereinafter referred to as a safety circuit).

In the apparatus shown in FIG. 4, a fixing heater 101, which is a heating means for printing paper, a fixing device 103 including a thermistor 102 for detecting the temperature of the fixing heater, and a temperature detected by the thermistor are input as voltage values. Based on the result, the opening / closing instruction of the triac 105 which is the heater energization control circuit is performed, and when any abnormal situation occurs, the CPU 104 which immediately controls the relay 106 which is the heater energization cutoff circuit and the current which detects the heater energization current. A current detection circuit made up of a transformer 107, an overheat state detection circuit made up of a comparator 108 for detecting an overheat state of the heater, and detection of an energization current even though the CPU 104 does not output an energization instruction, or a heater From the flip-flop 109 that stores and retains the detection of the overheated state of It is made.

The circuits of the respective parts will be described in detail below.

First, the fixing device 103 is an electric component.
It is composed of a heater 101 inserted in the AC primary circuit and a thermistor 102 for monitoring the temperature of the heater 101. The resistance value of the thermistor 102 is converted into a voltage value by the voltage dividing circuit with the fixed resistor 110, and the CPU 1
No. 04 A / D conversion circuit. Although the CPU 104 having the built-in A / D conversion circuit is used in the example of FIG.
The A / D conversion circuit may be external.

The CPU 104 knows the temperature of the heater 101 by means of a thermistor, stops the ignition of the triac 105 when the temperature is high, opens the AC primary circuit, and starts the ignition of the triac when the temperature is low. Close the AC primary circuit. As a result, the heater 101 of the fixing device is controlled to have a constant temperature.

The CPU 104 outputs a triac firing signal from the port 2 output. When the ignition signal of the triac is set to HIGH or LOW level signal, the CPU 104 runs out of control, so that the fixing heater 1
The output may be fixed in the direction in which 01 is kept heated. In order to avoid this problem, the triac firing signal is pulsed.

Further, from the CPU board on which the CPU 104 is mounted, an open collector output is made by the transistor 111. By using the open collector output in this way, it is a countermeasure against the disconnection of the harness between the CPU board and the safety circuit. In other words, by installing the pull-up resistor 112 on the safety circuit side, when the harness is disconnected, it is connected to the power supply line with low impedance, so that pulse noise is not superimposed on the signal line.

The DC cut capacitor 113 is a CPU
The signal at the DC level is shut off when the cable 104 runs away or the harness is broken.

The resistor 114, the diode 115, and the capacitor 116 in the next stage are a rectifying / smoothing circuit for obtaining an envelope of a pulse-like waveform.

The transistor 117 discharges electric charge from the LED drive of the phototriac coupler 118 and the abnormal current measuring capacitor 128.

Built-in L of the phototriac coupler 118
When the ED lights up, the triac 105 fires and the AC
The primary circuit is closed. By using a phototriac coupler with a built-in zero-cross comparator, it is possible to suppress noise generation during triac ignition.

In the current transformer 107, a current value proportional to the current of the AC primary circuit is obtained in the secondary winding. next,
The resistor 119 converts the secondary winding current value into a current / voltage.

The resistors 120, 121, 122, 123 and the comparators 124, 125 constitute a window comparator. The comparators 124 and 125 are open collector outputs, and when the inverting input voltage exceeds the non-inverting input voltage, current is drawn from the output terminal.
The two comparators are wired-OR and have a resistor 126
Creates a LOW level. The window width is determined by the ratio of the four resistors, and when the input voltage of the comparator is above and below the window width, the output is LOW.
Becomes

The transistor 127 is a capacitor 128.
Is a switch for switching charging / discharging, and when the transistor 127 is OFF, the capacitor 128 is charged via the resistors 129 and 130. When the transistor is ON, the capacitor 128 is discharged through the resistor 130 and the transistor 127.

When the charging of the capacitor 128 progresses and the potential across the capacitor 128 exceeds the sum of the base-emitter voltage of the transistor 131 and the zener voltage of the zener diode 132, the transistor 131 turns on.
To do.

Further, the overheat state detection comparator 108 detects the overheat state of the fixing heater, and the transistor 133 is turned off.

The transistor 133 has a capacitor 134.
Is a switch for switching charging / discharging of the capacitor 133. When the transistor 133 is OFF, the capacitor 134 is charged via the resistors 135 and 136. When the transistor 133 is ON, the capacitor 134 is discharged through the resistor 136 and the transistor 133.

When the charging of the capacitor 134 progresses and the potential across the capacitor 134 exceeds the sum of the base-emitter voltage of the transistor 137 and the zener voltage of the zener diode 138, the transistor 137 is turned on.

The reference time for checking the duration of the overheated state is the capacitance value of the capacitor 134, the resistors 135 and 136.
Of the zener diode 138 and the zener voltage value of the zener diode 138. By optimizing these values, a system that secures safety while improving noise resistance can be constructed.

The flip-flop 109 is dedicated to setting, and is stored and held by turning on the transistor 131 or turning on the transistor 137.

That is, the CPU 104 controls the fixing heater 101.
To the flip-flop 109 due to either the fact that the energized state continues for a certain period of time or more, or the overheated state of the fixing heater 101 continues for a certain period of time, even though the energization instruction is not output. Keeps a record that it is in an abnormal state.

In the relay 106, the transistor 139 is turned off.
If N and transistor 140 is ON, current will flow through the relay winding and the relay contacts will close.

By turning the output of the port 1 of the CPU 104 to HIGH, the transistor 141 is turned on, which turns on the transistor 140. The CPU 104 can immediately shut off the fixing heater 101 by setting the output of the port 1 to LOW after detecting the occurrence of some trouble. The reason why the port 1 output is HIGH-enabled is that, when the harness of the port 1 output is disconnected, the resistance inserted in parallel between the base and emitter of the transistor 141 opens the relay contact, that is, the safety is high. This is to calm down the direction.

When flip-flop 109 is set, transistor 139 is turned off and the relay contact opens.

[0030]

However, in the above-described conventional example, when noise is induced in the inputs of the window comparators 124 and 125 or the input of the overheat state detection comparator 108, the comparator is turned on, so that the timer capacitor is turned on. There is a problem in that the charging proceeds to 128 and 134, and finally the flip-flop 109 is set, which causes a malfunction.

When the flip-flop 109 is set, it cannot be restored unless the power of the apparatus main body is turned on again, so that the operability for the user is significantly deteriorated, which is a problem.

Further, although the print paper is at the proper temperature at the time of feeding, the temperature is lowered at the time of fixing, so that there is a possibility that the print paper which is not sufficiently fixed is discharged. There was also a nature.

An object of the present invention is to provide an image forming apparatus capable of ensuring stable image formation by appropriately preventing malfunction of the timekeeping capacitor.

[0034]

In addition to the conventional example, the present invention provides a means for confirming that charging of a timekeeping capacitor proceeds normally, and a charging operation when charging does not proceed normally. And means for stopping or discharging.

According to this structure, when the charging of the timekeeping capacitor does not proceed normally, the charging operation is stopped or discharged, so that the safety circuit malfunctions due to external noise or the like. Can be prevented.

[0036]

1 is a circuit diagram showing a first embodiment of the present invention.

In the first embodiment, during the abnormal state continuation period or the overheated state continuation period, the above-described time-charging capacitor is configured to be linearly charged (a charging method in which the elapsed time is proportional to the charging potential) at the time-counting start point It is confirmed whether or not the charging potential of the capacitor after 2t seconds from is equal to twice the charging potential of the capacitor after t seconds from the time when the timing is started.

As a result, when it is not doubled,
Stop the charging operation of the timekeeping capacitor.

In FIG. 1, the same components as those in FIG. 4 for explaining the conventional example are designated by the same reference numerals and the description thereof will be omitted.

The constant current diode 11 is replaced with the resistor 129 in the conventional example, so that the clocking capacitor 12 is replaced.
8 for linear charging (constant current charging).

The counter 12 has a * CLR input (*
Indicates a negative logic signal) becomes HIGH, and counting up is started from the value 0.

The QC output of the counter 12 divides the clock frequency by 8 and the QD output by 16. Therefore, if the QC output becomes HIGH t seconds after the start of counting up, the QD output becomes HIGH 2 t seconds later. Becomes

The sequencer 13 is responsible for the sequence control of this embodiment, and executes the operations described below.
Since the sequencer 13 can be easily configured by using a logic circuit or a CPU, the description of the built-in configuration is omitted.

The sequencer 13 sets the * CLR output to LOW or LAT after the power is turned on and the clock frequency is stabilized.
CH output is LOW, * COMP output is HIGH,
* Wait for the START input to go LOW.

When the * START input becomes LOW, the sequencer 13 is activated, the * CLR output becomes HIGH, the counter 12 starts counting up, and T1
Wait for the input to go HIGH.

When the T1 input becomes HIGH, the LAT
The CH output is set to HIGH only for one clock. further,
Wait for T2 input to go HIGH. And T
When 2 inputs become HIGH, * COMP output becomes LO
W.

In the above sequence, the sequencer 13 completes one cycle and waits again for the * START input to become LOW.

The operational amplifier 14 is a capacitor 12 for clocking.
Buffer the charging potential of 8 with a high input impedance.

The analog switch 15 is the sequencer 13
Analog switch 1 when LATCH output of is HIGH
5 closes. As a result, the charging potential of the timing capacitor 128 can be sampled.

The holding capacitor 16 holds the charging potential of the timer capacitor 128 when the analog switch 15 is closed.

The window comparator 17 doubles the voltage t seconds after the charging of the capacitor 128 is started (time when the LATCH output becomes HIGH) and 2 t seconds later (*
The voltage value at the time when the COMP output becomes LOW) is compared with the voltage value within a certain permissible range, and H is determined within the range.
IGH is output, and LOW is output outside the range.

This allowable range is set by the value of the resistor 19, and the smaller the resistance value, the narrower the allowable range. Further, by making the values of the resistors 18 and 20 equal, it is possible to compare the double value of the voltage after t seconds and the voltage value after 2t seconds.

The NOR gate 21 is expressed by the negative theory, and the output becomes HIGH when the * COMP output of the sequencer 13 is LOW and the output of the window comparator 17 is LOW.

That is, * COMP output becomes LOW 2t seconds after the start of charging the capacitor 128, and at this time, if the voltage is not twice the value of the voltage t seconds later,
Since the output of the OR gate 21 becomes HIGH, it can be understood that the charging of the timekeeping capacitor 128 is not proceeding normally.

When the output of the NOR gate 21 becomes HIGH, the transistor 22 is turned on and the constant current diode 1
The current flowing through 1 is not supplied to the capacitor 128, and charging stops.

Next, a second embodiment of the present invention will be described.

In the second embodiment, 2 is set from the start of clocking.
The charging potential of the capacitor after t seconds is t
It is the same as the first embodiment until it is confirmed whether or not the charging potential of the capacitor after 2 seconds is doubled. However, when it is not doubled, the timer capacitor is forcibly discharged. This is different from the first embodiment.

FIG. 2 is a circuit diagram showing this second embodiment.

Unlike the case of FIG. 1, by connecting the collector of the transistor 22 to the timing capacitor 128, if the charging of the capacitor 128 does not proceed normally,
Forcibly discharge the capacitor 128.

Next, a third embodiment of the present invention will be described.

In the third embodiment, by comparing the A / D-converted digital values, the charging potential of the capacitor 128 2t seconds after the start of timing is twice the charging potential of the capacitor t seconds after the start of timing. To see if.

FIG. 3 is a circuit diagram showing a third embodiment of the present invention.

The same structure as that of FIG. 4 described in the conventional example and the same structure as that of FIG. 1 described in the first embodiment are
In FIG. 3, the same reference numerals are given and the description is omitted.

The A / D converter 31 has a built-in sample and hold circuit, samples and holds the VIN input voltage at the rising edge of the clock input,
After A / D conversion inside, the digital value is output in parallel in 4 bits.

When comparing the doubled value of the voltage after t seconds and the voltage value after 2t seconds, the number of bits (resolution) may be increased or decreased according to the desired matching allowable range, and the number of bits can be reduced. This widens the allowable range.

The sequencer 32 is different from the sequencer 13 in FIG. 1 in that it outputs the sampling signal for the A / D converter.

That is, since the T1 input becomes HIGH, first the SAMPLE output is made HIGH and A / D converted, and then the LATCH output is made HIGH and A / D converted.
Hold the D conversion value. When the T2 input becomes HIGH, the SAMPLE output becomes HIGH again and the A / D
After the conversion, the COMP output is set to HIGH to complete the comparison of voltage values.

The latch 33 is the LATC of the sequencer 32.
The values of the inputs D0 to D3 are internally held at the rising edge of the H output. Then, the held value is output Q0 to Q3.
Is output from.

The comparator 34 is a 4-bit digital comparator, and has A input (A0 to A3) and B input (B0
~ B3) are equal, the A = B output becomes HIGH.

The output of the latch 33 is shifted by 1 bit (that is, the Q0 output is B1 input and the Q1 output is B
By connecting Q2 output to B3 input to 2 inputs), the value held in the latch 33 is equivalent to doubling,
As a result, from the start of charging the capacitor 128, t
It is possible to compare the double value of the voltage after 2 seconds and the voltage value after 2t seconds.

When the AND gate 35 does not have a double value of the voltage after t seconds from the time when the charging of the capacitor 128 is started, the output becomes HIGH, so that the timer capacitor 128 is charged. Can be understood as not progressing normally.

That is, the output of the AND gate 35 is HI.
When it becomes GH, the transistor 22 is turned on, the current flowing through the constant current diode 11 is not supplied to the capacitor 128, and the charging is stopped.

[0073]

As described above, according to the present invention,
Since the means for confirming that the charging of the timekeeping capacitor proceeds normally and the means for stopping or discharging the charging operation when the charging does not proceed normally, it is possible It is possible to prevent malfunction of the safety circuit.

Therefore, it is possible to maintain the comfortable operability for the user and prevent the problem that the insufficiently fixed print paper is discharged.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a second embodiment of the present invention.

FIG. 3 is a circuit diagram showing a third embodiment of the present invention.

FIG. 4 is a circuit diagram showing a conventional example.

[Explanation of symbols]

 11 ... Constant current diode, 12 ... Counter, 13 ... Sequencer, 15 ... Analog switch, 16 ... Hold capacitor, 17 ... Window comparator, 21 ... NOR gate.

Claims (2)

[Claims] 1. A heating means for thermally fixing a recording medium onto a print sheet, a temperature detecting means for detecting the temperature of the heating means, and the presence or absence of an energization instruction to the heating means according to the temperature detection result. Energization instructing means, energization control means for controlling opening / closing of an energization circuit according to the presence / absence of the energization instruction, energization detection means for detecting energization current to the heating means, and energization instruction to the heating means Nevertheless, the abnormality detection means for detecting the occurrence of an abnormal state of being energized, a timing means for confirming that this abnormal state continues for a certain time or more, by the temperature detection result of the heating means, Overheat detecting means for judging an overheat state, time measuring means for confirming that the overheat state continues for a certain time or more, and a memory storage for storing and holding the abnormal state or the continuation of the overheat state. In an image forming apparatus having a holding means and an energization interruption means for stopping energization to the heating means based on the result of the memory holding, a confirmation means for confirming that the timekeeping of each of the timekeeping means normally proceeds, and a timekeeping means. The image forming apparatus is provided with a stopping unit that stops the time measuring unit when the above does not proceed normally. 2. The image forming apparatus according to claim 1, further comprising an initialization unit that initializes the timing unit when the timing does not proceed normally.