JPH06253092A - Sensor substrate - Google Patents

Abstract

PURPOSE:To enable highly accurate measurement at the time of inspecting a light receiving element array in the manufacture process of a long-length image sensor by providing an input terminal group connected to a gate driving wire so as to be a layout the same as the respective output terminal groups in a TFT driven type image sensor. CONSTITUTION:A circuit IC 22 for detection 15 operated by a start pulses ST and clock pulses. An inverse bias voltage VB is applied to respective light receiving element 2 and positive holes and electron pairs generated by incident light are stored in a capacitance generated on the drain side of switching elements T as electric charges. When pulses VGT are impressed from a driving circuit IC 21 to the gate driving wires of the elements T of a switching element group 5 for line transfer, the stored electric charges are transferred and stored in the capacitance on the drain side of the elements T of an element group 6. Then, when the pulses VG1 are impressed from the circuit IC 21 to the gate driving wires 14, the elements T of the group 6 are electrified and the stored electric charges are transferred to the wiring capacitance CL of signal wires 8. The potential of the signal wires 8 changes, the potential is detected by a potential detection circuit 22, the signal output of the light receiving element string 3 is read and thus, the photodetectors 2 are inspected.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sensor substrate used in an image input device such as a facsimile or a copying machine, and
In a long image input device of a system in which a light receiving element arranged in a line in the main scanning direction is divided into a plurality of blocks, and an output signal from the light receiving element is read for each block by matrix driving by a plurality of detection circuits. The present invention relates to a structure of a sensor substrate for accurately measuring an output quality of a light receiving element in a manufacturing process.

[0002]

2. Description of the Related Art A conventional contact type image sensor receives a reflected light from the surface of an original through a rod lens array into a long light receiving element array having a length substantially equal to the width of the original and receives the light. An electric signal corresponding to the image information of the original is detected by photoelectric conversion of each light receiving element forming the element array. In this type of image sensor, the charge generated in each light receiving element is transferred by a thin film transistor (TFT) in block units using a matrix wiring, and the charge is temporarily stored in a storage capacitor, and then the detection circuit performs time series for each block. By reading the signal to 1
A TFT drive type image sensor has been proposed which can read image information of a line and can reduce the manufacturing cost.

The TFT drive type image sensor, for example, as shown in FIG. 6, has a light receiving element array 6 in which a plurality of light receiving elements P are arranged at a constant density over a length substantially equal to the original width.
0, a thin film transistor array 61 composed of a plurality of thin film transistors (TFTs) T corresponding to 1: 1 for each light receiving element P, a driving IC 62 for detecting charges generated in the light receiving element P, and each thin film transistor. The wiring 63 connects the T and the driving IC 62 in a matrix. The light receiving element array 60 is composed of K blocks of the light receiving elements P with n blocks as one block. Each light receiving element P is connected to the drain electrode of the thin film transistor T, and the source electrodes of the n thin film transistors T forming the block are connected to the driving IC 62 for signal detection. In addition, the gate electrodes of the thin film transistors T have gate drive lines G1 to Gk for each block.
It is connected to the.

Each light receiving element P is a photodiode,
The reverse bias voltage VB is applied. When the light reflected from the document surface is incident on the light-receiving element array 60, the hole-electron pairs internally generated by the light incident during the accumulation period serve as electric charges between the equivalent capacitance of the light-receiving element P and the gate and drain of the thin film transistor T. After accumulating in the overlap capacity,
A pulse is applied to the gate drive line G1 of the thin film transistor T, and n bits of charges on the drain side of the thin film transistors (T11 to T1n) that are made conductive by the gate drive line G1 are transferred to the wiring capacitance CL of the wiring. Then, the potential of each common signal line 64 connected to the drive IC 62 changes due to this accumulated charge, and this potential is detected by the voltage follower amplifier in the drive IC (detection circuit) 62, and the time series is performed by the analog multiplexer. To the output line 65. Similarly, the above operation is repeated by applying a pulse from the gate drive circuit 66 to the gate drive lines G2 to GK to sequentially turn on the thin film transistors T for each block to form the light receiving element array 60.
The XK-bit signal is read in time series (main scanning direction), the document is moved by a document feeding means (not shown) such as a roller (sub scanning direction), and the above operation is repeated.
The image signal of the entire document surface is obtained (see, for example, Japanese Patent Laid-Open No. 62-67864).

According to the TFT drive type image sensor having the above structure, the potential change due to the electric charge accumulated in the wiring capacitance CL is extracted. Therefore, the longer the image sensor is, the more the wiring 63 connected to the driving IC 62 is increased. Becomes longer, the wiring capacitance CL, which is the equivalent capacitance, becomes larger, and the detection potential becomes smaller. In recent years, image sensors have been improved in color, high quality, and high sensitivity. However, in order to make it possible to read the entire light receiving element array 60 with one driving IC 62 like the image sensor having the above structure. Wiring 63
If the same amount of charge is accumulated in the wiring capacitance CL, the difference in the wiring capacitance CL due to the difference in the wiring length
The detected potential varies depending on the position of the light receiving element P,
This hinders the enhancement of image signal quality and sensitivity.

Therefore, as shown in FIG. 5, in order to shorten the wiring length, a TFT which performs multi-phase driving by a plurality of driving ICs.
Driven image sensors have been proposed. According to this image sensor, the thin film transistor array 61 is controlled by the gate driver circuit, and the light receiving element array 60 is controlled.
The whole is read in parallel by each driving IC. Therefore, the same number of output terminal groups 51 as the number of drive ICs are provided for connecting to each drive IC. The reading operation by each driving IC is the same as that of the TFT drive type image sensor of FIG.
(1/3 number of 0) is connected to each driving IC via the output terminal group 51 for each block.

[0007]

In the manufacturing process of the above TFT driving type image sensor, the light receiving element array 60, the thin film transistor array 61 and the driving IC are used.
In order to improve the yield and reduce the area of the expensive glass substrate 50 on which the light receiving element array 60 is formed, the driving IC is mounted on a glass epoxy resin (or paper phenol resin) substrate different from the glass substrate 50. Is formed.
That is, after the light receiving element array 60, the thin film transistor array 61, and the like are formed on the glass substrate 50 by a thin film process, a substrate inspection is performed to determine whether the light receiving element array 60 operates normally, and then the driving IC is mounted. The connection is made by wire bonding with the glass epoxy substrate.

As shown in FIG. 5, the above-mentioned substrate inspection is performed by the gate drive circuit IC71 and the analog potential detection circuits IC72 corresponding to the number of the driving ICs, and the respective circuit ICs.
Using an inspection board 70 having a contact metal pin (probe pin) 73 connected to. That is, the alignment marks 5 formed at the four corners of the glass substrate 50
2 is read by the CCD camera, the glass substrate 50 is set and arranged so as to be positioned parallel to the inspection board 70, and the contact metal pin 73 of the gate drive circuit IC 71 is connected to the gate drive line 53 of the thin film transistor array 61. In the input terminal group 54, the analog potential detection circuit IC72
The contact metal pins 73 are connected to the output terminal group 51, and the signal output from the light receiving element array 60 is monitored to determine whether or not the operation is normal.

However, when an elongated image sensor as shown in FIG. 5 is inspected, the input terminal group 54 for supplying power to the gate electrode is common to the light receiving element array 60, while the output terminal group is common. Since 51 is provided so as to correspond to the analog potential detecting circuit IC 72, the inspection board 70 is required to have a length corresponding to the reading width of the image sensor. The accuracy of the recognition error of the set position by the alignment mark 52 depends on the machine accuracy, and by its nature, there is a possibility that it may be displaced by an angle θ (about 0.5 ° C.). Therefore, when the glass substrate 50 becomes long (a width of about 300 mm for reading Japanese Industrial Standard A3), the distance d between the glass substrate 50 and the inspection board 70 widens at its end, and the contact metal pin 73 outputs. There is a problem that a contact failure is likely to occur due to a plug error due to the inability to connect accurately to each terminal of the terminal group 51. Further, if the length of the inspection board 70 is increased, the inspection device itself becomes large and expensive.

The present invention has been made in view of the above situation, in which the light receiving elements arranged in a line in the main scanning direction are divided into a plurality of phases, which are driven in parallel by a plurality of detection circuits, and in each phase. In a long image input device of a type in which a plurality of light receiving elements are grouped and an output signal is read by matrix driving, there is provided a configuration of a sensor substrate for accurately measuring an output quality of the light receiving elements in a manufacturing process thereof. The purpose is to

[0011]

In order to solve the problems of the conventional example, the sensor substrate of the present invention comprises a plurality of light receiving elements,
A plurality of switching elements that are respectively connected to the light receiving elements and transfer the charges generated in the light receiving elements, a plurality of gate drive lines that drive the switching elements in groups as a group, and a storage capacitor that stores the charges for a certain period of time. And an output substrate formed on an insulating substrate, the sensor substrate having N output terminal groups for connecting signals from the storage capacitor to N detection circuits that output N-phase drive as time series signals, respectively. Input terminal group connected to the gate drive line,
It is characterized in that a plurality of branches are provided so as to have the same layout for each of the output terminal groups.

[0012]

According to the present invention, since N input terminal groups connected to the gate drive lines are provided so as to have the same layout for each output terminal group, the input terminals are always connected to the output terminal group. Since the groups can be arranged in the same layout in the vicinity and the inspection can be performed by relatively moving the substrate on the light receiving element array side and the inspection boat, the distance between the substrate on the light receiving element array side and the inspection boat can be widened. It is possible to prevent the inspection failure. Further, the inspection board connected to the input terminal group and the output terminal group can be downsized.

[0013]

EXAMPLE An example of the sensor substrate according to the present invention will be described with reference to FIG. On an insulating substrate 1 such as a glass substrate, a group of n blocks of light receiving elements 3 composed of m-bit light receiving elements 2 is formed as a group, and the light receiving element array 3 is arranged in N phase to form a light receiving element array 4. There is. Each light receiving element 2 is connected to a first switching element that constitutes the line transfer switching element group 5.
The first switching element is connected to each of the second switching elements that form the division selection driving switching element group 6.

Each of the second switching elements is connected to a lead-out wiring 7, and the lead-out wiring 7 is bundled for each number corresponding to m bits forming one block and connected to an analog signal line 8. The light-receiving elements 1 forming one block are connected to the analog output terminal 9 via the analog signal line 8 for each m bits. Therefore, n analog output terminals 9 are provided on each side of the insulating substrate 1.
N output terminal groups 10 (three output terminal groups 10a, 10b, 10c in this embodiment) are formed.
In the embodiment, m = 4, n = 4, and N = 3, and the light receiving element array 4 is formed from 48 light receiving elements 2.
It is configured such that 6 pixels each are read by parallel driving of three phases.

Next, the line transfer switching element group 5
A gate drive line for controlling on / off of the switching elements forming the switching element group 6 for division / selection driving will be described. The gate electrodes of the respective first switching elements of the switching element group 5 for line transfer are connected to the common gate driving line 11, respectively.
The end portion of 1 is connected to the input terminal 13 through a lead wire 12 that is orthogonal to the gate drive line 11 and extends to the end portion of the insulating substrate 1 in the vicinity of the leftmost output terminal group 10a. There is. Switching element group 6 for division selection drive
Controls the m × n (16) light receiving elements 2 forming the light receiving element array 3 so as to be divided into n groups and read. As shown in FIG. Position (eg left edge, second edge from left,
The gate electrodes of the switching elements T connected to the light receiving element 2 are connected to the common gate drive line 14. Therefore, the gate drive line 14 is
n input terminals, each of which is drawn out along the gate drive line 11 and has an input terminal 13 connected to the end thereof, are formed in the vicinity of the output terminal group 10a at the left end of the insulating substrate 1. There is.

The gate drive lines 11 and 14 connected to the input terminal group 15 have lead lines 16a extending along the light receiving element array direction, and the lead lines at positions near the output terminal groups 10. 16a orthogonal to the insulating substrate 1
Branch lines 16 each including a lead wire 16b extending to the end of the output terminal group 10b, 10c
In the vicinity of the above, the inspection input terminal group 17 in which the input terminals 13 are arranged in the same layout is formed so that the positional relationship between the input terminal group 15 and the output terminal group 11a is similar.

The sensor substrate having the above structure is the insulating substrate 1.
A light receiving element array 4, switching element groups 5 and 6, wiring (gate drive lines 11 and 14 and analog signal line 8
Etc.), each terminal (the output terminal 9 and the input terminal 13) is formed by a thin film process. The input terminal group 15 and the output terminal group 10 and the gate drive circuit IC and the driving IC mounted on the glass epoxy resin substrate are provided. Before the connection is made, as described in the conventional example, it is inspected whether the output of each light receiving element 2 is normal. As shown in FIG. 1, this inspection is performed by an inspection board 20 including a gate drive circuit IC21 and an analog potential detection circuit IC22.
Sequentially for each N phase. That is, first, the input terminal group 15
And in the vicinity of the output terminal group 10a and in parallel with the sensor substrate, and for each input terminal 13 and output terminal 9 a circuit IC
Contact metal pin 23 made of tungsten metal connected to
Are arranged so as to face each other, and the contact metal pins 23 are connected to the input terminals 13 and the output terminals 9. Then, the gate drive circuit IC21 and the analog potential detection circuit I
C22 drives the light receiving element array 3 forming the first phase and monitors the signal output.

Light receiving element array 3 (light receiving element 2 which constitutes one phase
(M × n bits) of the operation will be described with reference to FIGS. 2 and 3. First, an analog potential detection circuit I is generated by a start pulse ST and a clock pulse (not shown).
Operate C22. A reverse bias voltage VB is applied to each light receiving element 2, and a hole-electron pair internally generated by the incidence of light during the accumulation period is generated as a charge on the drain side of the first switching element T (light receiving element 2 Equivalent capacitance, overlap capacitance between the gate and drain of the first switching element T, etc.). Next, when the pulse VGT is applied from the gate drive circuit IC21 to the gate drive line 11 connected to the gate electrode of the switching element T of the switching element group 5 for line transfer, most of the accumulated charges are used for division selection driving. The capacitance generated on the drain side of the switching elements T of the switching element group 6 is m
× n bits are collectively transferred and accumulated.

Next, when the pulse VG1 is applied to the first gate drive line 14 from the gate drive circuit IC21, the switching elements T of the division selection drive switching element group 6 corresponding to the rightmost bit of each block become conductive, The accumulated charges are transferred to the wiring capacitance CL of the analog signal line 8. The electric potential of the analog signal line 8 is changed by the charges transferred to the wiring capacitance CL, and this electric potential is changed to the voltage follower amplifier 24 in the analog potential detecting circuit IC22.
And output to the output line 25 in time series by the analog multiplexer. Thereafter, in the same manner, the gate drive circuit IC21 applies pulses G2 to G4 to the gate drive line 14, and the switching element group 6 for divided selective drive is provided.
The above operation is repeated by sequentially turning on the switching elements T of each group for reading the signal output of m × n bits forming the light receiving element array 3 in time series as shown in the output signal of FIG. Thus, it is possible to inspect the quality of the output signal of each light receiving element 2.

Next, the inspection board 20 is attached to the insulating substrate 1.
Are moved relative to each other, the inspection board 20 is arranged in the vicinity of the inspection input terminal group 17 and the output terminal group 10b, and the contact metal pin 23 is connected in the same manner as described above to form the second phase. The column 3 (for m × n bits of the light receiving element 2) is driven to monitor the signal output. Further, the light receiving element array 3 forming the third phase is driven in the same procedure to monitor the signal output.

As described above, the output terminal groups 10a and 10b
The inspection board 20 is formed by forming the inspection input terminal group 17 with the same layout in the vicinity of the inspection board 20.
Can be moved relative to the insulating substrate 1 for inspection. Therefore, the insulating substrate 1 and the inspection board 20 are not parallel to each other due to mechanical accuracy, and
Even if the inclination of 0.5 degrees occurs, the width of the inspection board 20 is short, so that a large gap is prevented from being generated between the insulating substrate 1 and the inspection board 20, and the contact metal pin 23 contacts each terminal. It is possible to prevent defects. In addition, the inspection board 20 is provided for the sensor board having the plurality of output terminal groups 10.
The analog potential detecting circuit IC 22 can be one, and the width of the inspection board 20 can be shortened to achieve miniaturization and cost reduction. Further, the number of contact metal pins 23 may be the total of the number corresponding to the gate drive lines 11 and 14 and the number corresponding to one output terminal group 10, and the cost can be reduced. .

After the inspection is completed, as shown in FIG. 4, the drive circuit board 30 is arranged so as to be parallel to the sensor board, and a plurality of (N) gate drive circuit ICs 31 are mounted on the drive circuit board 30. The pads formed on the analog potential detection circuit IC 32 of FIG. 4 and the terminals 13 of the input terminal group 15 and the terminals 9 of the output terminal groups 10a, 10b, 10c are connected by wire bonding 33 using Au wires. To do. At this time, the inspection input terminal group 17,
No connection is made to each of the input terminals 13 of 17 and the terminals become empty terminals.

According to the above embodiment, the line transfer switching element group 5 and the division / selection drive switching element group 6 are provided, and a two-stage transfer type TFT drive type image in which collective transfer and group-by-group transfer to the wiring capacitance are performed. Although the sensor is used, a matrix drive TFT of the sequential block transfer system without the batch transfer as described in the conventional example (FIGS. 5 and 6)
Of course, it can be applied to a drive type image sensor.

[0024]

According to the present invention, in a TFT drive type image sensor having a plurality of output terminal groups, an input terminal group connected to a gate drive line is provided so as to have the same layout for each output terminal group. Therefore, the input terminal group can always be arranged in the vicinity of the output terminal group in the same layout, and the inspection can be performed by relatively moving the substrate on the light receiving element array side and the inspection boat. It is possible to prevent the gap between the substrate on the side and the inspection boat from widening, prevent contact failure between the IC of the inspection boat and each of the terminals, and improve the inspection accuracy. Further, the number of inspection ICs mounted on the inspection board can be minimized, and the inspection board can be downsized and the cost can be reduced.

[Brief description of drawings]

FIG. 1 is an explanatory plan view showing a sensor board and an inspection board according to an embodiment of the present invention.

FIG. 2 is an image sensor 1 formed on a sensor substrate.
It is an equivalent circuit diagram of phases.

FIG. 3 is a timing chart diagram for explaining a reading operation for one phase of the image sensor of the above.

FIG. 4 is an explanatory plan view of an image reading device using the sensor substrate of FIG.

FIG. 5 is an explanatory plan view showing a sensor board and an inspection board provided with a plurality of analog detection output terminal groups.

FIG. 6 is an equivalent circuit diagram of a matrix drive type image sensor.

[Explanation of symbols]

1 ... Insulating substrate, 2 ... Light receiving element, 3 ... Light receiving element array,
4 ... Light receiving element array, 5 ... Line transfer switching element group, 6 ... Divided / selective drive switching element group, 8
... analog signal line, 9 ... output terminal, 10 ... output terminal group, 11 ... gate drive line, 13 ... input terminal, 14
... gate drive line, 15 ... input terminal group, 16 ... branch line,
17 ... Input terminal group for inspection, 20 ... Inspection board, 2
DESCRIPTION OF SYMBOLS 1 ... Gate drive circuit IC, 22 ... Analog potential detection circuit IC, 23 ... Contact metal pin, 30 ... Drive circuit board

─────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] April 23, 1993

[Procedure Amendment 1]

[Document name to be corrected] Drawing

[Name of item to be corrected] Figure 6

[Correction method] Added

[Correction content]

[Figure 6]

Claims (1)

[Claims] 1. A plurality of light-receiving elements, a plurality of switching elements which are respectively connected to the light-receiving elements and transfer charges generated in the light-receiving elements, and a plurality of gate drive lines which drive the plurality of switching elements as a group by division selection. And a storage capacitor that stores the charge for a certain period of time is formed on an insulating substrate,
An input terminal connected to the gate drive line, in a sensor substrate having N output terminal groups for connecting to N detection circuits that respectively output a signal from the storage capacitor as a time-series signal in N-phase drive A sensor substrate, wherein a plurality of groups are provided so as to have the same layout with respect to each of the output terminal groups.