JPH06242236A - Frequency agility type radar beacon - Google Patents

Frequency agility type radar beacon

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Publication number
JPH06242236A
JPH06242236A JP5029501A JP2950193A JPH06242236A JP H06242236 A JPH06242236 A JP H06242236A JP 5029501 A JP5029501 A JP 5029501A JP 2950193 A JP2950193 A JP 2950193A JP H06242236 A JPH06242236 A JP H06242236A
Authority
JP
Japan
Prior art keywords
frequency
input
unit
level
radar
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5029501A
Other languages
Japanese (ja)
Other versions
JP3094721B2 (en
Inventor
Yoshiyuki Aritou
儀之 有藤
Hiroshi Horikawa
博 堀川
Masaru Aizawa
勝 相澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP05029501A priority Critical patent/JP3094721B2/en
Publication of JPH06242236A publication Critical patent/JPH06242236A/en
Application granted granted Critical
Publication of JP3094721B2 publication Critical patent/JP3094721B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To provide a frequency agility radar beacon in which a beacon pulse having the same frequency as that of a radar pulse is output to radar pulses having different frequencies even if the radar pulses are input during receiving of the radar pulse having a frequency f1. CONSTITUTION:Frequency values of frequencies f1, f2, f3 of radar pulses to be input are stored in reception frequency holders 11, 12, 13, levels are stored in memories 21, 22, 23, the frequency values are sent from the holders 11, 12, 13 to an equal frequency signal output unit 4 during a radar pulse period in response to the frequencies f1, f2, f3 by changeover switches 60, 61, and signals having the same frequencies as the frequency values to be input are output during a radar pulse, and input to a modulator 5. Levels of the frequencies f1, f2, f3 are input to a peak detector 7 and a level comparator 8 from the memories 21, 22, 23, the modulator 5 is turned ON at the time of a main lobe, and turned OFF at the time of a side lobe.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、周波数f1 のレーダパ
ルス受信中、異なる周波数のレーダパルスが入力しても
これ等に対し、回路の精度のあまさ及び環境条件の変化
があっても、レーダパルスと同じ周波数のビーコンパル
スを出力出来る周波数アジャイル式レーダビーコン装置
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention, even if radar pulses of different frequencies are input during reception of radar pulses of frequency f 1 , even if the accuracy of the circuit and the environmental conditions change, The present invention relates to a frequency agile radar beacon device capable of outputting a beacon pulse having the same frequency as a radar pulse.

【0002】[0002]

【従来の技術】図4は従来例の周波数アジャイル式レー
ダビーコン装置の要部のブロック図である。
2. Description of the Related Art FIG. 4 is a block diagram of a main part of a conventional frequency agile radar beacon device.

【0003】回路の精度のあまさ及び環境条件の変化が
あっても、レーダパルスと同じ周波数のビーコンパルス
を出力出来る周波数アジャイル式レーダビーコン装置と
しては、本出願人が平成5年1月20日特許出願したレ
ーダビーコン装置があり、これは図4に示す如きもので
ある。
As a frequency agile type radar beacon device capable of outputting a beacon pulse having the same frequency as the radar pulse even if the accuracy of the circuit is changed and the environmental conditions are changed, the present applicant has filed a patent on January 20, 1993. There is a radar beacon device applied for, which is as shown in FIG.

【0004】図4の動作を説明すると、受信部32より
入力するレーダ信号パルスは切替スイッチ64を介し周
波数弁別器1ー1に入力し、弁別された周波数は、A/
D変換部1ー2に入力し、ディジタル信号に変換され切
替スイッチ63を介して受信信号保持回路11に入力し
周波数値を保持する。
To explain the operation of FIG. 4, the radar signal pulse input from the receiver 32 is input to the frequency discriminator 1-1 through the changeover switch 64, and the discriminated frequency is A /
It is input to the D conversion unit 1-2, converted into a digital signal, and input to the reception signal holding circuit 11 via the changeover switch 63 to hold the frequency value.

【0005】受信信号保持回路11に保持された周波数
値はデータ保持回路41に送られ保持され、D/A変換
部37に入力しアナログ信号の電圧値となり電圧制御発
振部36に入力し、この電圧に見合った周波数の信号を
発振させ、変調部38に入力し、符号化信号にて変調さ
れる。
The frequency value held in the received signal holding circuit 11 is sent to and held in the data holding circuit 41, is input to the D / A conversion section 37, becomes the voltage value of the analog signal, and is input to the voltage controlled oscillation section 36. A signal having a frequency suitable for the voltage is oscillated, input to the modulator 38, and modulated by the encoded signal.

【0006】この受信信号保持回路11に周波数値が保
持され、アナログ信号の電圧値が電圧制御発振部36に
入力すると、制御部50はこれを検出し制御信号を送
り、切替スイッチ64及び切替スイッチ63を点線側と
する。
When the frequency value is held in the reception signal holding circuit 11 and the voltage value of the analog signal is input to the voltage controlled oscillator 36, the controller 50 detects this and sends a control signal, and the changeover switch 64 and the changeover switch. 63 is the dotted line side.

【0007】すると、変調部38にて、符号化信号によ
り変調された信号は、切替スイッチ65,切替スイッチ
64を介して周波数弁別器1ー1に入力し、弁別された
周波数の信号は、A/D変換部1ー2にてディジタル信
号に変換され、比較回路30に入力し、受信信号保持回
路11に保持されたレーダ信号の周波数値との差を求め
る。
Then, the signal modulated by the coded signal in the modulator 38 is input to the frequency discriminator 1-1 through the changeover switches 65 and 64, and the discriminated frequency signal is A The digital signal is converted into a digital signal by the / D converter 1-2, and the digital signal is input to the comparison circuit 30 to obtain the difference from the frequency value of the radar signal held in the received signal holding circuit 11.

【0008】比較回路30にては差が0であることが望
ましいが、D/A変換部37の精度のあまさ(A/D変
換部1ー2は、レーダ信号及び電圧制御発振部36の出
力も通るのでA/D変換部1ー2の精度のあまさは問題
にならなくなる)及び温度,電源電圧等の環境条件の変
化による電圧制御発振部36の周波数の変化により、差
分が生ずる。
It is desirable that the difference is 0 in the comparison circuit 30, but the accuracy of the D / A conversion unit 37 (the A / D conversion unit 1-2 outputs the radar signal and the output of the voltage control oscillation unit 36). The accuracy of the A / D converters 1-2 does not matter, and a difference occurs due to a change in the frequency of the voltage controlled oscillator 36 due to a change in environmental conditions such as temperature and power supply voltage.

【0009】この比較回路30にての、受信信号保持回
路11に保持されたレーダ信号の周波数の値より、電圧
制御発振部36の周波数の値を引いた差分を加算回路3
1に入力し、データ保持回路41に記憶しているレーダ
信号の周波数の値に加算し、加算した値を又データ保持
回路41に記憶し、D/A変換部37に入力し、加算し
た値に見合うアナログの電圧を出力させ電圧制御発振部
36に与える。
In the comparison circuit 30, a difference obtained by subtracting the value of the frequency of the voltage controlled oscillator 36 from the value of the frequency of the radar signal held in the reception signal holding circuit 11 is added.
1 is added to the frequency value of the radar signal stored in the data holding circuit 41, the added value is stored in the data holding circuit 41 again, and is input to the D / A conversion unit 37, and the added value is added. The analog voltage corresponding to is output and applied to the voltage controlled oscillator 36.

【0010】すると電圧制御発振部36の出力信号は、
変調部38に入力し、符号化信号により変調され、切替
スイッチ65,切替スイッチ64を介して周波数弁別器
1ー1に入力し、弁別された周波数の信号は、A/D変
換部1ー2にてディジタル信号に変換され、比較回路3
0に入力し、受信信号保持回路11に保持されたレーダ
信号の周波数値との差分を求め、データ保持回路41に
記憶している周波数の値に加算し、加算した値を又デー
タ保持回路41に記憶し、D/A変換部37に入力し、
加算した値に見合うアナログの電圧を出力させ電圧制御
発振部36に与えることを、比較回路30にて差分が0
と認められる迄繰り返す。
Then, the output signal of the voltage controlled oscillator 36 is
The signal is input to the modulator 38, is modulated by the encoded signal, and is input to the frequency discriminator 1-1 via the changeover switch 65 and the changeover switch 64. The signal of the discriminated frequency is the A / D converter 1-2. Is converted into a digital signal by the comparison circuit 3
0, the difference with the frequency value of the radar signal held in the received signal holding circuit 11 is obtained, and the difference is added to the frequency value stored in the data holding circuit 41, and the added value is again held in the data holding circuit 41. And input to the D / A converter 37,
The comparison circuit 30 outputs the analog voltage corresponding to the added value and gives it to the voltage controlled oscillator 36.
Repeat until it is admitted.

【0011】比較回路30にて差分が0と認められる
と、制御部50は、制御信号を発し、切替スイッチ63
を元の実線側とし、切替スイッチ65を、メインロープ
の信号の受信時間の約17msの間点線側とし、レーダ
信号の周波数に合致したビーコン信号を送信部35を介
して送信させ、切替スイッチ64,65を元の実線側接
続とする。
When the comparison circuit 30 recognizes that the difference is 0, the control section 50 issues a control signal to change the switch 63.
Is the original solid line side, and the changeover switch 65 is the dotted line side for about 17 ms of the reception time of the signal of the main rope. , 65 are the original solid line side connections.

【0012】即ち、回路の精度のあまさ及び、温度,電
源電圧等の環境条件の変化があり電圧制御発振部36の
出力周波数がレーダ信号の周波数と異なっていても、電
圧制御発振部36の出力周波数をレーダ信号の周波数に
合致させてから、所定の時間ビーコン信号として出力す
るので、ビーコン信号の周波数がレーダ信号の周波数よ
りずれることがなくなる。
That is, even if the output frequency of the voltage controlled oscillator 36 is different from the frequency of the radar signal due to the accuracy of the circuit and changes in environmental conditions such as temperature and power supply voltage, the output of the voltage controlled oscillator 36 is different. Since the frequency is matched with the frequency of the radar signal and then output as the beacon signal for a predetermined time, the frequency of the beacon signal does not deviate from the frequency of the radar signal.

【0013】[0013]

【発明が解決しようとする課題】しかしながら、メイン
ローブの周波数f1 のメインローブの信号の受信時間
は、他の船からの異なる周波数のレーダパルスの信号が
入力してもこのレーダパルスに対しては異なる周波数の
レーダパルスの周波数に合致したビーコン信号を出力せ
ず、他の船にはサービス出来ない問題点がある。
However, the reception time of the signal of the main lobe of the frequency f 1 of the main lobe is longer than that of the radar pulse even if the signal of the radar pulse of different frequency is input from another ship. Does not output a beacon signal that matches the frequency of the radar pulse of a different frequency, and there is a problem that it cannot service other ships.

【0014】本発明は、周波数f1 のメインローブの信
号の受信時間に、異なる周波数のレーダパルスが入力し
てもこれ等に対し、回路の精度のあまさ及び環境条件の
変化があっても、レーダパルスと同じ周波数のビーコン
パルスを出力出来る周波数アジャイル式レーダビーコン
装置の提供を目的としている。
According to the present invention, even if radar pulses of different frequencies are input during the reception time of the signal of the main lobe of frequency f 1 , even if the accuracy of the circuit and the environmental conditions change, It is an object of the present invention to provide a frequency agile radar beacon device capable of outputting a beacon pulse having the same frequency as a radar pulse.

【0015】[0015]

【課題を解決するための手段】図1は本発明の原理ブロ
ック図である。図1に示す如く、受信したレーダパルス
の周波数を弁別しA/D変換して周波数データとし、周
波数識別部2及び第1,第2,第3・・の受信周波数保
持部11,12,13,・・に入力させる周波数データ
変換部1と、入力する該周波数データを識別しレーダパ
ルス期間、制御部3に通知する周波数識別部2と、受信
したレーダパルスのレベルを識別しそのレベルデータを
レーダパルス期間、第1,第2,第3・・のメモリ2
1,22,23,・・・,ピーク検出部7及びレベル比
較部8に入力させるレベル識別部6と、入力した周波数
データを、制御部3の制御により、周波数毎に保持する
該第1,第2,第3・・の受信周波数保持部11,1
2,13,・・と、入力するレベルデータを指示された
アドレスに記憶する該第1,第2,第3・・のメモリ2
1,22,23,・・・と、レーダパルスの周波数と同
じ周波数信号を出力する同一周波数信号出力部4と、レ
ベル比較部8の出力により変調部5をオンオフとする符
号発生部9と、該同一周波数信号出力部4の出力を入力
し、該符号発生部9よりの信号で符号に合わせてオンオ
フする変調部5と、該第1,第2,第3・・の受信周波
数保持部11,12,13,・・の出力夫々と該同一周
波数信号出力部4の入力との接続を切り替える第1の切
替スイッチ60と、該第1,第2,第3・・のメモリ2
1,22,23,・・・の出力夫々と該ピーク検出部7
及び該レベル比較部8の入力との接続を切り替える第2
の切替スイッチ61と、該第2の切替スイッチ61を介
して入力する各メモリに記憶したレベルを、現入力レベ
ルと比較し大きい方を夫々各メモリに返送記憶する該ピ
ーク検出部7と、該第2の切替スイッチ61を介して入
力する各メモリに記憶したレベルと現入力レベルを比較
し所定の範囲内か所定外かを検出し、所定内の時は現入
力レベルのレーダパルス期間該符号発生部9より符号を
出力させ所定外の時は現入力レベルのレーダパルス期間
該符号発生部9よりオフ信号を出力させる該レベル比較
部8と、最初に入力する第1の周波数データのf1 は該
第1の受信周波数保持部11に保持させ、次に入力した
第2の周波数データが該第1の周波数データf1 と異な
るf2 の時は次の第2の受信周波数保持部12に保持さ
せ、次に入力した第3の周波数データが該第1,第2の
周波数データf1 ,f2 と異なる時は次の第3の受信周
波数保持部13に保持させる如き動作をさせ、又入力す
る周波数データが、第1,第2,第3,・・の周波数に
応じ、該第1,第2の切替スイッチ60,61を、該同
一周波数信号出力部4と該第1,第2,第3・・の受信
周波数保持部11,12,13,・・夫々との接続、該
ピーク検出部7及び該レベル比較部8と該第1,第2,
第3・・のメモリ21,22,23,・・・夫々との接
続とし、又該第1,第2,第3・・の受信周波数保持部
11,12,13,・・に保持した周波数データをレー
ダパルス期間第1の切替スイッチ60を介して、同一周
波数信号出力部4に入力すると共に、夫々に対応する該
第1,第2,第3・・のメモリ21,22,23,・・
・にアドレスとして入力させ、又該第1,第2,第3・
・のメモリ21,22,23,・・・に夫々記憶したレ
ベルデータをレーダパルス期間、該第2の切替スイッチ
61を介して、該ピーク検出部7及びレベル比較部8に
入力させ且つ該ピーク検出部7の出力を夫々該第1,第
2,第3・・のメモリ21,22,23,・・・に入力
して元のアドレス位置に記憶させる制御部3とを備えた
構成とする。
FIG. 1 is a block diagram showing the principle of the present invention. As shown in FIG. 1, the frequency of the received radar pulse is discriminated and A / D converted into frequency data, and the frequency discriminating unit 2 and the first, second, third ... Reception frequency holding units 11, 12, 13 ... The frequency data conversion unit 1 to be input to, the frequency identification unit 2 that identifies the input frequency data and notifies the radar pulse period to the control unit 3, the level of the received radar pulse is identified, and the level data is Memory 2 for the first, second, third, ... radar pulse period
, 22, 23, ..., The level identification unit 6 to be input to the peak detection unit 7 and the level comparison unit 8 and the input frequency data are held for each frequency by the control of the control unit 3. The second, third, ... Reception frequency holding units 11, 1
, 2, and the first, second, third, etc. memories 2 for storing input level data at designated addresses
, 22, 23, ..., The same frequency signal output unit 4 that outputs the same frequency signal as the frequency of the radar pulse, and the code generation unit 9 that turns the modulation unit 5 on and off by the output of the level comparison unit 8, A modulator 5 which receives the output of the same frequency signal output unit 4 and turns on / off according to a code by a signal from the code generator 9, and a reception frequency holding unit 11 of the first, second, third ... , 12, 13, ..., And the first changeover switch 60 for switching the connection between the respective outputs of the same frequency signal output section 4 and the first, second, third ,.
1, 2, 23, ... Outputs and the peak detector 7
And a second switching connection with the input of the level comparison unit 8
Changeover switch 61, the peak detection unit 7 for comparing the level stored in each memory input via the second changeover switch 61 with the current input level, and returning the larger one to each memory for storage. The level stored in each memory inputted via the second changeover switch 61 is compared with the current input level to detect whether it is within a predetermined range or out of a predetermined range. The level comparator 8 which outputs a code from the generator 9 and outputs an off signal from the code generator 9 during the radar pulse period of the current input level when the value is out of the predetermined range, and f 1 of the first frequency data which is input first. Is held in the first receiving frequency holding unit 11, and when the next input second frequency data is f 2 different from the first frequency data f 1 , the second receiving frequency holding unit 12 is held. Hold and enter the next Frequency data is first, second frequency data f 1, f 2 and at a different time than is the next third such is holding operation to the reception frequency holding unit 13, and input to the frequency data, the first, The first and second changeover switches 60 and 61 are set to hold the same frequency signal output unit 4 and the first, second, third, ... Reception frequencies according to the second, third, ... .., the peak detector 7, the level comparator 8, and the first, second, and
The frequencies stored in the third, ..., Memories 21, 22, 23, ... Respectively, and held in the first, second, third, ... Reception frequency holding units 11, 12, 13 ,. The data is input to the same frequency signal output unit 4 via the first changeover switch 60 for the radar pulse period, and the corresponding first, second, third memory 21, 22, 23 ,.・
・ Enter the address as an address, and the first, second, third
The level data stored in each of the memories 21, 22, 23, ... Are input to the peak detection unit 7 and the level comparison unit 8 via the second changeover switch 61 during the radar pulse period and the peaks are input. The output of the detection unit 7 is input to the first, second, third, ... Memories 21, 22, 23, ... And stored in the original address position. .

【0016】[0016]

【作用】本発明によれば、受信したレーダパルスは周波
数データ変換部1にて周波数データに変換され周波数識
別部2に入力し、レーダパルス期間、制御部3に通知さ
れる。
According to the present invention, the received radar pulse is converted into frequency data by the frequency data conversion unit 1 and input to the frequency identification unit 2, and the radar pulse period is notified to the control unit 3.

【0017】又受信したレーダパルスはレベル識別部6
にてレベルが識別されレーダパルス期間、第1,第2,
第3・・のメモリ21,22,23,・・・,ピーク検
出部7及びレベル比較部8に入力する。
Further, the received radar pulse has a level identification section 6
The level is identified at the radar pulse period, the first, second, and
It is input to the third memory 21, 22, 23, ..., The peak detector 7 and the level comparator 8.

【0018】制御部3は、最初に入力する第1の周波数
データのf1 は該第1の受信周波数保持部11に保持さ
せ、次に入力した第2の周波数データが該第1の周波数
データf1 と異なるf2 の時は次の第2の受信周波数保
持部12に保持させ、次に入力した第3の周波数データ
が該第1,第2の周波数データf1 ,f2 と異なる時は
次の第3の受信周波数保持部13に保持させる如き動作
をさせ、又入力する周波数データが、第1,第2,第
3,・・の周波数に応じ、該第1の切替スイッチ60
を、該同一周波数信号出力部4と該第1,第2,第3・
・の受信周波数保持部11,12,13,・・夫々とを
接続し、受信周波数保持部に記憶している周波数データ
をレーダパルス期間、同一周波数信号出力部4に入力さ
せ、レーダパルス期間、周波数データと同じ周波数の信
号を出力させ変調部5に入力させる。
The control unit 3 causes the first receiving frequency holding unit 11 to hold f 1 of the first frequency data input first, and the second frequency data input next is the first frequency data. When f 2 different from f 1 is held in the next second reception frequency holding unit 12, when the next input third frequency data is different from the first and second frequency data f 1 and f 2. Operates such that it is held by the third receiving frequency holding unit 13, and the frequency data to be input corresponds to the first, second, third, ...
The same frequency signal output unit 4 and the first, second, third
The reception frequency holding units 11, 12, 13, ... Are connected to each other, and the frequency data stored in the reception frequency holding unit is input to the same frequency signal output unit 4 during the radar pulse period. A signal having the same frequency as the frequency data is output and input to the modulator 5.

【0019】又該第1,第2,第3・・の受信周波数保
持部11,12,13,・・に保持した周波数データを
レーダパルス期間第1の切替スイッチ60に出力すると
共に、夫々に対応する該第1,第2,第3・・のメモリ
21,22,23,・・・にアドレスとして入力させ
て、レベル識別部6よりのレベルデータを記憶させる。
Further, the frequency data held in the first, second, third, ... Receiving frequency holding units 11, 12, 13, .. The corresponding first, second, third, ... Memories 21, 22, 23, ... Are input as addresses to store the level data from the level identification section 6.

【0020】又第2の切替スイッチ61を、入力する周
波数データに応じ、該ピーク検出部7及びレベル比較部
8と該第1,第2,第3・・のメモリ21,22,2
3,・・・夫々と接続させ又該第1,第2,第3・・の
メモリ21,22,23,・・・に夫々記憶したレベル
データをレーダパルス期間、該第2の切替スイッチ61
を介して、該ピーク検出部7及びレベル比較部8に入力
させ、ピーク検出部7では、入力するメモリに記憶した
レベルを、現入力レベルと比較し大きい方をメモリに返
送記憶させ又入力させることを同じ周波数のレーダパル
ス入力毎に繰り返し、入力するメモリに記憶したレベル
と現入力レベルを比較し所定の範囲内か所定外かを検出
させ、所定内の時は現入力レベルのレーダパルス期間該
符号発生部9より符号信号を出力させ変調部5より同一
周波数信号出力部4より入力する周波数信号の周波数に
て符号発生部9よりの符号に合わせ変調しビーコン信号
として出力させ、所定外の時は現入力レベルのレーダパ
ルス期間該符号発生部9よりオフ信号を出力させ変調部
5よりの出力を止める。
Further, the second change-over switch 61 is responsive to the frequency data to be input, the peak detection section 7 and the level comparison section 8 and the first, second, third, ... Memories 21, 22, 2
3, ... Level data stored in the first, second, third, ... Memories 21, 22, 23, ..
Via the input to the peak detection unit 7 and the level comparison unit 8. In the peak detection unit 7, the level stored in the input memory is compared with the current input level and the larger one is returned to the memory for storage and input again. This is repeated for each radar pulse input of the same frequency, and the level stored in the input memory is compared with the current input level to detect whether it is within a predetermined range or out of the predetermined range. The code generator 9 outputs a code signal, and the modulator 5 modulates at the frequency of the frequency signal input from the same frequency signal output unit 4 in accordance with the code from the code generator 9 to output as a beacon signal. At this time, the off signal is output from the code generator 9 and the output from the modulator 5 is stopped during the radar pulse period of the current input level.

【0021】尚同一周波数信号出力部4は、回路の精度
のあまさ及び環境条件の変化があっても、レーダパルス
と同じ周波数の信号を出力するものである。即ち、メイ
ンローブの周波数f1 のレーダパルス受信中、異なる周
波数のレーダパルスが入力してもこれ等に対し、回路の
精度のあまさ及び環境条件の変化があっても、レーダパ
ルスと同じ周波数のビーコンパルスを出力出来るように
なる。
The same frequency signal output section 4 outputs a signal having the same frequency as the radar pulse even if the accuracy of the circuit and the environmental conditions change. That is, even if radar pulses of different frequencies are input during reception of the radar pulse of the frequency f 1 of the main lobe, even if the accuracy of the circuit and the environmental conditions change, the radar pulse of the same frequency as the radar pulse is received. Beacon pulse can be output.

【0022】[0022]

【実施例】図2は本発明の実施例の周波数アジャイル式
レーダビーコン装置の要部のブロック図、図3は本発明
の実施例の周波数f1 ,f2 のレーダパルスが略同時に
入力した場合のビーコンパルスを示す図である。
FIG. 2 is a block diagram of an essential part of a frequency agile type radar beacon device according to an embodiment of the present invention, and FIG. 3 is a case where radar pulses of frequencies f 1 and f 2 according to the embodiment of the present invention are input substantially at the same time. It is a figure which shows the beacon pulse of.

【0023】図2は、図3(A)に示す如く、周波数f
1 ,f2 のレーダパルスが略同時に入力しても、図3
(B)に示す如く、周波数f1 ,f2 のビーコンパルス
を出力出来る周波数アジャイル式レーダビーコン装置を
示している。
FIG. 2 shows the frequency f as shown in FIG.
Even if radar pulses 1 and f 2 are input almost at the same time, as shown in FIG.
As shown in (B), a frequency agile radar beacon device capable of outputting beacon pulses of frequencies f 1 and f 2 is shown.

【0024】レーダパルスは、通常図3に示す如く数百
nsの幅で数百μs周期で送信され、メインローブの期
間は数十msである。本発明では、回路の精度のあま
さ、環境の変化があってもレーダパルスと同じ周波数と
した、レーダパルス期間のビーコンパルスを出力するこ
とで、周波数f 1 ,f2 のレーダパルスが略同時に入力
しても、周波数f1 ,f2 のビーコンパルスを出力出来
るようになっている。
The radar pulse is usually several hundreds as shown in FIG.
It is transmitted with a period of several hundreds of μs and has a main lobe period.
The interval is several tens of ms. In the present invention, the accuracy of the circuit
Now, even if the environment changes, the same frequency as the radar pulse
The beacon pulse during the radar pulse period.
And at frequency f 1, F2Radar pulses are input almost simultaneously
Even if the frequency f1, F2Can output the beacon pulse of
It has become so.

【0025】図2では、船舶レーダから発射されたレー
ダパルスは受信部32にて受信され、分配部33に入力
し分配されたレーダパルスは周波数弁別部1ー1および
検波部34に入力する。
In FIG. 2, the radar pulse emitted from the ship radar is received by the receiving unit 32 and is input to the distributing unit 33, and the distributed radar pulse is input to the frequency discriminating unit 1-1 and the detecting unit 34.

【0026】周波数弁別部1ー1では周波数が弁別され
A/D変換部1ー2にてディジタル信号となり、周波数
識別部2及び切替スイッチ63を介して受信周波数保持
部11,12に入力する。
The frequency discriminating unit 1-1 discriminates the frequencies, and the A / D converting unit 1-2 produces a digital signal, which is input to the receiving frequency holding units 11 and 12 via the frequency discriminating unit 2 and the changeover switch 63.

【0027】周波数識別部2では受信したデータより周
波数がf1 かf2 かを識別しレーダパルス期間、制御部
3に通知する。制御部3は、周波数がf1 のパルスであ
れば、受信周波数保持部11に保持させ、周波数がf2
のパルスであれば、受信周波数保持部12に保持させ
る。
The frequency identifying section 2 identifies whether the frequency is f 1 or f 2 from the received data and notifies the control section 3 of the radar pulse period. If the frequency of the pulse is f 1 , the control unit 3 causes the reception frequency holding unit 11 to hold the pulse, and the frequency is f 2
If the pulse is, the reception frequency holding unit 12 holds the pulse.

【0028】すると周波数データはデータ保持回路4
1,42に保持される。そして制御部3の制御により切
替スイッチ60,62は周波数データがf1 の時は実線
側,f2 の時は点線側とされ、又切替スイッチ63は点
線側,切替スイッチ66はオンとされ、比較回路30,
加算回路31,D/A変換部37,電圧制御発振器3
6,変調部5,切替スイッチ66,周波数弁別部1ー
1,A/D変換部1ー2,切替スイッチ63,データ保
持部41又は42のループにて、図4にて説明したと同
様にして、電圧制御発振器36の出力周波数を入力する
周波数データと同じにし、切替スイッチ66をオフ,切
替スイッチ63を実線側とし、レーダパルス期間、周波
数データと同じ周波数のパルスを出力し変調部5に入力
させる。
Then, the frequency data is stored in the data holding circuit 4
Held at 1, 42. Under the control of the control unit 3, the changeover switches 60 and 62 are set to the solid line side when the frequency data is f 1 , the dotted line side when the frequency data is f 2 , the changeover switch 63 is set to the dotted line side, and the changeover switch 66 is turned on. Comparison circuit 30,
Adder circuit 31, D / A converter 37, voltage controlled oscillator 3
6, a modulation unit 5, a changeover switch 66, a frequency discrimination unit 1-1, an A / D conversion unit 1-2, a changeover switch 63, a data holding unit 41 or 42 in the same loop as described in FIG. Then, the output frequency of the voltage controlled oscillator 36 is set to be the same as the input frequency data, the changeover switch 66 is turned off, and the changeover switch 63 is set to the solid line side to output a pulse having the same frequency as the radar pulse period and frequency data to the modulator 5. Input.

【0029】検波部34では、入力するレーダパルスを
検波し、レベル識別部6にてレベルを識別し、メモリ2
1,22、ピーク検出部7,レベル比較部8に入力させ
る。この時、制御部3は、入力する周波数データが、周
波数f1 ,f2 に応じ、受信周波数保持部11,12に
保持した周波数データをレーダパルス期間切替スイッチ
60に出力すると共に、夫々に対応するメモリ21,2
2にアドレスとして入力させて、レベル識別部6よりの
レベルデータを記憶させる。
The detection unit 34 detects the radar pulse to be input, the level identification unit 6 identifies the level, and the memory 2
1, 22 and the peak detector 7 and the level comparator 8. At this time, the control unit 3 outputs the frequency data held in the reception frequency holding units 11 and 12 to the radar pulse period changeover switch 60 in accordance with the frequencies f 1 and f 2 to be input, and also responds to them respectively. Memory 21,2
2 is input as an address, and the level data from the level identification unit 6 is stored.

【0030】又切替スイッチ61を、入力する周波数デ
ータf1 ,f2 に応じ、ピーク検出部7及びレベル比較
部8とメモリ21,22夫々と接続させ又メモリ21,
22に夫々記憶したレベルデータをレーダパルス期間、
切替スイッチ61を介して、ピーク検出部7及びレベル
比較部8に入力させ、ピーク検出部7では、入力するメ
モリに記憶したレベルを、現入力レベルと比較し大きい
方をメモリに返送記憶させ又入力させることを、レーダ
パルスが入力する度に繰り返し、レベル比較部8では、
入力するモリに記憶したレベルと現入力レベルを比較し
20dB以内か以外かを検出し、20dB以内の時はメ
インローブ内であるので、現入力レベルのレーダパルス
期間該符号発生部9より符号信号を出力させ変調部5よ
りレーダパルスと同一周波数のビーコン信号として出力
させ、20dB以下の時はサイドローブの信号であるの
で、現入力レベルのレーダパルス期間該符号発生部9よ
りオフ信号を出力させ変調部5よりの出力を止める。
Further, the change-over switch 61 is connected to the peak detecting section 7 and the level comparing section 8 and the memories 21 and 22 in accordance with the inputted frequency data f 1 and f 2 , and the memories 21 and 22, respectively.
The level data stored in each of 22 is used for the radar pulse period,
The peak detection unit 7 and the level comparison unit 8 are input via the changeover switch 61. In the peak detection unit 7, the level stored in the input memory is compared with the current input level and the larger one is returned and stored in the memory. The input is repeated every time a radar pulse is input, and the level comparison unit 8
The level stored in the input memory is compared with the current input level to detect whether it is within 20 dB or not. When it is within 20 dB, it is within the main lobe. Therefore, the radar signal period of the current input level is generated by the code generator 9 from the code signal. Is output as a beacon signal having the same frequency as the radar pulse from the modulator 5, and when it is 20 dB or less, since it is a side lobe signal, the off signal is output from the code generator 9 during the radar pulse period of the current input level. The output from the modulator 5 is stopped.

【0031】即ち、図3(A)に示す如く、周波数
1 ,f2 のレーダパルスが略同時に入力しても、図3
(B)に示す如く、周波数f1 ,f2 のビーコンパルス
を出力出来るので、複数の船舶に対し同時にサービスが
出来るようになる。
That is, as shown in FIG. 3A, even if radar pulses of frequencies f 1 and f 2 are input almost at the same time,
As shown in (B), since beacon pulses of frequencies f 1 and f 2 can be output, it becomes possible to simultaneously service a plurality of ships.

【0032】以上は、2つの周波数のレーダパルスが略
同時に入力する場合で説明したが、これはそれ以上の異
なる周波数のレーダパルスが略同時に入力する場合にた
いしても、同様な考えかたにて周波数アジャイル式レー
ダビーコン装置を構成することが出来る。
In the above description, the case where radar pulses of two frequencies are input almost at the same time has been explained. However, even when radar pulses of different frequencies are input at the same time, the frequency can be considered in the same way. It is possible to configure an agile radar beacon device.

【0033】[0033]

【発明の効果】以上詳細に説明せる如く本発明によれ
ば、周波数f1 のレーダパルス受信中、異なる周波数の
レーダパルスが入力してもこれ等に対し、回路の精度の
あまさ及び環境条件の変化があっても、レーダパルスと
同じ周波数のビーコンパルスを出力出来、複数の船舶に
対し同時にサービスが出来る効果がある。
As described above in detail, according to the present invention, even if radar pulses of different frequencies are input during reception of radar pulses of frequency f 1 , the accuracy of the circuit and the environmental condition Even if there is a change, a beacon pulse having the same frequency as the radar pulse can be output, and there is an effect that a plurality of ships can be serviced simultaneously.

【図面の簡単な説明】[Brief description of drawings]

【図1】は本発明の原理ブロック図、FIG. 1 is a block diagram of the principle of the present invention,

【図2】は本発明の実施例の周波数アジャイル式レーダ
ビーコン装置の要部のブロック図、
FIG. 2 is a block diagram of a main part of a frequency agile radar beacon device according to an embodiment of the present invention,

【図3】は本発明の実施例の周波数f1 ,f2 のレーダ
パルスが略同時に入力した場合のビーコンパルスを示す
図、
FIG. 3 is a diagram showing a beacon pulse when radar pulses of frequencies f 1 and f 2 of the embodiment of the present invention are input substantially at the same time,

【図4】は従来例の周波数アジャイル式レーダビーコン
装置の要部のブロック図である。
FIG. 4 is a block diagram of a main part of a conventional frequency agile radar beacon device.

【符号の説明】[Explanation of symbols]

1は周波数データ変換部、 1ー1は周波数弁別部、 1ー2はA/D変換部、 2は周波数識別部、 3,50は制御部、 4は同一周波数信号出力部、 5,38は変調部、 6はレベル識別部、 7はピーク検出部、 8はレベル比較部、 9は符号発生部、 11,12,13は受信周波数保持部、 21,22,23はメモリ、 30は比較回路、 31は加算回路、 32は受信部、 33は分配部、 34は検波部、 35は送信部、 36は電圧制御発振部、 37はD/A変換部、 41,42はデータ保持部、 60〜66は切替スイッチを示す。 1 is a frequency data conversion unit, 1-1 is a frequency discrimination unit, 1-2 is an A / D conversion unit, 2 is a frequency identification unit, 3,50 is a control unit, 4 is the same frequency signal output unit, and 5, 38 are Modulation section, 6 is a level identification section, 7 is a peak detection section, 8 is a level comparison section, 9 is a code generation section, 11, 12 and 13 are reception frequency holding sections, 21, 22 and 23 are memories, and 30 is a comparison circuit. , 31 is an adding circuit, 32 is a receiving unit, 33 is a distributing unit, 34 is a detecting unit, 35 is a transmitting unit, 36 is a voltage controlled oscillating unit, 37 is a D / A converting unit, 41 and 42 are data holding units, 60 Reference numerals 66 to 66 denote changeover switches.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 受信したレーダパルスの周波数を弁別し
A/D変換して周波数データとし、周波数識別部(2)
及び第1,第2,第3・・の受信周波数保持部(11,
12,13,・・)に入力する周波数データ変換部
(1)と、入力する該周波数データを識別しレーダパル
ス期間、制御部(3)に通知する周波数識別部(2)
と、受信したレーダパルスのレベルを識別しそのレベル
データをレーダパルス期間、第1,第2,第3・・のメ
モリ(21,22,23,・・・),ピーク検出部
(7)及びレベル比較部(8)に入力させるレベル識別
部(6)と、入力した周波数データを、制御部(3)の
制御により周波数毎に保持する該第1,第2,第3・・
の受信周波数保持部(11,12,13,・・)と、入
力するレベルデータを指示されたアドレスに記憶する該
第1,第2,第3・・のメモリ(21,22,23,・
・・)と、レーダパルス周波数と同じ周波数で信号を出
力する同一周波数信号出力部(4)と、レベル比較部
(8)の出力により変調部(5)をオンオフとする符号
発生部(9)と、該同一周波数信号出力部(4)の出力
を入力し、該符号発生部(9)よりの信号で符号に合わ
せオンオフする変調部(5)と、該第1,第2,第3・
・の受信周波数保持部(11,12,13,・・)の出
力夫々と該同一周波数信号出力部(4)との接続を切り
替える第1の切替スイッチ(60)と、該第1,第2,
第3・・のメモリ(21,22,23,・・・)の出力
夫々と該ピーク検出部(7)及び該レベル比較部(8)
の入力との接続を切り替える第2の切替スイッチ(6
1)と、該第2の切替スイッチ(61)を介して入力す
る各メモリに記憶したレベルを、現入力レベルと比較し
大きい方を夫々各メモリに返送記憶する該ピーク検出部
(7)と、該第2の切替スイッチ(61)を介して入力
する各メモリに記憶したレベルを現入力レベルと比較し
所定の範囲内か所定外かを検出し、所定内の時は現入力
レベルのレーダパルス期間該符号発生部(9)より符号
を出力させ所定外の時は現入力レベルのレーダパルス期
間該符号発生部(9)よりオフ信号を出力させる該レベ
ル比較部(8)と、最初に入力する第1の周波数データ
のf1 は該第1の受信周波数保持部(11)に保持さ
せ、次に入力した周波数データが該第1の周波数データ
1 と異なる第2の周波数データf2 の時は次の第2の
受信周波数保持部(12)に保持させ、次に入力した周
波数データが該第1,第2の周波数データf1 ,f2
異なる第3の周波数データの時は次の第3の受信周波数
保持部(13)に保持させる如き動作をさせ、又入力す
る周波数データが、第1,第2,第3,・・の周波数に
応じ、該第1,第2の切替スイッチ(60,61)を、
該同一周波数信号出力部(4)と該第1,第2,第3・
・の受信周波数保持部(11,12,13,・・)夫々
との接続、該ピーク検出部(7)及び該レベル比較部
(8)と該第1,第2,第3・・のメモリ(21,2
2,23,・・・)夫々との接続とし、又該第1,第
2,第3・・の受信周波数保持部(11,12,13,
・・)に保持した周波数データをレーダパルス期間該第
1の切替スイッチ(60)を介して、該同一周波数信号
出力部(4)に入力すると共に、夫々に対応する該第
1,第2,第3・・のメモリ(21,22,23,・・
・)にアドレスとして入力させ、又該第1,第2,第3
・・のメモリ(21,22,23,・・・)に夫々記憶
したレベルデータをレーダパルス期間、該第2の切替ス
イッチ(61)を介して、該ピーク検出部(7)及びレ
ベル比較部(8)に入力させ且つ該ピーク検出部(7)
の出力を夫々該第1,第2,第3・・のメモリ(21,
22,23,・・・)に入力して元のアドレス位置に記
憶させる該制御部(3)とを備えたことを特徴とする周
波数アジャイル式レーダビーコン装置。
1. A frequency discriminating section (2) for discriminating the frequency of a received radar pulse and A / D converting it into frequency data.
And the first, second, third, ... Reception frequency holding units (11,
Frequency data conversion unit (1) to be input to 12, 13, ..., And a frequency identification unit (2) for identifying the input frequency data and notifying the radar pulse period to the control unit (3)
, The level of the received radar pulse is identified, and the level data is used for the radar pulse period, the first, second, third memory (21, 22, 23, ...), the peak detector (7) and The level identifying unit (6) to be input to the level comparing unit (8) and the input frequency data are held for each frequency under the control of the control unit (3).
., And the first, second, third, ... memories (21, 22, 23, ...) Which store the input level data at designated addresses.
.), The same frequency signal output unit (4) that outputs a signal at the same frequency as the radar pulse frequency, and a code generation unit (9) that turns on and off the modulation unit (5) by the output of the level comparison unit (8) A modulation section (5) which receives the output of the same frequency signal output section (4) and turns on / off in accordance with a signal from the code generation section (9), and the first, second, third.
The first changeover switch (60) for switching the connection between each of the outputs of the reception frequency holding units (11, 12, 13, ...) And the same frequency signal output unit (4), and the first and second ,
The outputs of the third memory (21, 22, 23, ...) And the peak detection section (7) and the level comparison section (8)
The second selector switch (6
1) and the peak detection unit (7) that compares the level stored in each memory input via the second changeover switch (61) with the current input level and returns the larger one to each memory. , The level stored in each memory input through the second changeover switch (61) is compared with the current input level to detect whether the level is within a predetermined range or out of a predetermined range. The level comparison unit (8) that outputs a code from the code generation unit (9) during a pulse period and outputs an off signal from the code generation unit (9) during the radar pulse period of the current input level when the value is out of a predetermined range, f 1 is the first reception frequency holding unit of the first frequency data input (11) is held in, the frequency data is a second different from the frequency data f 1 of the first entered then the frequency data f 2 Then the second reception frequency holding unit (1 ) Is held in, first then entered frequency data, retention time of the second frequency data f 1, f 2 different from the third frequency data in the third reception frequency holding unit of the following (13) The frequency data to be input or to be input is set to the first, second or third changeover switch (60, 61) according to the first, second, third, ...
The same frequency signal output unit (4) and the first, second, third,
.. connection with each of the reception frequency holding units (11, 12, 13, ...), the peak detection unit (7) and the level comparison unit (8), and the first, second, third, ... (21,2
2, 23, ...), and the first, second, third ... Reception frequency holding sections (11, 12, 13,
..) is input to the same frequency signal output unit (4) through the first changeover switch (60) during the radar pulse period, and the corresponding first, second, and Third memory (21, 22, 23, ...
・) As an address, and the first, second, third
.. level data stored in the memories (21, 22, 23, ...) Through the second changeover switch (61) during the radar pulse period, the peak detection section (7) and the level comparison section. Input to (8) and the peak detection section (7)
Output of each of the first, second, third ... (21,
22, 23, ...) and the control unit (3) for storing the original address position in the frequency agile radar beacon device.
JP05029501A 1993-02-19 1993-02-19 Frequency agile radar beacon device Expired - Fee Related JP3094721B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP05029501A JP3094721B2 (en) 1993-02-19 1993-02-19 Frequency agile radar beacon device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP05029501A JP3094721B2 (en) 1993-02-19 1993-02-19 Frequency agile radar beacon device

Publications (2)

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JPH06242236A true JPH06242236A (en) 1994-09-02
JP3094721B2 JP3094721B2 (en) 2000-10-03

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016170106A (en) * 2015-03-13 2016-09-23 三菱電機特機システム株式会社 Frequency agile type radar beacon device and management method thereof
CN110007281A (en) * 2018-11-28 2019-07-12 北京遥感设备研究所 A kind of the frequency domain timesharing detection system and method for external electromagnetic environment

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016170106A (en) * 2015-03-13 2016-09-23 三菱電機特機システム株式会社 Frequency agile type radar beacon device and management method thereof
CN110007281A (en) * 2018-11-28 2019-07-12 北京遥感设备研究所 A kind of the frequency domain timesharing detection system and method for external electromagnetic environment

Also Published As

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