JPH06237586A - Speed control circuit for motor for driving optical scan system of image former - Google Patents

Abstract

PURPOSE:To accurately manage the time required from the start of a motor to the stoppage by performing the speed control during the acceleration and deceleration of the motor accurately. CONSTITUTION:During the acceleration and deceleration of a motor 104, a divider 109 divides the pulse signal from an encoder 105, according to the number of divisions of the frequency table within a memory 112 geared to the passage time after rotation of the motor 104, and, based on this division result and the target speed of the target speed table within the memory 112 geared to the passage time after rotation of the motor 104, CPU 102 operates PID control, and also outputs a PWM signal to the motor 104 though an amplifier 103.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a speed control circuit for a motor for driving an optical scanning system of an image forming apparatus.

[0002]

2. Description of the Related Art As an example of an image forming apparatus, an electrophotographic copying machine (hereinafter referred to as a copying machine) is used for driving a photosensitive drum,
A plurality of motors are used for driving the optical scanning system and driving the fixing roller. Some of these motors may always rotate at a constant speed, but the motor for driving the optical scanning system operates at the time of the backward movement to return to the reference position after the exposure scanning from the time of the forward movement for exposing and scanning the original. One is faster, and the rotation speed is changed according to the copy magnification.

As a motor speed control method, the number of rotations of the motor is detected by an encoder, and a pulse signal from this encoder is compared with a pulse signal corresponding to a target rotation speed, and P
A method is known in which ID (proportional, integral, differential) control is performed, and the speed is controlled by changing the voltage applied to the motor by the PWM (pulse width modulation) method based on the result.
In PID control using such an encoder, control is performed based on a pulse signal, so the more accurate the speed control is, the more the number of pulses generated during one rotation of the motor is used. Since the processing time required for the PID control is fixed to some extent, even if pulses are generated from the encoder at a time interval shorter than this processing time, the PID control cannot be applied to each pulse signal.

In Japanese Patent Laid-Open No. 63-69476, an encoder that produces a large number of pulses per revolution of the motor is used so that accurate speed control can be performed even when the motor is running at a low speed such as enlargement copying. At such a high speed, the pulse signal from the encoder is divided by a predetermined dividing number, and the pulse interval after the division is made longer than the processing time of the CPU required for one speed control. A copying machine in which speed control is performed is described, and therefore the frequency division number of the pulse signal from the encoder is set separately for each copying magnification.

[0005]

However, Japanese Patent Laid-Open No. Sho 63-63
In the invention described in Japanese Patent Application Laid-Open No. -69476, the frequency division number for dividing the pulse signal obtained from the encoder with respect to the predetermined rotation speed of the motor is set for each copying magnification. Since the frequency of the pulse from the encoder is low during acceleration / deceleration with a slow rotation speed, the number of times of PID control is reduced and there is a problem that accurate speed control cannot be performed.

Recently, there has been a demand for a copying machine capable of high-speed copying. For example, in order to realize continuous copying of 60 sheets per minute, an operation of copying one sheet by simple calculation (hereinafter referred to as 1
It is necessary to perform the copying operation) in 1 second, but if a delay of 20 [msec] per copying operation occurs in the acceleration / deceleration time of the motor for driving the optical scanning system, it will be 58 in 1 minute.
Only one copy can be made. The higher the speed of copying, the more important the speed control during acceleration / deceleration of the motor for driving the optical scanning system.

The present invention has been made in view of the above points, and an object of the present invention is to accurately perform speed control during acceleration / deceleration of a motor and to reliably manage the time from the start to the stop of the motor. To do.

[0008]

In order to achieve the above object, the present invention provides an encoder for detecting the rotation speed of a motor for driving an optical scanning system in an image forming apparatus having an exposure type optical scanning system. , A target speed table that determines the target rotation speed of the motor stepwise according to the elapsed time after the rotation of the motor, and a portion that divides the pulse signal from the encoder stepwise according to the elapsed time after the rotation of the motor. The frequency division table that determines the frequency and the pulse signal from the encoder during the motor acceleration / deceleration rotation is stepwise divided according to the elapsed time after the rotation of the motor based on the frequency division of the frequency division table. And a calculating means for calculating PID control with a predetermined feedback gain based on the frequency division result from the frequency dividing means for the same stepwise elapsed time and the target speed in the target speed table. To constitute a speed control circuit of the optical scanning system driving motor of the image forming apparatus so as to control the rotational speed of the motor based on the operation result of the operation means.

[0009]

According to the present invention, with the above construction, the frequency dividing means outputs the pulse signal from the encoder during the acceleration / deceleration rotation of the motor based on the frequency division number of the frequency division table according to the elapsed time after the rotation of the motor. The frequency division is performed, and the calculation means performs the PID control calculation based on the frequency division result and the target speed of the target speed table according to the elapsed time after the rotation of the motor, and the rotation speed of the motor based on the calculation result. To control.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings.

FIG. 11 shows a schematic structure of a copying machine to which the motor speed control circuit according to the present invention is applied.

An operation panel 10 provided on the upper surface of the main body of the copying machine.
When the copying is started by the copy start key on the operation panel 100 after the power button on 0 is turned on, the original 21 placed on the original table 1 is reciprocally moved to the illumination lamp 2 of the optical scanning system A.
The reflected light 20 (shown by a chain line) from the original 21 is reflected by the first mirror 3 and the fixed second mirror 4 and third mirror 5, which also constitute the optical scanning system A, and is reflected by the lens. After passing through 6, the light is reflected by the fourth mirror 7 and projected onto the photosensitive drum 8, and an electrostatic latent image of the original 21 is formed on the drum 8. On the other hand, the copy paper 12 is conveyed from the paper feed cassette 11 to the transfer position through the path indicated by the chain double-dashed line.

Around the drum 8, a charging electrode 9 for uniformly charging the photoconductor provided on the surface of the drum 8 is provided.
A developing device 10 for developing the electrostatic latent image formed on the photoconductor into a visible image (toner image), and a transfer electrode 13 for transferring the visible image to the copy paper P. , A separation electrode 14 for separating the copy paper P on which the visible image has been transferred from the drum 8, a charge eliminating electrode 15 for eliminating charges remaining on the photoconductor, and a toner remaining on the photoconductor after the charge elimination. And a cleaning device 16 for removing the above.

The electrostatic latent image formed on the photoconductor is transferred onto the copy paper 12 by the transfer electrode 13, and after transfer, the copy paper 12 separated from the drum 8 by the separation electrode 14 is transferred to two points by the conveying roller 17. The fixing device 1 passes through the path indicated by the chain line.
Then, the toner on the copy paper 12 is melted by heat, fixed on the copy paper 12, and discharged to the discharge tray 19.

In this embodiment, the motor speed control circuit according to the present invention is applied to the motor for driving the optical scanning system shown in FIG.

FIG. 1 is a block diagram of a motor speed control circuit according to the present invention.

Reference numeral 100 denotes an operation panel of the copying machine also shown in FIG. 11, and when the copying start key on the operation panel 100 is pressed, the copying machine control section 101 is instructed to start copying. The copying machine control unit 101 outputs a start signal to the CPU 102 at a predetermined timing when driving the optical scanning system A shown in FIG. 11 during the copying process.

Reference numeral 103 denotes an amplifier for amplifying a PWM (pulse width modulation) signal from the CPU 102 to a predetermined level. By outputting the amplified PWM signal to the motor 104, the optical scanning shown in FIG. The motor 104 for driving the system A rotates. The rotation speed of the motor 104 is controlled by changing the pulse width of the PWM signal, and a program for this speed control and a target speed table storing the target speed corresponding to the elapsed time after the rotation of the motor 104 are stored. And a frequency division number table storing frequency division numbers for dividing the pulse signal from the encoder 105 corresponding to the target speed, and P corresponding to the frequency division number.
A PID gain table storing the gain of ID control is stored in the memory 112, and the program stored in the memory 112 is executed by the CPU 102.

Reference numeral 105 denotes an encoder that optically detects the rotation of the motor 104 and outputs a pulse signal corresponding to the rotation speed. A counter 111 counts the number of pulses of the pulse signal from this encoder 105, Output to the comparator 110. The comparator 110 is the counter 1
The count number input from 11 and the frequency division number input from the CPU 102 are compared with each other, and a match signal is output when the two match. The coincidence signal from the comparator 110 clears the count numbers of the counter 111 and the counter 107 to zero and instructs the latch circuit 106 to hold the count number from the counter 107. Match signal is CPU1
It is also input to 02. The frequency divider 109 includes a comparator 110 and a counter 111.

Reference numeral 108 denotes a clock generator, which has a frequency of 10 MHz.
Generate a clock pulse of frequency z. Counter 10
Reference numeral 7 counts the number of clock pulses from the clock generator 108, and counts the counted number.
Output to. Further, the latch circuit 106 holds the count number at that time when it receives the coincidence signal from the comparator 110, and outputs it to the CPU 102.

In this embodiment, the number of clock pulses output from the clock generator 108 is counted within the time from the output of the coincidence signal from the comparator 110 to the output of the next coincidence signal. The count number is used as the actual rotation speed of the motor 104.

Here, FIG. 7 shows the case where the frequency division number is 1 (division by 1), and FIG. 8 shows the case where the frequency division number is 2 (division by 2). ) Encoder 10
5 shows the pulse signal from 5, the coincidence signal from (b) the comparator 110, (c) the clock pulse from the clock generator 108, and (d) the clock count from the latch circuit 106.

Next, the speed control processing by the CPU 102 will be described with reference to the flowcharts of FIGS. 2, 3, 4, 5, and 6.

The speed control processing by the CPU 102 includes the main processing shown in FIG. 2, the timer interrupt processing shown in FIGS. 3, 4, and 5, and the encoder interrupt processing shown in FIG. During execution, the interrupt of the timer interrupt process is always taken at an interval of 20 mS, and the interrupt of the encoder interrupt process is taken every time the coincidence signal from the comparator 110 in the frequency divider 109 is received. The timer interrupt process and the encoder interrupt process are mutually exclusive, and the interrupt process of one cannot be interrupted while the interrupt process of the other is being executed.

Now, an outline of the speed control according to the present invention will be described.

FIG. 9 shows changes in the rotation speed of the optical scanning system driving motor 104 during the forward movement during one copy operation.

The motor 104 is accelerated in the section B after starting,
After reaching the predetermined speed v ₁ , the speed is maintained and this section C
At, the original document is exposed by the optical scanning system A. afterwards,
The motor 104 is decelerated in the section D. As an example of the speed control of the present invention, the timer interrupt processing is executed 20 times in the section B, the timer interrupt processing is executed 300 times in the section C, and the timer interrupt processing is executed 20 times in the section D.

In this embodiment, the speed control of the motor 104 is set to P
The ID control is performed, the elapsed time after the rotation of the motor 104 is divided into constant time intervals, and the target speed corresponding to each time interval (the match signal is output from the comparator 110 before the next match signal is output. The target count number of the clock pulse to be output from the clock generator 108 is prepared within the time until the pulse generator 108 divides the pulse signal from the encoder 105 corresponding to this time interval. Numbers, and gains of different PID control corresponding to the respective frequency division numbers are respectively prepared, and these are respectively set in the target speed table, frequency division number table, and PID
It is stored in the memory 112 as a gain table and is sequentially read as the motor 104 rotates. Table 1 below
Tables 2 and 3 are examples of the values stored in these tables.

FIG. 10 shows (a) pulse signals from the encoder 105, (b) execution timing of encoder interrupt processing, (c) execution timing of timer interrupt processing, and (d) execution timing of main processing. Shows the relationship.

In (b), (c), and (d), it is shown that each processing is executed by each solid line portion. In the present embodiment, in the timer interrupt processing of (c), the target speed and the frequency division are determined from the target speed table and the frequency division number table of the memory 112 based on the number of times of the timer interrupt which indicates the number of the timer interrupt processing. And the number of frequency divisions for the frequency divider 109 is changed by the timer interrupt processing of (c), and the PID gain is read out from the PID gain table of the memory 112 based on the frequency division number at that time to obtain the PID.
A control calculation is performed and a PWM signal is output to the amplifier 103.

The target speeds and frequency division numbers in Tables 1 and 2 store values associated with the number of timer interrupts.
A value associated with a frequency division number is stored for each gain of the D control. For example, if the number of timer interrupts shown in FIG.
In the timer interrupt processing TW2 executed at that time, 500 pulses of the target speed and 1 of the frequency division number are read out from the target speed table and the frequency division number table. Also, in the encoder interrupt processing EW1 in which the frequency division number is 1, P
2 as gain, 2 as I gain, 2 as D gain
From the PID gain table.

[0032]

[Table 1]

[0033]

[Table 2]

[0034]

[Table 3] In this way, as the rotation speed of the motor 104 increases, each value is read from each table and speed control is sequentially performed.

The contents of the speed control process of the present invention will be described below for each process. (1) Main Processing First, the main processing will be described with reference to FIG.

When the CPU 102 receives the start signal from the copying machine control unit 101 shown in FIG. 1, the CPU 102 starts the main processing, and first, the initial setting is performed (S-1). Next, after a lapse of a predetermined time, the motor start operation instruction transmitted from the copying machine control unit 101 is waited (S-2), and if a motor start operation instruction is received, the start flag is set to 1 (S2).
-3), enable the interrupt of encoder interrupt processing (S-
4), the motor 104 is accelerated.

After that, the speed control of the motor is performed by the timer interrupt processing and the encoder interrupt processing described later. The motor is gradually accelerated to reach a certain speed v ₁ , exposure scanning is performed, and after a predetermined time determined by the document size has elapsed, the copying machine control unit 101 issues a motor stop operation instruction. In the main processing, the instruction for the motor stop operation is waited (S-5), and when the instruction for the motor stop operation is received, the stop flag is set to 1 (S-6), and the deceleration control of the motor 104 by the timer interrupt processing and the encoder interrupt processing is performed. I do.

The output from the encoder 105 indicates that the motor 104 has stopped (S-7), and the motor 10
If No. 4 is stopped, the interrupt of the encoder interrupt process is prohibited (S-8), and the main process is ended. (2) Timer Interrupt Processing Next, the timer interrupt processing will be described with reference to FIGS. 3, 4, and 5.

When the main process shown in FIG. 2 is executed, the timer interrupt process is interrupted and executed at intervals of 20 msec.

Before the start flag is set to 1 in step (S-3) of FIG. 2, the number of timer interrupts is incremented in step (P-1) for each timer interrupt, and in step (P-2). Go to “No”,
In step (P-7), the process proceeds to "No", and in step (P-8), the process proceeds to "No" to end the timer interrupt process. The number of timer interrupts before the start flag is set to 1 is not referred to anywhere, and the number of timer interrupts incremented in step (P-1) is set to 1 (P).
-2) It has a meaning after the timer interrupt count is cleared to zero and is counted.

After the start flag is set to 1 in step (S-3) of FIG. 2 (process of TW1 in FIG. 10), the number of timer interrupts is incremented in step (P-1), and then step (P- In 2), the process proceeds to “Yes” to clear the timer interrupt count to zero and set the start flag to 0 (P-3). After that, the value of the variable named the true frequency division number is set to 1 (P-4), and the value of this true frequency division number is output to the comparator 110 in the frequency divider 109 shown in FIG. 1 (P-5). ) The pulse signal from the encoder 105 is divided by 1 (that is, without division). Next, the acceleration / deceleration flag is set to 1 (P-6) to indicate that the motor is currently being accelerated / decelerated.

In the next step (P-9), the encoder flag indicating whether or not the encoder interrupt processing has been executed immediately before the current timer interrupt processing is checked. Since the timer interrupt processing this time is the processing immediately after the start flag is set to 1 in the main processing, the encoder interrupt has not been executed yet, so the encoder flag is 0, and the routine proceeds to step (P-10).

In step (P-10), the timer flag indicating whether or not the timer interrupt processing has been executed immediately before the current timer interrupt processing is checked. Since the timer interrupt process this time is a process immediately after the start flag is set to 1 in the main process, there is no timer interrupt process executed previously, and the timer flag is 0, and the step (P-2 shown in FIG.
Proceed to 1). In step (P-21), the CPU 10
Reference numeral 2 reads out the motor rotation target speed (here, 500 pulses) corresponding to the timer interrupt count 0 from the memory 112 and substitutes it into a variable named temporary target speed. In the next step (P-22), the frequency division number (here, 1 frequency division) corresponding to the timer interrupt count 0 is read from the memory 112,
Substitute into a variable named Tentative Divider.

Next, in step (P-23) shown in FIG. 5, it is checked whether or not the provisional frequency division number and the true frequency division number are equal. This time, since both the provisional frequency division number and the true frequency division number are 1 as described above, the process proceeds to step (P-25) to check whether or not the acceleration / deceleration of the motor 104 is completed. Whether or not the acceleration / deceleration has ended is determined by the number of times the timer interrupt processing is executed after the timer interrupt count is cleared to zero in step (P-3) of FIG. When it is executed (the section B shown in FIG. 9 is finished), it is considered that the motor acceleration is finished. Since the number of timer interrupts is 0 this time (it is set to 0 in P-3), the process proceeds to "No", the encoder flag is set to 0 (P-27), and the timer flag is set to 1 (P- 28) The process ends.

Next, since the PWM signal has not been output to the motor 104 yet, the interrupt from the timer interrupt process is applied again after 20 msec has elapsed (process of TW2 in FIG. 10). First, at step (P-1) shown in FIG. 3, the start flag is checked after incrementing the number of timer interrupts (P-2).
(It is set to 0 in P-3 of TW1 in FIG. 10), the process proceeds to step (P-7). In step (P-7), the stop flag is checked. Since the stop flag is 0 this time (it is set to 0 in S-1 of the main process), the process proceeds to step (P-8).

In step (P-8), the acceleration / deceleration flag is set to 1 in this timer interrupt processing (it is set to 1 in P-6 of TW1 in FIG. 10), so the process proceeds to step (P-9). And proceed. In the next step (P-9), the encoder flag indicating whether or not the encoder interrupt processing has been executed immediately before the current timer interrupt processing is checked. Since the timer interrupt processing this time is the processing before giving the rotation instruction to the motor 104 (outputting the PWM signal), the encoder interrupt has not been executed yet, so the encoder flag is 0, and the process proceeds to step (P-10). And proceed.

In step (P-10), the timer flag indicating whether or not the timer interrupt process was executed immediately before the current timer interrupt process is checked. In the timer interrupt processing of this time, the timer flag is set to 1 in the previous timer interrupt processing, so the process proceeds to step (P-12) shown in FIG.

In step (P-12), the change flag indicating whether or not the frequency division number has been changed is checked. Since the frequency division number has not been changed this time and the change flag is 0 (it was set to 0 in S-1 of the main process), the process proceeds to step (P-15), and the memory is saved in the previous timer interrupt process. The value of the temporary target speed read from 112 (500
Pulse) to a variable named true target speed, and the value of the provisional frequency division number (division by 1) read from the memory 112 in the previous timer interrupt processing is changed to a variable named true frequency division number. Substitute (P-16).

Subsequently, the gain for P control (proportional control) (here, 2) can be read from the memory 112 based on the value of the true frequency division number (division by 1) (P-17), and this gain and true The P control is calculated using the target speed value and (P-1
8), and outputs the calculation result as a PWM signal to the amplifier 103 shown in FIG. 1 (P-19). In the present embodiment, as a general rule, the PID control calculation and the PWM signal output are performed in the encoder interrupt processing, but exceptionally, after the timer interrupt processing is completed, the encoder interrupt processing is not executed and the timer interrupt processing is performed. If repeated, 2
P of PID control in the second timer interrupt processing
Only the control calculation is performed and the PWM signal is output. The fact that the encoder interrupt processing is not executed after the timer interrupt processing is completed and the timer interrupt processing continues twice is because the rotation speed of the motor is very slow, so that the motor should be rotated as soon as possible. The process is simplified so that only the P control is performed, and the PWM signal is output by the timer interrupt process.

After that, the value of the provisional frequency division number is substituted for the true frequency division number, and the value of the temporary target speed is substituted for the true target speed (P-
20) After that, after performing the same process as the previous timer interrupt process, the TW2 timer interrupt process is terminated (P-
21, P-22, P-23, P-25, P-27, P-
28).

Incidentally, the step (P-23) shown in FIG.
If the provisional frequency division number and the true frequency division number are not equal when proceeding to step 1, the change flag is set to 1 to indicate that the frequency division number has been changed (P-24), and then the step ( P-25)
Go to.

At step (P-25), it is checked whether or not the acceleration of the motor 104 is completed. When the number of timer interruptions is 20, it is considered that the acceleration of the motor 104 is completed (section B in FIG. 9 is completed), the acceleration / deceleration flag is set to 0 (P-26), and the timer flag is set to 1. (P-28), the timer interrupt processing ends.

In the section C of FIG. 9, the timer interrupt processing performs only steps (P-1, P-2, P-7, P-8). In the section D of FIG. 9, the target speed, the frequency division number, and the PID gain are read from the memory 112 based on the number of timer interruptions, and the deceleration processing of the motor 104 is performed, as in the acceleration of the motor 104.

When the PWM signal is output in the step (P-19) of the timer interrupt processing of TW2 in FIG. 10, the motor 104 starts to rotate and the comparator 110 outputs the coincidence signal as shown in FIG. 7B. Will be done. At the timing of the rising edge of this coincidence signal, the interrupt of the encoder interrupt process described below will start. (3) Encoder Interrupt Process The encoder interrupt process will be described below with reference to FIG.

In the encoder interrupt processing, first, a change flag is checked in order to check whether or not the frequency division number read from the memory 112 in the timer interrupt processing is compared with the frequency division number used so far. It is checked whether or not is 1 (F-1). If 1 is not set in the change flag, the value of the provisional target speed read from the memory 112 in the immediately previous timer interrupt processing is substituted for the true target speed (F-4), and the memory is stored in the immediately previous timer interrupt processing. 112
The value of the provisional frequency division number read from is substituted for the true frequency division number (F-5).

If the change flag is set to 1, the value of the provisional frequency division number read from the memory 112 in the immediately preceding timer interrupt processing is used as the comparator 110 in the frequency divider 109 shown in FIG. (F-2) and the change flag is set to 0 (F-3).

Then, in step (F-6), the motor 104 held in the latch circuit 106 shown in FIG.
Gets the actual rotation speed of. Then, the gain for PID (proportional, integral, differential) control is read from the memory 112 based on the value of the true frequency division number (F-7), and this gain, the value of the true target speed, and the step (F-6). PID control calculation is performed using the acquired actual rotation speed (F-8), and the calculation result is output to the amplifier 103 shown in FIG. 1 as a PWM signal (F-9).

After that, the value of the provisional frequency division number is substituted for the true frequency division number, and the value of the temporary target speed is substituted for the true target speed (F-
10), the encoder flag is set to 1, the timer flag is set to 0 (F-11), and the encoder interrupt process is ended.

Encoder interrupt processing is performed in the section B (during acceleration), section C (during constant speed), and section D (during deceleration) shown in FIG.
In either case, the PID control calculation and the PWM signal output are performed based on the change flag set in the timer interrupt processing, the temporary target speed, and the temporary frequency division number.

As described above, in this embodiment, even during acceleration / deceleration of the motor 104, the pulse signal from the encoder 105 is divided by the frequency division number stored in advance in the memory 112 (P-22, F-2) When the frequency division number is changed, a more accurate PID control calculation can be performed by reading out the PID gain suitable for the frequency division number from the memory 112 (F-7, F-. 8). Further, the provisional target speed and the true target speed are provided so that the target speed before changing the frequency division number and the target speed after changing the frequency division number can be stored. The PID control calculation can be performed using the target speed based on the same frequency division number as when the actual rotation speed is obtained (F-1, F-.
2, F-3, F-4, F-5, F-6, F-8). Furthermore, when the timer interrupt processing is executed again before the encoder interrupt processing is executed after the timer interrupt processing is executed, the P control calculation is performed in the second timer interrupt processing to output the PWM signal. Therefore, even when the motor is rotating at a low speed, appropriate speed control can be performed (P-9, P-10, P-18, P-
19).

[0061]

As described above, according to the present invention,
During acceleration and deceleration of the motor, the pulse signal output from the encoder for detecting the rotation speed is divided by the division number of the step-wise division number table according to the elapsed time after the rotation of the motor. Since the PID control is calculated based on the circumference result and the target speed of the stepwise target speed table according to the elapsed time after the rotation of the motor, the rotation speed of the motor is controlled based on the calculation result. Thus, it is possible to reliably control the time required for the motor to start rotating and to reach a constant speed, and further to stop from the constant speed.

Therefore, when the present invention is applied to the speed control of the motor for driving the optical scanning system of the copying machine, the time required for one copying operation of the copying machine can be reliably controlled, and the number of sheets that can be copied within a fixed time is reduced. An error can be reduced and a copying machine capable of higher speed copying can be realized.

[Brief description of drawings]

FIG. 1 is a block diagram of a speed control circuit for a motor according to the present invention.

FIG. 2 is a flowchart of main processing in the present invention.

FIG. 3 is a part of a flowchart of timer interrupt processing in the present invention.

4 is a part following the flowchart of the timer interrupt processing shown in FIG.

5 is a part following the flowchart of the timer interrupt process shown in FIG.

FIG. 6 is a flowchart of encoder interrupt processing in the present invention.

FIG. 7 shows a pulse signal from an encoder 105, a coincidence signal from a comparator 110, a clock pulse from a clock generator 108, and a latch circuit 106 from a latch circuit 106 in the case where the frequency division number is 1 (1 frequency division). The relationship with the clock count number is shown.

8 is a diagram illustrating a case where the frequency division number is 2 (division by 2), a pulse signal from the encoder 105, a coincidence signal from the comparator 110, a clock pulse from the clock generator 108, and a latch signal from the latch circuit 106. The relationship with the clock count number is shown.

FIG. 9 shows changes in the rotation speed of the motor 104 during forward movement during one copy operation.

FIG. 10A is a pulse signal from the encoder 105, and FIG. 10B is an execution timing of encoder interrupt processing;
The relationship between the execution timing of (c) timer interrupt processing and the execution timing of (d) main processing is shown.

FIG. 11 is a schematic configuration diagram of a copying machine to which a motor speed control circuit according to the present invention is applied.

[Explanation of symbols]

 100 Operation Panel 101 Copier Control Unit 102 CPU 103 Amplifier 104 Motor 105 Encoder 106 Latch Circuit 107 Counter 108 Clock Generator 109 Frequency Divider 110 Comparator 111 Counter 112 Memory

Claims (1)

[Claims] 1. An image forming apparatus having an exposure type optical scanning system, wherein an encoder for detecting a rotation speed of a motor for driving the optical scanning system, and a motor stepwise according to an elapsed time after the rotation of the motor. Target speed table that defines the target rotation speed of the motor, a frequency division table that determines the frequency division number that divides the pulse signal from the encoder stepwise according to the elapsed time after rotation of the motor, and the motor addition During the decelerated rotation, the pulse signal from the encoder is stepwise divided according to the elapsed time after rotation of the motor based on the frequency division number of the frequency division table, and for the same stepwise elapsed time And a calculation means for calculating PID control using a predetermined feedback gain based on the frequency division result from the frequency division means and the target speed of the target speed table. A speed control circuit for an optical scanning system driving motor of an image forming apparatus, characterized in that the rotation speed of the motor is controlled based on the result of the calculation.