JPH06236975A - Manufacture of multilayered structure substrate for semiconductor device and semiconductor element - Google Patents

Abstract

PURPOSE:To provide a manufacturing method of a multilayered structure substrate for a semiconductor device and that of a semiconductor element able to reduce the thickness of a semiconductor layer forming a semiconductor element while allowing highly accurate control and higher speed operation. CONSTITUTION:This method for manufacturing a multilayered structure substrate for a semiconductor device and that for manufacturing a semiconductor element consist of the processes of (a) forming an Si1-XGeX layer 12 on the surface of a substrate 16 for forming a semiconductor layer having the surface consisting of a silicon single-crystal layer, (b) forming an insulating layer 14 on an Si1-XGeX layer 12, (c) cementing a supporting substrate 20 with such an insulating layer, (d) removing the substrate 10 for forming a semiconductor layer while leaving the insulating layer 14 and the Si1-XGeX 12 on the surface of the supporting substrate 20. The manufacturing method of a semiconductor element includes (e) a process of forming a semiconductor element on the Si1-XGeX layer in addition thereto.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer structure substrate for a semiconductor device and a method for manufacturing a semiconductor device using such a multilayer structure substrate.

[0002]

2. Description of the Related Art As a technique for manufacturing a multilayer structure substrate in the field of manufacturing semiconductor devices, for example, SOI (Silicon On
Insulator) technology and island dielectric isolation technology are being studied. In SOI technology, currently SI
The MOX (Separation by IMplated OXygen) method and the bonded wafer method are drawing attention.

As shown in FIG. 13 (A), the SIMOX method means that oxygen ions or O ₂ are implanted from the surface of a single crystal silicon substrate 100, and a silicon layer 102 is left on the surface of the substrate to leave SiO 2 inside. _This is a method of forming an SOI structure by forming the _two layers 104. Various semiconductor elements are formed on the silicon layer 102. The bonded wafer method is a method in which two wafers each having a clean SiO ₂ film formed on their surfaces are faced to each other and subjected to thermocompression bonding in an O ₂ atmosphere of 700 ° C. or higher, and then one of the wafers is bonded. This is a method for forming an SOI structure as shown in FIG. 13B by polishing the back surface to make it thinner. Incidentally, FIG.
In (B), 110 is one wafer whose back surface is polished, and various semiconductor elements are formed on the one wafer 110. Further, 112 is a SiO ₂ film, 114
Is the other wafer that functions as a support.

In the island-shaped dielectric isolation technique, the SiO ₂ layer 124 and the polysilicon layer 126 are sequentially formed on the surface of the semiconductor layer forming silicon substrate 120 in which the V groove or trench 122 is formed, and the V groove or trench is formed. The trench 122 is filled with a polysilicon layer 126. Next, the polysilicon layer 126 on the semiconductor layer forming silicon substrate 120 is polished (see FIG. 14A). Then, the semiconductor layer forming silicon substrate 120 and the supporting silicon substrate 130 having the SiO ₂ film 132 formed on the surface thereof are faced to each other and subjected to thermocompression bonding in an O ₂ atmosphere of 700 ° C. or higher (see FIG. 14 (B)), the back surface of the semiconductor layer forming silicon substrate 120 is polished to be thin, and
Polysilicon layer 126 and S in trench or trench 122
A multi-layer structure substrate (see FIG. 14C) in which the element formation region 140 is separated by the iO ₂ layer 124 can be manufactured.

A multilayer structure substrate manufactured by such an SOI technique or an island-shaped dielectric isolation technique has been expected as a technique capable of achieving high integration, high breakdown voltage and high speed of a semiconductor device.

[0006]

In the SIMOX method, in order to improve the characteristics of various semiconductor elements formed on the silicon layer 102 left on the surface of the substrate, the thickness of the silicon layer 102 (from the surface of the substrate to the inside of the substrate) is improved. Formed on Si
It is desirable that the thickness (corresponding to the depth up to the O ₂ layer 104) be thin. Further, it is necessary that the variation in thickness of the silicon layer 102 is as small as possible. In the SIMOX method, the thickness variation of the silicon layer 102 is ± 2 nm.
It is possible to fit within. However, the implantation of oxygen ions or O ₂ causes crystal defects in the silicon layer 102. When, for example, a DRAM is formed on such a silicon layer 102, the DRAM caused by crystal defects
However, there is a problem in that the operation failure occurs.

In the bonded wafer method, the back surface of one wafer 110 is polished and thinned, and various semiconductor elements are formed on the one wafer 110. From the viewpoint of improving the characteristics of various semiconductor elements, it is desirable that the one wafer 110 is thin. Further, it is necessary that the thickness variation of one wafer 110 is as small as possible. In forming a semiconductor element whose dimensional rule is 0.1 μm, it is necessary to keep the thickness variation of one wafer 110 after polishing within ± 4 nm. However, in the bonded wafer method, it is extremely difficult to keep the thickness variation of one wafer 110 after polishing within ± 500 nm.

In the island-shaped dielectric isolation technique, the back surface of the semiconductor layer forming silicon substrate 120 is polished to be thin, and the polysilicon layer 126 and the SiO ₂ layer 124 in the V groove or trench 122 are used to form an element forming region. 14
A multilayer structure substrate in which 0s are separated is manufactured. Also in this island-shaped dielectric isolation technique, it is extremely difficult to control the thickness of the semiconductor layer forming silicon substrate 120 after polishing, and the thickness variation of the semiconductor layer forming silicon substrate 120 is ± 20 nm.
It is extremely difficult to fit within. Further, there is a problem that the surface of the silicon substrate corresponding to the element forming region 140 is recessed when the back surface of the semiconductor layer forming silicon substrate 120 is polished.

Further, by applying the SOI technique or the island-shaped dielectric isolation technique, a semiconductor element which can operate at a higher speed than a semiconductor element produced based on a conventional multi-layer structure substrate made of silicon is provided. There is a need for new multilayer substrates that can be made.

Therefore, a first object of the present invention is to make it possible to control the thickness of a semiconductor layer on which a semiconductor element is to be formed thinly and with high accuracy, and further to enable a higher speed operation of the semiconductor element. Another object of the present invention is to provide a method of manufacturing a multilayer structure substrate for a semiconductor device based on the SOI technique or the island-shaped dielectric isolation technique.

A second object of the present invention is to reduce the thickness of a semiconductor layer on which a semiconductor element is to be formed, control it with high precision, and operate at a higher speed. It is an object of the present invention to provide a method for manufacturing a semiconductor element based on a multilayer structure substrate manufactured by a technique or an island-shaped dielectric isolation technique.

[0012]

The first object of the present invention is to form a Si _{1- x} Ge _x layer on the surface of a semiconductor layer forming substrate whose surface is composed of a silicon single crystal layer. Step (b) forming an insulating layer on the Si _1-x Ge _x layer, (c) attaching a supporting substrate to the insulating layer, and (d) removing the semiconductor layer forming substrate. And a step of leaving the Si _1-x Ge _x layer and the insulating layer on the surface of the supporting substrate, which can be achieved by the method for producing a multilayer structure substrate for a semiconductor device of the present invention.

In the method for producing a multilayer structure substrate for a semiconductor device of the present invention, the Si _1-x Ge _x layer is a single crystal of Si _1-x g.
Preferably it consists of e _X. The maximum value of _X is Si _1-X
It depends on the thickness of the Ge _x layer. For example, when the thickness of the Si _1-X Ge _X layer is 50 nm, the maximum value of X is about 0.3. As the thickness of the Si _1-x Ge _x layer decreases, the maximum value of X also increases.

Further, in the method for producing a multilayer structure substrate for a semiconductor device of the present invention, subsequent to the step (b), the surface is made of a silicon single crystal layer, and Si _1-X Ge _{X is} formed on the surface.
Another semiconductor-forming substrate in which a layer is formed and an insulating layer is formed on the Si _1-x Ge _x layer is prepared, and the insulating layer of the another semiconductor-layer forming substrate and the Si _1-x Ge _x layer are already prepared. A step of adhering two semiconductor layer forming substrates by facing the insulating layer of the semiconductor layer forming substrate on which the _X layer and the insulating layer are formed, a step of removing one semiconductor layer forming substrate, and an exposing step By repeating the step of forming an insulating layer on the Si _1-x Ge _x layer a desired number of times, a plurality of Si _1-x Ge _x layers insulated by the insulating layer can be provided on the surface of the supporting substrate, It can be used for forming semiconductor elements arranged three-dimensionally. The number of Si _1-x Ge _x layers can be set appropriately. Further, it is possible to form Si _1-X Ge _X layers with an arbitrary number of layers in an arbitrary region of the semiconductor layer forming substrate.

The second object of the present invention is as follows. (A) A step of forming a Si _{1- x} Ge _x layer on the surface of a semiconductor layer forming substrate whose surface is composed of a silicon single crystal layer, and (b) Si _1-X
A step of forming an insulating layer on the Ge _x layer; (c) a step of adhering a supporting substrate to the insulating layer; and (d) removing the semiconductor layer forming substrate to form Si ₁ -x Ge on the surface of the supporting substrate. _X
This can be achieved by the method for producing a semiconductor device of the present invention, which comprises the steps of leaving the layer and the insulating layer, and (e) forming a semiconductor element on the Si _1-x Ge _x layer.

In the method of manufacturing a semiconductor device of the present invention, the Si _1-x Ge _x layer is preferably made of single crystal Si _{1- x} Ge _x . The maximum value of _X depends on the thickness of the Si _1-x Ge _x layer. For example, the thickness of the Si _1-X Ge _X layer is 50 nm.
In the case of, the maximum value of X is about 0.3. Si _1-X
As the Ge _x layer becomes thinner, the maximum value of X also increases.

Further, in the method for manufacturing a semiconductor device of the present invention, subsequent to the step (b), the surface is made of a silicon single crystal layer, the Si _1-X Ge _X layer is formed on the surface, and the semiconductor device is formed. Then, another semiconductor-forming substrate having an insulating layer formed on the Si _1-X Ge _X layer is prepared, and the insulating layer of the another semiconductor-layer forming substrate and the Si _1-X Ge _X layer,
A step of adhering two semiconductor layer forming substrates to each other with the semiconductor element and the insulating layer of the semiconductor layer forming substrate facing each other, a step of removing one semiconductor layer forming substrate, and an exposing step By repeating the step of forming the insulating layer on the Si _1-x Ge _x layer a desired number of times, semiconductor elements can be formed in the plurality of Si _1-x Ge _x layers insulated by the insulating layer. That is, it is possible to form semiconductor elements arranged three-dimensionally. The number of Si _1-x Ge _x layers can be set appropriately. Further, it is possible to form Si _1-X Ge _X layers with an arbitrary number of layers in an arbitrary region of the semiconductor layer forming substrate.

[0018]

In the present invention, the Si _1-x Ge _x layer is formed on the surface of the semiconductor layer forming substrate whose surface is composed of the silicon single crystal layer. When the Si _1-x Ge _x layer is formed, the thickness of the Si _1-x Ge _x layer can be controlled with high accuracy. The removal of the semiconductor layer forming substrate is performed by, for example, KOH aqueous solution, K ₂ Cr ₂ O
_If the wet etching is performed using an aqueous solution of ₇ or an aqueous solution of propanol, the Si _1-x Ge _x layer is hardly etched by these etching solutions. Therefore,
Etching can be stopped in the vicinity of the interface between the semiconductor layer forming substrate and the Si _1-x Ge _x layer. Therefore, the thickness of the Si _1-x Ge _x layer, which is the semiconductor layer on which the semiconductor element is to be formed, can be controlled with high accuracy.

Further, the semiconductor element is formed on the Si _1-x Ge _x layer. Since Si _1-x Ge _x has higher mobility than Si, the semiconductor element formed in the Si _1-x Ge _x layer is
It becomes possible to operate at a higher speed than a semiconductor element made of Si.

[0020]

EXAMPLES The present invention will now be described based on examples with reference to schematic partial cross-sectional views of substrates, semiconductor elements and the like.

(Embodiment 1) Embodiment 1 relates to a method for manufacturing a semiconductor device multilayer structure substrate and a semiconductor element according to the present invention. The method for manufacturing the multilayer structure substrate is a method belonging to the category of the bonded wafer method. The formed Si _1-x Ge _x layer is one layer.

[Step-100] First, as shown in FIG. 1A, a surface of a semiconductor layer forming substrate 10 made of silicon single crystal and having a (100) plane is subjected to a rapid heating chemical vapor deposition method. 50 nm thick single crystal Si _1-X Ge _X layer (however,
X = 0.1) 12 is formed. Such single crystal Si _1-X G
A rapid heating chemical vapor deposition apparatus was used to form the e _X layer 12. The substrate temperature was raised and lowered by an infrared lamp at 50 ° C / sec and 100 ° C / sec, respectively. The pressure control during film formation is performed by diluting with H _{2 as} a raw material gas 10
The flow rate of% SiH ₄ and 1% GeH ₄ and H ₂ gas was controlled by a mass flow controller. 10%
SiH ₄ and 1% GeH ₄ gas were added to the reactor at 8 × 10 ² ~
Introduced so that 1.3 × 10 ³ Pa pressure of about to form a single-crystal Si _{1 -X} Ge _X layer at deposition temperature of 850 ° C. The ultimate vacuum of the device is 6.7 × 10 ⁻⁴ Pa. The thickness variation of the single crystal Si _1-x Ge _x layer 12 is preferably within ± 4 nm.

[Step-110] Next, an insulating layer 14 made of, for example, SiO ₂ and having a thickness of 500 nm is formed on the single crystal Si _1-x Ge _x layer 12 by a normal CVD method, and thereafter,
The surface of the insulating layer 14 is polished to be smooth (see FIG. 1B). The insulating layer 14 can be formed using, for example, SiH ₄ gas and N ₂ O gas, or SiH ₄ gas and O ₂ gas.

[Step-120] After that, the surface is cleaned with S.
The supporting substrate 20 made of a silicon substrate on which the iO ₂ film 22 is formed and the semiconductor layer forming substrate 10 on which the insulating layer 14 is formed face each other (see (C) of FIG. 1), and a known method is used to form 700 The semiconductor layer forming substrate 10 and the supporting substrate 20 are bonded together by thermocompression bonding in an O ₂ atmosphere of ° C or higher (see FIG. 2A). Instead of the SiO ₂ film 22, for example, PSG, BS
You may form various insulating films, such as G, BPSG, and SiN. In addition, for bonding the semiconductor layer forming substrate 10 and the supporting substrate 20, any method such as a method of applying a pulse voltage to both substrates and performing electrostatic pressure bonding can be adopted.

[Step-130] Next, the semiconductor layer forming substrate 10 is removed, and single crystal Si _{1- X} is formed on the surface of the supporting substrate 20.
The Ge _X layer 12 and the insulating layer 14 are left (see FIG. 2B). The removal of the semiconductor layer forming substrate 10 is performed by, for example, KO.
It can be performed by wet etching using an H aqueous solution, a K ₂ Cr ₂ O ₇ aqueous solution, or a propanol aqueous solution. When these etching solutions are used, the semiconductor layer forming substrate 10 is etched, but single crystal Si _1-X G
The e _x layer 12 is hardly etched. Therefore, the etching can be stopped near the interface between the semiconductor layer forming substrate 10 and the single crystal Si _1-x Ge _x layer 12. Therefore, the thickness of the single crystal Si _1-x Ge _x layer 12 can be controlled with high accuracy.

When the thickness of the semiconductor layer forming substrate 10 is large, it takes a long time to perform the etching only by wet etching. In addition, depending on the type of semiconductor layer forming substrate used, some of the materials forming the semiconductor layer forming substrate may not be etched by these etching solutions.
In such a case, first, the back surface of the semiconductor layer forming substrate 10 is mechanically polished to a certain thickness, and then the semiconductor layer forming substrate 10 is removed by wet etching. The time required for this can be shortened, or the entire semiconductor layer forming substrate 10 can be removed.

Thus, as shown in the schematic partial cross-sectional view of FIG. 2B, a multi-layer structure substrate for a semiconductor device having the single crystal Si _1-X Ge _X layer 12 can be manufactured.

[Step-140] Next, a semiconductor element composed of, for example, a MOS transistor is formed on the obtained semiconductor device multilayer structure substrate. That is, first, in a conventional manner, after forming an isolation region 32 into the single-crystal Si _1-X Ge _X layer 12, to form a gate oxide film 34 on the surface of the single-crystal Si _1-X Ge _X layer 12. Next, the gate electrode 36 made of, for example, polysilicon is formed by the conventional CVD method, photolithography technique and etching technique. Next, ion implantation of impurities (B, P, As, etc.) depending on the conductivity of the semiconductor element to be produced is performed in the source / drain formation regions of the single crystal Si _1-X Ge _X layer 12, and an annealing treatment is performed. Then, the impurities are activated to form the source / drain regions 38, and then the unnecessary gate oxide film is removed. In this way, a semiconductor element composed of a MOS transistor is formed on the single crystal Si _1-x Ge _x layer 12 (see FIG. 3A).

[Step-150] After that, the insulating layer 40 is formed on the entire surface by a conventional method, an opening is formed in the insulating layer 40 by the RIE method, and the wiring material 42 is formed on the opening and the insulating layer 40. The connection hole and the wiring layer are completed by depositing by a sputtering method or a CVD method (see FIG. 3B).

(Embodiment 2) Embodiment 2 is a modification of the method for manufacturing the multilayer structure substrate for a semiconductor device described in Embodiment 1. The difference from the first embodiment is that a plurality of single crystal Si _1-x Ge _x layers (for example, two layers in the second embodiment) are formed.

[Step-200] First, as in [Step-100] of Example 1, the thickness of the surface of the first semiconductor layer forming substrate 10A made of a silicon single crystal was measured by the rapid heating chemical vapor deposition method. 50 nm single crystal Si _1-X Ge _X layer (however, X
= 0.1) 12A is formed. Further, in a similar manner, the surface of the second (another) semiconductor layer forming substrate 10B made of silicon single crystal is also subjected to the rapid heating chemical vapor deposition method to have a thickness of 5
0 nm single crystal Si _1-X Ge _X layer (where X = 0.1) 1
Form 2B.

[Step-210] Then, in the same manner as in [Step-110] of Example 1, single crystal Si is formed by an ordinary CVD method.
_{On the 1-X} Ge _X layer 12A, a thickness of, for example, SiO _{2 of} 2
The insulating layer 14A having a thickness of 50 nm is formed, and the insulating layer 14A
To be smoothed. Similarly, single crystal Si _1-X
On the Ge _x layer 12B, a thickness of, eg, SiO ₂ 250
The insulating layer 14B having a thickness of 10 nm is formed, and the insulating layer 14B is polished and smoothed.

[Step-220] After that, the insulating layer 14A of the first semiconductor layer forming substrate 10A and the insulating layer 14B of the second semiconductor layer forming substrate 10B are opposed to each other, and the [Step- 120], the first semiconductor layer forming substrate 10A and the second semiconductor layer forming substrate 10B
Are pasted together (see FIG. 4A).

[Step-230] Next, for example, the second semiconductor layer forming substrate 10B is removed, and the single crystal Si _1-X Ge _X layer 12B and the insulating layer are formed on the surface of the first semiconductor layer forming substrate 10A. 14B and 14A and the single crystal Si _1-x Ge _x layer 12A are left (see FIG. 4B). Second semiconductor layer forming substrate 1
The removal of 0B can be performed in the same manner as in [Step-130] of Example 1. The second semiconductor layer forming substrate 10B
Alternatively, the first semiconductor layer forming substrate 10A may be removed.

[Step-240] After that, as in the case of [Step-110] of Example 1, single crystal Si is formed by a normal CVD method.
_{On the 1-X} Ge _X layer 12B, a thickness of, for example, SiO ₂ 5
The insulating layer 14C having a thickness of 00 nm is formed, and the insulating layer 14C
To be smoothed.

[Step-250] After that, clean S on the surface
The supporting substrate 20 made of a silicon substrate on which the iO ₂ film 22 is formed and the first semiconductor layer forming substrate 10A on which the insulating layer 14C is formed are opposed to each other (see (C) of FIG. 4), and the first embodiment is shown. Lamination is performed in the same manner as in [Step-120] of (see FIG. 5A).

[Step-260] Next, the first semiconductor layer forming substrate 10A is removed, and the single crystal Si _1-X Ge _X layers 12A and 12B and the insulating layers 14A and 14 are formed on the surface of the supporting substrate 20.
Leave B and 14C. The removal of the first semiconductor layer forming substrate 10A can be performed in the same manner as in [Step-130] of the first embodiment. Thus, as shown in the schematic partial sectional view of FIG. 5B, for a semiconductor device having a plurality of layers (two layers in the second embodiment) of single crystal Si _1-X Ge _X layers 12A and 12B. A multilayer structure substrate can be manufactured.

Single crystal Si _1-x Ge _{x of} N layer (where N ≧ 3)
When the layer is formed on the supporting substrate, [Step-230]
Then, the following steps are performed. That is, (A) on the exposed single crystal Si _1-X Ge _X layer, for example, Si
An insulating layer made of O ₂ is formed. (B) Further, a single crystal Si _1-x Ge _x layer (where X = 0.1) of silicon single crystal having a thickness of 50 nm is formed on the surface by the rapid heating chemical vapor deposition method. Another semiconductor layer forming substrate in which an insulating layer made of, for example, SiO ₂ is formed on the single crystal Si _1-x Ge _x layer is prepared. (C) Then, in the same manner as in [Step-120] of Example 1, these two semiconductor layer forming substrates are bonded together with their insulating layers facing each other. (D) After that, one of the semiconductor layer forming substrates is removed by the same method as in [Step-130] of Example 1.

These steps (A) to (D) are repeated as many times as necessary to form an N layer single crystal Si _{1- x} Ge _x layer, and then [step-250] to [step-260]. carry out.

Example 3 Example 3 relates to a method for manufacturing a semiconductor device multilayer structure substrate and a semiconductor element according to the present invention. The method for manufacturing the multilayer structure substrate is a method belonging to the category of island-shaped dielectric isolation technology. The formed Si _1-x Ge _x layer is one layer.

[Step-300] First, in the same manner as in [Step-100] of Example 1, as shown in FIG. 6A, the surface of the semiconductor layer forming substrate 10 made of silicon single crystal was formed. 50 nm thick single crystal Si _1-X Ge _X layer (however, X
= 0.1) 12 is formed. Single crystal Si _1-X Ge _X layer 12
The thickness variation is preferably within ± 4 nm, for example.

[Step-310] Next, a portion corresponding to the element isolation region of the semiconductor layer forming substrate 10 having the single crystal Si _1-x Ge _x layer 12 formed on the surface thereof is formed by, for example, a photolithography technique and an etching technique. , Trenches or V-grooves 16 are formed (see FIG. 6B).

[Step-320] Next, by a normal CVD method, on the single crystal Si _1-x Ge _x layer 12 and the trench or V.
An insulating layer 14 made of, for example, SiO ₂ and having a thickness of 0.1 μm is formed in the groove 16. The method for forming the insulating layer 14 can be the same as, for example, [Step-110] of the first embodiment.

[Step-330] Next, for example, C
After depositing the polysilicon layer 18 by the VD method, the surface of the polysilicon layer 18 is polished to be smooth (FIG. 6).
(See (C)).

[Step-340] Then, the surface is cleaned with S.
Support substrate 2 made of silicon on which an iO ₂ film 22 is formed
0 and the semiconductor layer forming substrate 10 on which the polysilicon layer 18 is formed face each other, and 700
The semiconductor layer forming substrate 10 and the supporting substrate 20 are bonded together by thermocompression bonding in an O ₂ atmosphere of ° C or higher (see FIG. 7A). Incidentally, instead of the SiO ₂ film 22, for example, PSG, BSG, BPSG,
You may form various insulating films, such as SiN. The bonding between the semiconductor layer forming substrate 10 and the supporting substrate 20 is performed in the first embodiment.
Other methods described in [Step-120] of can also be used.

[Step-350] Next, the semiconductor layer forming substrate 10 is removed, and the insulating layer 14 and the single crystal Si _1-x Ge _x layer 12 are left on the surface of the supporting substrate 20. The removal of the semiconductor layer forming substrate 10 can be performed, for example, in the same manner as in [Step-130] of the first embodiment. As a result, the element isolation region 32 including the trench or the V groove is formed.

Thus, as shown in the schematic partial cross-sectional view of FIG. 7B, a multilayer structure substrate for a semiconductor device having the single crystal Si _1-X Ge _X layer 12 can be manufactured.
Each element formation region 30 in the single crystal Si _1-x Ge _x layer 12 is separated by an element separation region 32.

[Step-360] Next, a semiconductor element made of, for example, a MOS transistor is formed on the obtained semiconductor device multilayer structure substrate. That is, first, the gate oxide film 34 is formed on the entire surface by the conventional method. Then, a gate electrode 36 made of, for example, polysilicon is formed on the conventional CV.
It is formed by D technology, photolithography technology, and etching technology. Next, ion implantation of impurities (B, P, As, etc.) depending on the conductivity of the semiconductor element to be manufactured is performed in the source / drain formation planned regions of the single crystal Si _1-X Ge _X layer 12, and an annealing treatment is performed. Then, the impurities are activated to form the source / drain regions 38, and then the unnecessary gate oxide film is removed. In this way, a semiconductor element composed of a MOS transistor is formed on the single crystal Si _1-x Ge _x layer 12 (see FIG. 8A).

[Step-370] After that, the insulating layer 40 is formed on the entire surface by a conventional method, an opening is formed in the insulating layer 40 by the RIE method, and the wiring material 42 is formed on the opening and the insulating layer 40. The connection hole and the wiring layer are completed by depositing by a sputtering method, a CVD method or the like (see FIG. 8B).

(Embodiment 4) Embodiment 4 is a modification of the method for manufacturing a semiconductor device described in Embodiment 3. The difference from the third embodiment is that a plurality of Si _1-x Ge _x layers (for example, two layers in the fourth embodiment) are formed. Also, the lower layer S
The semiconductor element formed in the i _1-X Ge _X layer was a MOS transistor.

[Step-400] First, similarly to [Step-100] of Example 1, the thickness of the surface of the first semiconductor layer forming substrate 10A made of silicon single crystal was measured by the rapid thermal chemical vapor deposition method. 50 nm single crystal Si _1-X Ge _X layer (however, X
= 0.1) 12A is formed. Then, in the same manner as in [Step-110] of Example 1, single crystal Si is formed by a normal CVD method.
_{On the 1-X} Ge _X layer 12A, a thickness of, for example, SiO _{2 of} 2
The insulating layer 14A having a thickness of 50 nm is formed, and the insulating layer 14A
Are polished to be smooth (see FIG. 9A).

[Step-410] Separately from this, Example 1
In the same manner as in [Step-100], a single-crystal Si _1-x Ge _x layer having a thickness of 50 nm is formed on the surface of the second semiconductor layer forming substrate 10B made of a silicon single crystal by the rapid heating chemical vapor deposition method. (However, X = 0.1) 12B is formed.

[Step-420] A semiconductor element is formed on the second semiconductor layer forming substrate 10B. That is, single crystal S
A gate oxide film 34B is formed on the i _1-X Ge _X layer 12B by a conventional method, and then a polysilicon layer is formed on the gate oxide film 34B by a conventional CVD method, and a photolithography technique and an etching technique are used. Forming a gate electrode 36B from the polysilicon layer. After that, single crystal Si _1-X G
e the source-drain formation region of the _X layer 12B, impurities depending on the conductivity of the semiconductor device to be fabricated (B, P,
As and the like) is ion-implanted and an annealing treatment is performed to activate the impurities to form the source / drain regions 38B, and then an unnecessary gate oxide film is removed. Thus, M
A semiconductor element composed of an OS transistor is a single crystal Si
It is formed on the _1-X Ge _X layer 12B.

[Step-430] Next, for example, S is formed on the entire surface of the semiconductor layer forming substrate 10B on which the semiconductor element is formed.
An insulating layer 14B made of iO ₂ is formed, and the insulating layer 1
4B is polished to be smooth (see FIG. 9B).

[Step-440] After that, the insulating layer 14A of the first semiconductor layer forming substrate 10A and the insulating layer 14B of the second semiconductor layer forming substrate 10B are opposed to each other (FIG. 9).
(C)), the first semiconductor layer forming substrate 10A and the second semiconductor layer forming substrate 10B are bonded together by the same method as in [Step-120] of Example 1 ((A in FIG. 10). )
reference).

[Step-450] Next, for example, the second semiconductor layer forming substrate 10B is removed, and the single crystal Si _1-X Ge _X layer 12B and the insulating layer are formed on the surface of the first semiconductor layer forming substrate 10A. 14B and 14A and the single crystal Si _1-x Ge _x layer 12A are left. The removal of the second semiconductor layer forming substrate 10B can be performed in the same manner as in [Step-130] of the first embodiment. still,
Instead of the second semiconductor layer forming substrate 10B, the first semiconductor layer forming substrate 10A may be removed.

[Step-460] After that, as in the case of [Step-110] of Example 1, single crystal Si is formed by a normal CVD method.
_{On the 1-X} Ge _X layer 12B, a thickness of, for example, SiO ₂ 5
The insulating layer 14C having a thickness of 00 nm is formed, and the insulating layer 14C
Are smoothed by polishing (see FIG. 10B).

[Step-470] Next, the trench or the V-groove 16 is formed in the portion corresponding to the element isolation region of the first semiconductor layer forming substrate 10A by, for example, the photolithography technique and the etching technique.

[Step-480] Next, by a normal CVD method, on the insulating layer 14C and in the trench or the V groove 16,
For example, an insulating layer 14D made of SiO ₂ and having a thickness of 0.1 μm
To form. The method for forming the insulating layer 14D can be the same as, for example, the [Step-110] of the first embodiment.

[Step-490] Next, in the same manner as in [Step-330] of Example 3, a polysilicon layer 18 is deposited on the entire surface by, eg, CVD method, and then the polysilicon layer 18 is formed. The surface is polished to be smooth (see FIG. 11A).

[Step-500] After that, the supporting substrate 20 and the first semiconductor layer forming substrate 10A are bonded together by the same method as in [Step-340] of the third embodiment.

[Step-510] Next, in the same manner as in [Step-350] of Example 3, the first semiconductor layer forming substrate 10A was removed, and the single crystal Si _{1- X}
Ge _X layers 12A, 12B and insulating layers 14A, 14B, 1
Leave 4C and 14D.

Thus, a schematic part of FIG.
As shown in the cross-sectional view, two layers of Si_{1- X}Ge_XHalf with layers
A multilayer structure substrate for a conductor device can be manufactured. still,
Si_1-XGe_XEach element formation region in the layer is
Separated by area 32. In addition, the lower single crystal S
i_1-XGe_XA semiconductor element is formed on the layer 12B.

[Step-520] Next, the uppermost single-crystal Si _1-x Ge _x layer 12 of the obtained multi-layer substrate for a semiconductor device is obtained.
A semiconductor element including, for example, a MOS transistor is formed in A (see FIG. 12A). This step can be performed in the same manner as in [Step-140] of Example 1. still,
In the figure, 34A is a gate oxide film, 36A is a gate electrode, 3
8A is a source / drain region.

After that, the insulating layer 40 is formed on the entire surface by a conventional method, and the insulating layers 40, 14A and 14B and the single crystal Si are formed.
_An opening is formed in the _1-X Ge _X layer 12A by the RIE method, and the wiring material 42 is deposited on the opening and the insulating layer 40 by the sputtering method, the CVD method, or the like to complete the connection hole and the wiring layer. (See FIG. 12B).

N layer (N ≧ 3) single crystal Si _1-x Ge _x
When the layer is formed on the supporting substrate and the semiconductor element is formed, the following steps are performed after [Step-450]. (A) On the exposed single crystal Si _1-x Ge _x layer, for example, Si
An insulating layer made of O ₂ is formed. (B) Further, a single crystal Si _1-x Ge _x layer (where X = 0.1) of silicon single crystal having a thickness of 50 nm is formed on the surface by a rapid heating chemical vapor deposition method, and a semiconductor element Then, another semiconductor layer forming substrate in which an insulating layer made of, for example, SiO ₂ is formed on the single crystal Si _1-x Ge _x layer is prepared. (C) Then, in the same manner as in [Step-120] of Example 1, the two semiconductor layer forming substrates are bonded together with their insulating layers facing each other. (D) After that, one of the semiconductor layer forming substrates is removed by the same method as in [Step-130] of Example 1.

These steps (a) to (d) are repeated as many times as necessary to obtain the N-layer single crystal Si _{1- x} Ge _x layer and (N-
After forming the semiconductor element layer of layer 1), [step-460]
~ [Step-520] is performed.

The present invention has been described above based on the preferred embodiments, but the present invention is not limited to these embodiments. The conditions and numerical values in each step are exemplifications, and can be appropriately changed. Instead of single crystal Si _1-x Ge _x , polycrystalline Si _1-x Ge _x can optionally be used.

As a substrate for forming a semiconductor layer, a substrate having a silicon single crystal layer formed on the surface of quartz, glass or the like can be exemplified instead of the silicon substrate.

As a supporting substrate, instead of a silicon substrate having an insulating layer formed on its surface, a semi-insulating substrate or insulating substrate having a silicon layer or various insulating layers formed on its surface, or an insulating layer being provided on the surface. The formed metal substrate can be used. Various semiconductor elements made of silicon or Si _1-x Ge _x may be formed on the support substrate.

[0071]

According to the present invention, Si _1-X G is formed on the surface of a semiconductor layer forming substrate whose surface is composed of a silicon single crystal layer.
An e _x layer is formed. Si _1-X Ge _X layer formation, Si _1-X
The thickness of the Ge _x layer can be controlled with high accuracy. Further, the removal of the semiconductor layer forming substrate can be stopped near the interface between the semiconductor layer forming substrate and the Si _1-x Ge _x layer. Therefore, the thickness of the Si _1-x Ge _x layer, which is the semiconductor layer on which the semiconductor element is to be formed, can be controlled with high accuracy.

Since Si _1-x Ge _x has greater mobility than Si, a semiconductor element formed in the Si _1-x Ge _x layer can operate at a higher speed than a semiconductor element made of Si. It will be possible.

[Brief description of drawings]

FIG. 1 is a schematic partial cross-sectional view of a substrate in each step for explaining a method for manufacturing a multilayer substrate for a semiconductor device of Example 1.

2 is a schematic partial cross-sectional view of the substrate in each step for explaining the manufacturing method of the multilayer-structured substrate for a semiconductor device of Example 1, following FIG. 1. FIG.

FIG. 3 is a schematic partial cross-sectional view of the semiconductor element in each step for explaining the manufacturing method of the semiconductor element of Example 1, following FIG.

FIG. 4 is a schematic partial cross-sectional view of a substrate in each step for explaining a method for manufacturing a multilayer substrate for a semiconductor device of Example 2.

FIG. 5 is a schematic partial cross-sectional view of the substrate in each step for explaining the manufacturing method of the semiconductor device multilayer-structured substrate of the second embodiment, following FIG. 4;

FIG. 6 is a schematic partial cross-sectional view of a substrate in each step for explaining a method for manufacturing a semiconductor device multilayer structure substrate in Example 3;

FIG. 7 is a schematic partial cross-sectional view of the substrate in each step for explaining the manufacturing method of the multilayer-structured substrate for a semiconductor device of Example 3 subsequent to FIG.

FIG. 8 is a schematic partial cross-sectional view of the semiconductor element in each step for explaining the manufacturing method of the semiconductor element of Example 3 subsequent to FIG. 7;

FIG. 9 is a schematic partial cross-sectional view of a semiconductor element in each step for explaining a method for manufacturing a semiconductor element of Example 4.

FIG. 10 is a schematic partial cross-sectional view of the semiconductor element in each step for explaining the manufacturing method of the semiconductor element of Example 4 subsequent to FIG.

11 is a schematic partial cross-sectional view of the semiconductor element in each step for explaining the manufacturing method of the semiconductor element according to Example 4 subsequent to FIG.

FIG. 12 is a schematic partial cross-sectional view of the semiconductor element in each step for explaining the manufacturing method of the semiconductor element of Example 4 subsequent to FIG. 12;

FIG. 13 is a schematic partial cross-sectional view of a substrate in each step for producing a multilayer structure substrate by a conventional SIMOX method.

FIG. 14 is a schematic partial cross-sectional view of a substrate in each step for producing a multilayer structure substrate by the conventional island-shaped dielectric isolation technique.

[Explanation of symbols]

10, 10A, 10B Semiconductor layer forming substrate 12, 12A, 12B Single crystal Si _1-X Ge _X layer 14, 14A, 14B, 14C, 14D Insulating layer 16 Trench or V groove 18 Polysilicon layer 20 Support substrate 22 SiO ₂ Film 30 Element forming region 32 Element isolation region 34, 34A, 34B Gate oxide film 36, 36A, 36B Gate electrode 38, 38A, 38B Source / drain region 40 Insulating layer 42 Wiring material

Claims (6)

[Claims] To claim 1 (i) surface of the semiconductor layer-forming substrate made of silicon single crystal layer surface, forming a Si _1-X Ge _X layer, (ii) the Si _1-X Ge _X layer on A step of forming an insulating layer on the substrate, (c) a step of adhering a supporting substrate to the insulating layer, and (d) removing the semiconductor layer forming substrate, and forming a Si _1-x Ge _x layer and an insulating layer on the surface of the supporting substrate. A method of manufacturing a multilayer structure substrate for a semiconductor device, comprising the step of leaving a layer. 2. The method for producing a multilayer structure substrate for a semiconductor device according to claim 1, wherein the Si _1-x Ge _x layer is made of single crystal Si _1-x Ge _x . 3. Subsequent to the step (b), a surface is composed of a silicon single crystal layer, a Si _1-x Ge _x layer is formed on the surface, and an insulating layer is formed on the Si _1-x Ge _x layer. And the insulating layer of the other semiconductor layer forming substrate and the insulating layer of the semiconductor layer forming substrate on which the Si _1-X Ge _X layer and the insulating layer have already been formed. Face to face 2
Step of adhering one semiconductor layer forming substrate, step of removing one semiconductor layer forming substrate, and exposed Si
_The method for producing a multilayer structure substrate for a semiconductor device according to claim 1 or 2, wherein the step of forming the insulating layer on the _1-X Ge _X layer is repeated a desired number of times. 4. A (i) surface of the semiconductor layer-forming substrate made of silicon single crystal layer surface, forming a Si _1-X Ge _X layer, (ii) the Si _1-X Ge _X layer on A step of forming an insulating layer on the substrate, (c) a step of adhering a supporting substrate to the insulating layer, and (d) removing the semiconductor layer forming substrate, and forming a Si _1-x Ge _x layer and an insulating layer on the surface of the supporting substrate. A step of leaving a layer, and (e) a step of forming a semiconductor element on the Si _1-x Ge _x layer,
A method of manufacturing a semiconductor device, comprising: 5. The method for manufacturing a semiconductor device according to claim 4, wherein the Si _1-x Ge _x layer is made of single crystal Si _1-x Ge _x . 6. Subsequent to the step (b), a surface is composed of a silicon single crystal layer, a Si _1-x Ge _x layer is formed on the surface, and a semiconductor element is formed on the Si _1-x Ge _x layer. Another semiconductor forming substrate on which an insulating layer is formed is prepared, and the insulating layer of the another semiconductor layer forming substrate and Si _{1 -X} Ge
_A step of bonding two semiconductor layer forming substrates by facing the insulating layer of the semiconductor layer forming substrate on which the _X layer, the semiconductor element and the insulating layer are formed, a step of removing one semiconductor layer forming substrate, 6. The method for manufacturing a semiconductor device according to claim 4, wherein the step of forming an insulating layer on the exposed Si _1-x Ge _x layer is repeated a desired number of times.