JPH06232336A - Integrated circuit - Google Patents

Abstract

PURPOSE:To provide an integrated circuit of a constitution, wherein in the design of the integrated circuit, a layout design is facilitated and a period for the design can be shortened and a period, a cost and the like, which are required for a prototype, can be reduced. CONSTITUTION:An integrated circuit is formed into a constitution, wherein an element layout on a chip is made by laying out a plurality of pieces of standardized modules, each comprising a plurality of pieces of transistors, and to the laid-out respective modules, transistor elements not constituting the modules are provided with first customizing functions (1, 2 and 4) including the function of an active or inactive change-over in a circuit manner and second customizing functions (3, 4 and 5) to change over the element characteristics of the transistors.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION This invention relates to integrated circuits. INDUSTRIAL APPLICATION This invention can be utilized as an integrated circuit of various structures, for example, can be suitably utilized as a bipolar (bipolar) type integrated circuit which mainly has an analog circuit as a main.

[0002]

2. Description of the Related Art A bipolar integrated circuit is a mainstream device for analog signal processing. Another integrated circuit structure is a MOS type, which is widely used as an integrated circuit for digital circuits.

Recently, in the development of a circuit of a bipolar integrated circuit for an analog circuit, the following points have become serious problems. Long development period and high development cost. Normally, the first prototype type is rarely fully operated, and the prototype is usually made 2-3 times, but the time and cost for the modification are major problems. The above problems are increasing more and more in comparison with the recent shortening of the product development cycle of applied products and the prolongation of the development period accompanying the increase in the scale of the bipolar integrated circuit. On the other hand, the development period of digital integrated circuits has been shortened due to advances in design methods and simulation techniques, and trends in this development period have also become the driving force for digitization of signal processing.

The following reasons can be considered as reasons why the digital integrated circuit can easily introduce a new design method or simulation technology. (1) Fewer types of basic circuits Basically, a combination of basic logic gates such as NAND or NDR makes it easy to treat a certain functional unit as a cell and set it hierarchically. (2) Easy description of specifications With respect to the specifications of each block, the functions thereof are defined strictly mathematically, and as other elements, the specifications can be described by defining the operation speed and the driving capability of the output terminal. (3) Easy simulation Since the element only performs a simple switching operation,
Simulation is possible with a simple model, and the function and characteristics of large-scale circuits can be verified by simulation. (4) Easy automatic setting Since each low-level functional unit can be handled as a cell, and since signals with almost the same level of amplitude exist in the integrated circuit, the layout of each functional unit in the integrated circuit chip is as follows. It is only necessary to consider the speed factor and the integration factor (arrangement of chips in high density), and it is easy to support automatic design by a computer.

An analog bipolar integrated circuit reverses the above. (1) There are many types of basic circuits There are too many types of basic circuits, and systematization is not possible. There are also numerous means to achieve the same function. Even similar circuits require detailed specifications and functions, and cannot simply be treated as cells. (2) Specification is difficult There are so many parameters that it is impossible to design them to meet all applications.
There are many parameters that are difficult to express, and there is no problem in one application with the same circuit, and it is not practical in another application. Also, when combined with the B circuit, the A circuit has no problem. It is not uncommon for problems such as oscillation to occur when combined with a C circuit. (3) Simulation is complicated The active element (transistor) operates in a very complicated manner, and a complex model that expresses the physical behavior in the active element is required. Therefore, it is practically difficult to simulate a large-scale circuit, and the whole function and characteristics are estimated from the simulation of a medium-scale circuit book. (4) Difficult automatic design It is difficult to deal with automatic design such as digital integrated circuits because signals with various amplitudes and frequencies are mixed and the characteristics depend on how each functional block is arranged.

Under the above-mentioned background, the analog bipolar integrated circuit has been developed in a "single dish" development mode. In order to respond to the shortening of the development cycle of applied products and the improvement of digital integrated circuit design technology in the future, it is necessary to establish a design method capable of addressing the following two points. (I) Shortening circuit design and layout design period by introducing cell design (II) Shortening layout design period, wafer trial period and cost reduction in modified prototype

Regarding (I), although the necessity has been said for a long time, it has not made much progress so far. The reason is that it is very difficult to handle cells as a black box as described above, and if all the cells are prepared for each detailed specification or function, almost innumerable cells must be prepared.

FIG. 9 is a diagram for explaining the reason. An operational amplifier is the most basic functional circuit of an analog circuit, and its specifications are easy to describe clearly in the analog circuit. There are probably several tens of basic circuits, but if a wafer process or an application field of an integrated circuit is limited, most of the basic circuits can be covered. However, there are several kinds of detailed specifications shown in FIG. 9, and considering the combination, more than 20 to 30 kinds of cells are required even when looking at the operational amplifier alone. Furthermore, the operational amplifier is accompanied by a peripheral circuit, whereby the operational circuit plays a role of a certain functional circuit in the integrated circuit. This peripheral circuit is defined as a higher-level function of the operational amplifier and further determines its detailed specifications.

From this point of view, it becomes clear that even if only the operational amplifier is considered, several hundreds of kinds of cells are required, and it is difficult to design such as a digital integrated circuit. The basic circuit may be standardized, but the cell for layout design must be a unit cell including the peripheral circuit, and even this has not made much progress.

With respect to (II), the perfect operation of the first prototype sample is not highly probable due to the various reasons described above, and it is unavoidable to expect the correction once or twice. At that time, the problems are the layout design and the period and cost of the wafer prototype process. As for circuit design, it often takes only a short time to solve problems that have been overlooked or could not be verified at the time of initial design, as compared with the initial design. However, in the case of modification, even if a few transistors are added, it is necessary to change the layout in the integrated circuit chip over a wide area, and the wafer process is initially performed because only one transistor is added. The situation often had to be re-tried from the process.

That is, in the correction cycle, the circuit design can be performed in a time period that can be neglected on average in the initial design ratio, but the layout design time requires a non-negligible time period compared to the initial design time, and the wafer In many cases, the process requires the same time and cost as the initial trial production. Much of the cost required to re-manufacture is spent on mask re-manufacturing and wafer re-manufacturing.

As described above, in the development of the analog bipolar type integrated circuit, it is basically unavoidable to repeat the trial manufacture a few times, but how to reduce the period and cost of the retrial production. It is a big issue. In addition, in the initial design, it was necessary to establish a cell design method familiar with analog circuit design and design the circuit by this in order to shorten the layout design.

[0013]

SUMMARY OF THE INVENTION The present invention solves the above-mentioned problems of the prior art, facilitates layout design in the design of an integrated circuit, shortens the period for designing, and reduces the period and cost required for prototyping. It is an object of the present invention to provide an integrated circuit that can be used.

[0014]

According to the invention of claim 1 of the present application, elements are arranged on a chip by arranging a plurality of standardized modules including a plurality of transistors, and each of the arranged modules is arranged. In this module, the transistor element in the module is provided with a first customization function that includes switching between active and inactive circuits and a second customization function that switches the element characteristics of the transistor. Which achieves the above object.

According to the invention of claim 2 of the present application, the first customization function is in an active state in which the circuit is active, is not used in the circuit, and the contact hole and the electrode are removed. 2. The integrated circuit according to claim 1, which controls three states of an active state and a removed state which is a state of being erased from the integrated circuit chip.
This achieves the above object.

According to the invention of claim 3 of the present application, the second customization function switches the presence or absence of the contact hole and the electrode metal of one base electrode of the transistor element of the double base structure arranged in the module, The integrated circuit according to claim 1, wherein the integrated circuit has a function of switching between using the same transistor as a double base transistor or a single base transistor. is there.

In the invention according to claim 4 of the present application, the second customizing function is the presence or absence of contact holes and electrode metal of M emitter electrodes in N multi-emitter structure transistors arranged in a module. 2. The integrated circuit according to claim 1, wherein the same transistor is used to control the function of using the same transistor as N-M arbitrary multi-emitter transistors. To do.

The invention according to claim 5 of the present application comprises a third customizing function for controlling the capacitance value setting of the capacitive elements arranged in the module. A circuit, which achieves the above object.

The structure of the present invention will be described below with reference to FIGS. 1 and 2 illustrating the integrated circuit of the present invention.

FIG. 1 is an explanatory diagram of the customization function.
FIG. 2 is a diagram showing a standardized module. In the present invention, however, a plurality of standardized modules including a plurality of transistors are arranged as shown in FIG. None (in FIGS. 1 and 2, C, E,
B indicates a collector, an emitter, and a base, and C ₁ and C ₂ indicate capacitances), and for each module that is arranged, a transistor element in the module includes a first circuit that includes switching between active and inactive circuits. The configuration B is provided with a customization function and a second customization function for switching the element characteristics of the transistor. In FIG. 1, reference numeral 1 is a deleted transistor, 2 is an off transistor,
Reference numeral 3 is a transistor customized as a single base, 4 is a transistor in which two emitters are inactivated, and 5 is a capacitance whose capacity is customized. This will be described in detail later in the description of the embodiment. The customization function according to the invention is embodied and configured.

[0021]

In the present invention, basically, the transistor element in the module is provided with the first customizing function including switching the circuit active / inactive and the second customizing function switching the element characteristic of the transistor. As a result, it is possible to use the same module as a wide range of circuit elements.

More specifically, according to the present invention, as a module, an integrated circuit chip is arranged as a set of standardized modules as shown in FIG. 2, and the module is provided with a customization function. With this customization function, the elements in the module can be used as a plurality of types of circuit elements. With this function,
Empirically, it is possible to realize most of the circuits by using several kinds of modules, except for a circuit including a special element. Although the element density of the laid out circuit is lower than that of the normal full custom layout, the difference is small at least in the polysilicon resistance process.
It is about 20%. With the recent increase in the scale of integrated circuits, the factor that determines the chip size of the circuit is the interconnection between blocks, rather than the size of the functional circuit itself, and the effect of only a few percent on the whole chip. Absent.

According to the present invention, it is possible to significantly reduce the layout design period of the modified trial production, the wafer trial production period and the trial production cost. Since this can automatically add redundancy (extra elements) in advance, problems found in the first prototype can be resolved by redundant elements, repositioning resistors, resetting capacitance values, changing connections, and customizing functions. Can be absorbed flexibly. Therefore, even if the trial manufacture is not started from the first process again, the correction wafer may be advanced to the intermediate process in the first trial manufacture, and the correction may be started from there. As a result, the correction trial production period and the correction cost can be significantly reduced. For example, in the case of the polysilicon resistance process as an example, it can be reduced to about 1/3. In the past, trial production of all steps was sometimes performed to add one transistor.

The redundancy of the module means that the layout modification accompanying the circuit modification can be completed within a local block. Therefore, it also contributes to shortening the layout period.

Furthermore, the present invention facilitates the introduction of cell designs. As described above, in the case of an analog circuit, it is difficult to put the solidified cell into practical use, in which no characteristics can be changed. However, according to the present invention, it is possible to flexibly cope with the change in the function and the detailed specification in FIG. 9 without changing the module by using the connection and resistance change customization function. For example, suppose a designer A creates an a circuit. B
Suppose that the designer needs a b circuit that has the same basic circuit as the a circuit but different detailed functions and specifications. Conventionally, the b circuit was newly designed as not usable for the a circuit, but at least in the layout design, without changing the module of the a circuit, in the range of connection, small change of resistance and customization function, redundant element. The circuit b can be realized, and the layout of the circuit a has been reused as a design asset.

Up to now, the layout of the block becomes new even if the circuit is changed a little. Therefore, it is considered that the circuit design is zero-based, and the cell design is not advanced in the analog integrated circuit. For the reason, according to the present invention, since the layout property can be reused if there is a similar circuit, the design culture of using the circuit used so far is fostered.

[0027]

EXAMPLES Examples of the present invention will be described below. However, as a matter of course, the present invention is not limited to the embodiments.

Embodiment 1 This embodiment embodies the present invention in the layout design of an analog bipolar integrated circuit.

FIG. 2 shows a module which is the basic unit of layout design in this configuration example. The module mainly includes an NPN transistor and a PNP transistor, and further includes a capacitor and a resistor depending on the process.

The bipolar integrated circuits are systematically classified into several types. Looking first at the structure of the PNP, there are a normal process of the lateral (lateral) PNP structure and a process of the vertical (vertical) PNP structure. The latter has a complicated structure, but the degree of freedom in circuit design increases, and it can be used properly depending on its purpose. The structure of resistors is roughly classified into a diffusion resistance process formed in the bulk of silicon of a chip and a polysilicon resistance process formed of a polycrystalline silicon film on an insulating film on the silicon surface. The latter is complicated in terms of structure and process, but since the layout design is easy and the degree of integration is improved, it has come to be generally used at the present when the manufacturing technology is established. Further, when the resistance is formed by the polysilicon resistance, the latter step is performed, and therefore the effect of the present invention is more exerted in the polysilicon resistance process.

The module used in this embodiment shown in FIG. 2 is an example designed for a vertical PNP / polysilicon resistor process. Reference numeral a in FIG. 2 is NPN,
A general-purpose module in which PNPs are mixed, b is a general-purpose module also having a built-in capacity, and c is an NPN.
A module with only transistors, for example ECL
(Emitter-coupled logic circuit) etc. Reference numeral d denotes a module used for a voltage amplification stage and an output stage of the operational amplifier, and has a built-in capacitor for phase compensation.

FIG. 3 shows an example of the silicon portion of the integrated circuit chip produced according to this embodiment. In this embodiment,
The unit shown in FIG. 2 is assigned to each functional circuit in the designed circuit. The functional circuits and the units do not correspond in a 1: 1 manner, but a plurality of functional circuits correspond to one functional circuit (two on average, most of them are 1 to 3). For example N
In the operational amplifier of the PN first stage, the module of FIG. 2A is associated with the first differential stage, and the module of d is assigned to the voltage amplification stage and the output stage. Typically, one module corresponds to 10 to 20 circuit elements. In this way, the module is not made to correspond to each functional circuit in a 1: 1 manner, but is made to correspond to another lower hierarchy, for example, a differential amplification stage of an operational amplifier, a voltage amplification stage and an output stage. , To increase the versatility of the module.

For example, considering a module in which the module shown in FIG. 2A and the module shown in FIG. If divided in units of FIG. 2, for example, the operational amplifier at the first stage of the PNP has a
You only need to replace the module of, and the module of d can be used as it is. Also, the a and d modules can be used for purposes other than operational amplifiers. As described above, the versatility is increased, and according to the experience of the present inventors, it is possible to eliminate the special circuit
With 0 modules, and at most 20 modules, almost any circuit can be covered.

FIG. 3 shows the layout of the silicon portion of the integrated circuit which has been subjected to such allocation.

In this embodiment, by applying the present invention and having a function of customizing the module, the versatility of the module is further enhanced. The customization function will be described in detail below. The main customization functions are the following three points. (1) Customized transistor layout (2) Customized transistor element characteristics (3) Customized capacitance value

The customization function will be described with reference to FIG. There are two types of customizing the transistor layout, a delete state in which the transistors are completely erased from the integrated circuit chip, and an off state in which the transistors are kept inactive in the circuit. Reference numeral 1 in FIG. 1 has a deleted state and an off state in which the circuit is inactivated. Reference numeral 1 in FIG. 1 indicates a deleted state. The deleted region is used as a region for arranging a polysilicon resistor in, for example, a polysilicon resistor process. Generally, there is a step on the insulating film in the transistor region, and disposing a resistor on this is not preferable in terms of accuracy and is often prohibited as a layout rule. Like the NPN, the deleted region of the PNP transistor can be used as an arrangement region of a polysilicon resistor or can be used as a resistance arrangement region of a diffusion resistance process. Since the electrodes (contact holes and aluminum electrodes) of the turned off transistor are erased, the transistor is inactive in terms of the circuit, but it exists as an element. The module is selected to have an element layout similar to that of the functional circuit, but they do not exactly match. Therefore, the extra elements are generated at a certain ratio. Excessive elements are kept off unless there is a layout problem. The turned-off transistor (indicated by reference numeral 2 in FIG. 1) has a possibility of being effectively used when the circuit is modified. Therefore, by arranging the transistors in the off state at an appropriate ratio, it is possible to dramatically increase the probability of completing the trial process from the first process instead of the first process when modifying / retrialing the circuit. The cost can be reduced significantly. In addition, if the layout design can be dealt with by activating the transistor that has been turned off, the correction part will be local,
Very easy to fix. The upper portion of the turned off transistor can be used as a wiring region.

Next, the function of customizing the transistor element characteristics will be described. This also consists of two types of functions.
Reference numeral 3 in FIG. 1 shows an example in which the double base NPN transistor is customized as a single base transistor. The double base transistor is used as a transistor in which noise is reduced by lowering the base resistance, but it is usually used only in a small part of the circuit.
If a double-base structure transistor is arranged in each module, it can be used as a double-base transistor when necessary, and usually can be used as a single-base transistor by deleting one of the base electrodes. One of the erased base electrodes is used as a wiring region. Reference numeral 4 in FIG. 1 shows an example in which a transistor having four multi-emitters is used as two multi-emitter transistors, and two emitter electrodes are erased.
These functions make it possible to use one transistor as a plurality of types of transistors, and contribute to the reduction of the types of required modules.

Reference numeral 5 in FIG. 1 indicates customization of the capacitance value. In the figure, the portion A contributes as a capacitance, and the portion B hardly contributes. Structurally, the recommended method is
The dielectric in part A is composed of a thin nitride film, and the region in B is
Overlapping a nitride film and a thick oxide film. The capacitance value can be customized by determining the thick oxide film region.

As mentioned above, the present invention is more suitable for polysilicon resistor wafer processes. And why
The application to the diffusion resistance process will be described. FIG. 8 shows a wafer trial production process. [A] shows a process up to base diffusion, and [B] shows a process up to polycrystalline silicon etching in a polysilicon resistance process. The details differ for each process, but roughly 1/3 of all steps, 2
/ 3 is a standard.

In the polysilicon resistance process,
The trial production is advanced to the step [B], and the trial production starts from the etching of polycrystalline silicon. Therefore, about 1/3 of the process is required after the trial manufacture, and the number of required masks is close to 1/3 of the whole. Polysilicon resistors can be arranged relatively freely on the surface of the integrated circuit, and the degree of freedom of modification is extremely high, including module redundancy, and the repair period and cost (depending on the number of masks required and the length of the wafer process) Significantly reduced.

When applying the present invention to a diffused resistance process, there are two options. The first method is to advance to the step [A] during the first trial manufacture, that is, before the base diffusion,
This is a method of starting from base diffusion during re-trial production. This method has a high degree of freedom in setting the resistance value and the number of resistors, and has a high degree of freedom in modifying the circuit, but the process of re-trial production and the number of masks are only about 2/3 of the initial trial production.
The reduction of the repair period and repair cost is much inferior to the polysilicon resistance process.

Another option is a method in which a resistor is built in in an initial trial production and the resistance value is switched only by wiring. Since this method can be advanced to the process immediately before the capacitance value setting in the initial trial production, it greatly contributes to the reduction of the correction period and the correction cost. However, the resistance setting is
The degree of freedom is largely restricted because it is made by selecting and connecting resistors that are built in advance.

As described above, the effect of the combination of the diffusion resistance process and the present invention is a combination of a polysilicon resistance which satisfies both the correction period / correction cost and the degree of freedom in circuit design at the time of modification. It is not so dramatic, but it is sufficiently effective in practice.

In this embodiment, in order to obtain the integrated circuit described above, the layout design of the integrated circuit chip can be performed by the following means.

Referring to FIG. FIG. 4A (details are shown in FIG. 5) shows modules arranged to realize a certain functional circuit. It is assumed that there is a module called M1, for example. M1 is arranged in this hierarchy in the form of a so-called subroutine, and its actual state exists in the hierarchy below it. Here, the lower layer in which the actual condition of the module M1 exists is the first layer, and the layer in which the cells (subroutines) of M1 are arranged is the second layer. The presence of a plurality of M1 cells is allowed in the second layer. Since the modules are trying to layout the entire integrated circuit with a few modules, there will be too many identical cells in the second hierarchy.

Customization function data is arranged in the second layer. That is FIG. 4B (details are FIG. 6). Since the customization data placed on each cell is independent for each cell, a large number of one module is placed as a cell, and the customization data is independently given to each cell to create a variety of circuits in the same module. It can be applied. A specific example in (B) shown in FIG. 6 is that the reference numeral B1 indicates an off layer, the reference numeral B2 indicates a delete layer, and the reference numeral B3 indicates an off layer for capacity value customization.

FIG. 4C (detailed in FIG. 7) shows the resistor placed on the customized cell described above, the wiring layer and the resistor layer. These data are also arranged in the second hierarchy.

[0048]

According to the present invention, in the design of an integrated circuit, the layout design can be facilitated, the period for designing can be shortened, and the period and cost required for prototyping can be reduced.

[Brief description of drawings]

FIG. 1 is an explanatory diagram of a customization function.

FIG. 2 shows the structure of a standardized module.

FIG. 3 is a diagram for explaining an example and shows a configuration example of a silicon portion of an integrated circuit chip.

FIG. 4 is a diagram for explaining an integrated circuit layout method according to the embodiment.

5 is a diagram showing a portion (A) of FIG.

6 is a diagram showing a portion (B) of FIG.

FIG. 7 is a diagram showing a portion (C) of FIG.

FIG. 8 is a diagram for explaining the embodiment and is an explanatory diagram of a polysilicon resistance process.

FIG. 9 is a diagram showing a problem.

[Explanation of symbols]

1 Deleted transistor 2 Off transistor 3 Transistor customized as a single base 4 Transistor with two emitters deactivated 5 Capacitance with customized capacitance

Claims (5)

[Claims] 1. A device is arranged on a chip by arranging a plurality of standardized modules each including a plurality of transistors, and each of the arranged modules is provided with a circuit element in a transistor device in the module. An integrated circuit having a first customization function that includes switching between active and inactive states and a second customization function that switches the element characteristics of a transistor. 2. The first customization function includes an active state in which the circuit is active, an inactive state in which the contact hole and the electrode are not used in the circuit and is removed, and an integrated circuit chip. 3. It is one that controls three states of a deleted state which is an erased state.
The integrated circuit described. 3. A second customizing function uses the same transistor as a double base transistor by switching the presence or absence of a contact hole of one base electrode and an electrode metal of a double base structure transistor element arranged in a module. 2. The integrated circuit according to claim 1, which has a function of switching between a single base transistor and a single base transistor. 4. A second customizing function is to switch the N transistors in the multi-emitter structure arranged in a module by switching the presence / absence of contact holes and electrode metal of the M emitter electrodes. The integrated circuit according to claim 1, wherein the integrated circuit has a function of being used as M arbitrary multi-emitter transistors. 5. The integrated circuit according to claim 1, further comprising a third customizing function for setting a capacitance value of a capacitive element arranged in the module.