JPH06232271A - Connection material and input/output control method - Google Patents
Connection material and input/output control methodInfo
- Publication number
- JPH06232271A JPH06232271A JP5032508A JP3250893A JPH06232271A JP H06232271 A JPH06232271 A JP H06232271A JP 5032508 A JP5032508 A JP 5032508A JP 3250893 A JP3250893 A JP 3250893A JP H06232271 A JPH06232271 A JP H06232271A
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- JP
- Japan
- Prior art keywords
- heating
- resistance
- electric resistance
- interconnections
- changed
- Prior art date
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Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、ＲＯＭ等の記憶素子や
電子素子、ＭＤＦ（main distribusion frame)等の配線
材料において、電気抵抗が変化することができる材料を
用いた高性能素子に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high performance element using a material such as a memory element such as a ROM or an electronic element, a wiring material such as an MDF (main distribution frame), which can change its electric resistance.
【０００２】[0002]
【従来の技術】電子回路におけるＯＮ−ＯＦＦのスイッ
チングや結線の切り換え、更にメモリー機能の賦与等の
動作については、従来様々な技術の開発がなされ、実用
に供されてきた。ＭＯＳデバイスによるメモリーなどは
その１例であり、高速、大容量化の流れの中でＲＯＭや
ＲＡＭに適用され大きく発展してきた。また、電気通信
機器に関しても電話回線の加入者の接続切り換えに使用
する、いわゆるＭＤＦにおいて、回線網の複雑化や高速
大容量通信の要請の中で、回線の切り換えの自動化につ
いて様々な技術が開発されてきた。しかし、コンピュー
タ アンド コミュニケーションの時代といわれる現代
の電子素子、記憶素子やＭＤＦには、一層小型で高速、
大容量という高性能化が求められ、更には低コスト化に
対する要請もますます厳しいものがある。ＲＯＭデバイ
スを例にとると、大容量化の流れの中でダイオードマト
リックスをＸＹ２方向の２層の配線の接点間に配し、情
報の内容（“０”又は“１”）によって、そのダイオー
ドを電気的に外部から加えたパルスによって焼き切った
り、短絡したりするプログラマブルＲＯＭが知られてい
る。更にＭＯＳ構造のＲＯＭでは、一度書き込んだ情報
の消去が可能で、書き換えもできるデバイスが開発され
ている。しかし、これらのデバイスは、精密で微細な加
工技術が要求され、製造上の歩留りが悪く、コスト的に
高くなるという欠点を持っているため、構造が単純で、
動作も簡便、製造コストの低い素子、ひいては、それに
用いる材料が要求される状況にある。2. Description of the Related Art Various techniques have been developed and put to practical use for operations such as ON / OFF switching in electronic circuits, switching of connections, and addition of a memory function. A memory such as a MOS device is one example, and has been greatly developed by being applied to ROM and RAM in the trend of high speed and large capacity. With regard to telecommunications equipment, in so-called MDF, which is used for connection switching of telephone line subscribers, various technologies have been developed for automation of line switching in response to complication of network and demand for high-speed and large-capacity communication. It has been. However, modern electronic devices, memory devices and MDFs, which are said to be in the age of computer and communication, are much smaller and faster.
High performance with large capacity is required, and demands for cost reduction are more and more severe. Taking a ROM device as an example, a diode matrix is placed between the contacts of two layers of wiring in the XY2 directions in the flow of increasing capacity, and the diode is changed according to the content of information (“0” or “1”). 2. Description of the Related Art There is known a programmable ROM which burns out or is short-circuited by a pulse electrically applied from the outside. Further, in the ROM having the MOS structure, a device has been developed in which the information once written can be erased and rewritten. However, these devices have the drawbacks that precise and minute processing techniques are required, the manufacturing yield is low, and the cost is high, so the structure is simple,
There is a demand for an element that is simple to operate and has a low manufacturing cost, and eventually a material used for the element.
【０００３】次に、ＭＤＦを例にとると、通信回線網の
高度化の中で、回線接続の相互切り換えに関して、特
に、電話交換機等の機器においてますます接続作業の簡
略化、高速化、小型化、大容量化が求められている。現
在のＭＤＦはメタルＭＤＦと呼ばれるものが主流であ
り、結線しようとする２つの配線間にメタルを挿入して
導通させる方法をとっている。メタルの挿入を自動化し
て動作を高速化させようとする試みがなされているが、
通信システム側からの要求条件を満足するのは難しく、
技術的な、ブレークスルーが待望されている。このよう
な状況をふかんすると、技術的な本質は、電極間を結線
する配線材料にある、といえる。この配線材料が外から
の何らかの刺激によって、“導通状態”と“絶縁状態”
の間を可逆的に変化し、かつ、その変化の速度が速く、
更に外的刺激がある閾値以下の場合、各状態の保存性が
良い、というような材料が実現できれば、各種電子素
子、記憶素子、ＭＤＦ等の性能は飛躍的に向上すると期
待される。Next, taking the MDF as an example, in connection with the sophistication of the communication line network, with regard to mutual switching of line connections, especially in devices such as telephone exchanges, the connection work is increasingly simplified, speeded up, and miniaturized. Demand for higher capacity and larger capacity. What is called a metal MDF is the mainstream of the current MDF, and a method is adopted in which a metal is inserted between two wirings to be connected to make the MDF electrically conductive. Attempts have been made to speed up the operation by automating the insertion of metal.
It is difficult to meet the requirements from the communication system side,
There is a long-awaited technical breakthrough. Considering this situation, it can be said that the technical essence lies in the wiring material that connects the electrodes. This wiring material is "conductive" and "insulated" due to some external stimulus.
Changes reversibly, and the rate of change is fast,
Furthermore, if a material can be realized in which the external stimulus is below a certain threshold and the storage stability of each state is good, it is expected that the performance of various electronic elements, memory elements, MDF, etc. will be dramatically improved.
【０００４】[0004]
【発明が解決しようとする課題】本発明の目的は、上記
の素子の結線と動作に関する諸問題を解決すべく、抵抗
可変材料、特に、光照射、電圧印加、又は加熱により電
気抵抗が可逆的に変化する結線材料を提供することにあ
り、その材料を用いることにより、素子の性能を飛躍的
に向上させる方法を提供することにある。SUMMARY OF THE INVENTION It is an object of the present invention to solve the above-mentioned problems relating to the connection and operation of the device, in which the resistance is reversible, especially when the electric resistance is reversible by light irradiation, voltage application or heating. The purpose of the present invention is to provide a wiring material that changes to the above, and to provide a method for dramatically improving the performance of the device by using the material.
【０００５】[0005]
【課題を解決するための手段】本発明を概説すれば、本
発明の第１の発明は素子間結線材料に関する発明であっ
て、Ｇｅ、Ｔｅ、Ｓｂ及びＩｎよりなる群から選択した
元素のうち少なくとも２種以上の元素を含み、光照射、
電圧印加あるいは加熱によって電気抵抗が変化するもの
であることを特徴とする。そして、本発明の第２の発明
は入出力制御方法に関する発明であって、光照射、電圧
印加あるいは加熱によって電気抵抗が変化する材料で複
数の素子間を電気的に接続し、光照射、電圧印加あるい
は加熱によって、該素子への入出力を制御することを特
徴とする。SUMMARY OF THE INVENTION The present invention will be summarized. The first invention of the present invention relates to an inter-element connection material, and is an element selected from the group consisting of Ge, Te, Sb and In. Light irradiation, containing at least two elements
It is characterized in that the electric resistance is changed by voltage application or heating. A second invention of the present invention relates to an input / output control method, wherein a plurality of elements are electrically connected by a material whose electric resistance changes by light irradiation, voltage application or heating, and light irradiation, voltage It is characterized in that input / output to / from the element is controlled by applying or heating.
【０００６】本発明は素子の配線材料、特に結線材料と
して、光照射、電圧印加、又は加熱（特にヒーター加
熱）で、電気抵抗が可逆的に変化する、いわゆる相変化
材料を用いることを最も主要な特徴とする。相変化材料
は書換型光ディスクに用いる媒体材料として注目されて
おり、光照射あるいは加熱により屈折率が大きく変化す
るユニークな材料である（特開昭６２−２２２４４２号
参照）。本発明者らはこの材料を慎重に吟味した結果、
材料の組成によっては相変化（非晶質相⇔結晶相の変
化）に際して、電気抵抗が１０5 Ω・cm以上も変化する
ことを見出した。例えばＩｎ−Ｓｂ−Ｔｅ系の材料で
は、結晶相１０2 Ω・cmに対して、非晶質相では１０7
Ω・cm以上となる。この変化は、この材料を電極間の結
線材として用いた場合、低抵抗の時「導通」状態、高抵
抗の時、「絶縁」状態として機能させるのに十分であ
る。また、相変化は１００nsecオーダの光照射、あるい
はパルス電圧印加、あるいはヒーターによる加熱等のい
ずれを用いても誘起させることが可能であり、高速に変
化させることができる。また可逆性についても、２つの
状態の間を１０6 回以上、安定して、可逆的に変化させ
ることができる。更に、状態の保存性についても光ディ
スク材料として広く検討されているように、非晶質状態
（絶縁状態）は、室温で１０年以上、変化なく保存さ
れ、十分である。In the present invention, as the wiring material of the element, especially as the connection material, it is most important to use a so-called phase change material whose electric resistance is reversibly changed by light irradiation, voltage application, or heating (particularly heater heating). It is a characteristic. The phase change material has been attracting attention as a medium material used for a rewritable optical disk, and is a unique material whose refractive index is largely changed by light irradiation or heating (see JP-A-62-222442). As a result of careful examination of this material by the present inventors,
It has been found that the electrical resistance changes by 10 5 Ω · cm or more during the phase change (change between the amorphous phase and the crystalline phase) depending on the composition of the material. For example, an In—Sb—Te-based material has a crystalline phase of 10 2 Ω · cm, whereas an amorphous phase has a crystalline phase of 10 7 Ω · cm.
Ω · cm or more. This change is sufficient to function as a "conducting" state when the resistance is low and an "insulating" state when the resistance is high when this material is used as a connecting material between electrodes. The phase change can be induced by using light irradiation of the order of 100 nsec, pulse voltage application, heating with a heater, and the like, and can be changed at high speed. Regarding reversibility, it is possible to stably and reversibly change between the two states 10 6 or more times. Furthermore, as has been widely studied as a material for optical discs with respect to the storability of the state, the amorphous state (insulating state) is sufficient to be stored at room temperature for 10 years or more without any change.
【０００７】この抵抗可変材料を結線材料として用いれ
ば、電子素子、特に記憶素子やＭＤＦなどの性能を飛躍
的に高め、小型化、高速化することができる。また、製
造コスト的にも、素子構造は比較的簡単であり、従来の
ものより有利である。If this variable resistance material is used as a wire connecting material, the performance of electronic devices, particularly memory devices and MDFs, etc., can be dramatically improved, and downsizing and speeding up can be achieved. Also, in terms of manufacturing cost, the element structure is relatively simple, which is advantageous over the conventional one.
【０００８】[0008]
【実施例】以下、本発明を実施例により更に具体的に説
明するが、本発明はこれら実施例に限定されない。EXAMPLES The present invention will now be described in more detail with reference to examples, but the present invention is not limited to these examples.
【０００９】実施例１ 図１に示すようにＸ−Ｙ２方向の２層に配線を作製し
た。すなわち図１は本発明の実施例１のモデル素子の構
造を示す斜視図であり、符号１はＹ方向配線（上部電極
に相当）、２はＸ方向配線（下部電極に相当）、３は中
間絶縁層、４は基板、５はリード線、６はクロス・ポイ
ントを意味する。中間絶縁層として、ＳｉＯ2 層があ
り、導線間を分離している。Ｘ−Ｙの配線のクロス・ポ
イントにはホールがあり、ホール内には抵抗可変結線材
料（Ｓｂ2 Ｔｅ3 ）50（ＧｅＴｅ）50の薄膜を配した。
クロス・ポイント付近の断面図は図２のようになる。す
なわち、図２は図１におけるクロス・ポイントの断面を
示した図であり、符号１〜４は図１と同義、７は抵抗可
変結線材料を意味する。このモデル素子について、クロ
ス・ポイントの導通と絶縁の試験を行った。Example 1 As shown in FIG. 1, wiring was formed in two layers in the X-Y2 direction. That is, FIG. 1 is a perspective view showing the structure of a model element of Example 1 of the present invention, where reference numeral 1 is a Y-direction wiring (corresponding to an upper electrode), 2 is an X-direction wiring (corresponding to a lower electrode), and 3 is an intermediate Insulating layer, 4 means substrate, 5 means lead wire, and 6 means cross point. As an intermediate insulating layer, there is a SiO 2 layer, which separates the conducting wires. There is a hole at the cross point of the X-Y wiring, and a thin film of variable resistance connection material (Sb 2 Te 3 ) 50 (GeTe) 50 was arranged in the hole.
A cross-sectional view near the cross point is shown in FIG. That is, FIG. 2 is a view showing a cross section of the cross point in FIG. 1, reference numerals 1 to 4 are synonymous with FIG. 1, and 7 is a resistance variable connection material. This model device was tested for cross point continuity and insulation.
【００１０】まず、２配線間にパルス電圧を印加し、高
電圧、短パルスの印加で結晶→非晶質、すなわち、導通
→絶縁に変化し、低電圧、長パルスの印加で、非晶質→
結晶、すなわち、絶縁→導通に変化することを確認し
た。このサイクルの繰返し実験を試みたところ、１０6
回以上のサイクルにわたり、安定に可逆的に動作するこ
とがわかった。導通状態、絶縁状態の室温付近での保存
性についても、何ら問題は生じなかった。メモリーの読
み出しの１／１０以下の電流で行った。この読み出し動
作による劣化はなかった。First, when a pulse voltage is applied between two wirings, a high voltage and a short pulse are applied to change from crystalline to amorphous, that is, conduction to insulation, and when a low voltage and a long pulse are applied, amorphous. →
It was confirmed that the state of the crystal changed from insulation to conduction. When a repeated experiment of this cycle was tried, 10 6
It was found to operate stably and reversibly over more than one cycle. There was no problem with regard to the storability near the room temperature in the conductive state and the insulating state. It was performed at a current of 1/10 or less of the reading of the memory. There was no deterioration due to this read operation.
【００１１】実施例２ 実施例１と同様のモデル素子を作製し、同様の実験を行
った。ただし、非晶質→結晶、すなわち、絶縁→導通の
変化に際しては、ここでは、ヒーター加熱により約１４
０℃、１分の加熱により変化させた。したがって、各個
の結線の１つ１つについて、変化させるのではなく、一
括して、全結線部を導通状態にすることができた。いわ
ゆるエレイザブル・プログラマブルＲＯＭの動作を本モ
デル素子で実現できたわけである。再書き込み、再消去
のサイクルの安定性についても全く問題ないことがわか
った。Example 2 A model device similar to that of Example 1 was prepared and the same experiment was conducted. However, when changing from amorphous to crystalline, that is, from insulation to electrical continuity, here, about 14
It was changed by heating at 0 ° C. for 1 minute. Therefore, it was possible to bring all the connection parts into a conductive state collectively without changing each connection. The operation of a so-called erasable programmable ROM could be realized by this model element. It was also found that there was no problem in the stability of the rewriting / erasing cycle.
【００１２】実施例３ 実施例１と同様のモデル素子を作製し、同様の実験を行
った。ただし、Ｙ方向の配線（上部電極に相当）材料と
して透明導通膜を用いて、クロス・ポイントの結線材料
に光を照射できるようにした。すなわち、各クロス・ポ
イントにレーザ・ビームを照射し、光加熱により結線材
料の抵抗可変材料に状態変化を起こさせた。高パワー、
短パルスの照射で結晶→非晶質、低パワー、長パルスの
照射で非晶質→結晶のサイクリックな繰返しが可能であ
り、それに伴って照射部のクロス・ポイントが“導通”
→“絶縁”と可逆的に変化することを確認した。Example 3 A model device similar to that of Example 1 was prepared and the same experiment was conducted. However, a transparent conductive film was used as the material of the wiring (corresponding to the upper electrode) in the Y direction so that the connection material at the cross points could be irradiated with light. That is, each cross point was irradiated with a laser beam, and a state change was caused in the resistance variable material of the connection material by light heating. High power,
It is possible to cyclically repeat from crystalline to amorphous by short-pulse irradiation and low power, and from amorphous to crystalline by long-pulse irradiation, and the cross point of the irradiated part is "conducting" accordingly.
→ It was confirmed that it changed reversibly to "insulation".
【００１３】実施例４ 実施例１〜３において、抵抗可変材料の組成を（Ｓｂ2
Ｔｅ3 ）50（ＩｎＴｅ）50に変えて、同様のモデル素子
を作り、同様の実験を行った。効果としては実施例１〜
３とほぼ同様であった。Example 4 In Examples 1 to 3, the composition of the variable resistance material was set to (Sb 2
Te 3 ) 50 (InTe) 50 was replaced with the same model device, and the same experiment was conducted. The effect is as in Example 1
It was almost the same as 3.
【００１４】実施例５ 実施例１〜４のモデル素子をＲＯＭメモリーに適用して
“０”、“１”の２信号を各クロス・ポイントに記録
し、再生の実験を行った。また、メモリーの消去、再書
き込みの検討も行った。その結果、本メモリー素子は、
エレーザブル・プログラマブルＲＯＭメモリーとして問
題なく正常に機能することを確認できた。Example 5 The model elements of Examples 1 to 4 were applied to a ROM memory to record two signals "0" and "1" at each cross point, and a reproduction experiment was conducted. We also examined the erasing and rewriting of the memory. As a result, this memory device
It has been confirmed that it functions normally as an erasable programmable ROM memory without any problems.
【００１５】実施例６ 実施例１〜４のモデル素子をＭＤＦに適用して各クロス
・ポイントの絶縁・導通状態に基づく結線の接続機能を
チェックした。その結果、このモデル素子はＭＤＦとし
て正常に機能し、かつ既存のＭＤＦに比べて高速、簡便
に動作させ得ることがわかった。Example 6 The model elements of Examples 1 to 4 were applied to an MDF to check the connection function of connection based on the insulation / conduction state of each cross point. As a result, it was found that this model element functions normally as an MDF and can be operated at high speed and easily as compared with the existing MDF.
【００１６】実施例７ 実施例１〜４の（Ｓｂ2 Ｔｅ3 ）50（ＩｎＴｅ）50及び
（Ｓｂ2 Ｔｅ3 ）50（ＧｅＴｅ）50の組成比を変え、
（Ｓｂ2 Ｔｅ3 ）1-x （ＧｅＴｅ）x 、又は（Ｓｂ2 Ｔ
ｅ3 ）1-x （ＩｎＴｅ）x （０≦ｘ≦１）の組成で各実
験を行った。その結果、いずれの組成においても、素子
の動作は問題なく正常に機能することがわかった。Example 7 The composition ratios of (Sb 2 Te 3 ) 50 (InTe) 50 and (Sb 2 Te 3 ) 50 (GeTe) 50 of Examples 1 to 4 were changed,
(Sb 2 Te 3 ) 1-x (GeTe) x , or (Sb 2 T
Each experiment was conducted with a composition of e 3 ) 1-x (InTe) x (0 ≦ x ≦ 1). As a result, it was found that the operation of the device worked normally with any composition.
【００１７】[0017]
【発明の効果】以上説明したように、本発明の抵抗可変
結線材料はパルス光照射、パルス電圧印加、又は加熱に
より電気抵抗が大幅に変化することから電子素子、記憶
素子、ＭＤＦ等の素子の結線材料として用いた場合、極
めて高性能の素子を実現することができる。素子の高速
化、高密度、大容量化に対する要請が強まる昨今の状況
からみて、本発明の電気通信業界や電子工業に与えるイ
ンパクトは極めて大きく、技術的ブレークスルーとみな
せるものである。また本発明の材料によれば、素子構造
は一般に簡便であり、製造歩留りの向上も期待され、コ
スト的にも有利である。As described above, the resistance variable wiring material of the present invention has a large change in electric resistance due to pulsed light irradiation, pulse voltage application, or heating, so that it can be used in devices such as electronic devices, memory devices, and MDF. When used as a wiring material, an extremely high-performance element can be realized. In view of the recent demand for higher speed, higher density, and higher capacity of devices, the impact of the present invention on the telecommunications industry and electronics industry is extremely large, and can be regarded as a technological breakthrough. Further, according to the material of the present invention, the device structure is generally simple, the manufacturing yield is expected to be improved, and the cost is advantageous.
【図１】本発明の実施例１のモデル素子の構造を示す斜
視図である。FIG. 1 is a perspective view showing a structure of a model device according to a first embodiment of the present invention.
【図２】図１におけるクロス・ポイントの断面を示す図
である。FIG. 2 is a diagram showing a cross section of a cross point in FIG.
１：Ｙ方向配線（上部電極に相当）、２：Ｘ方向配線
（下部電極に相当）、３：中間絶縁層、４：基板、５：
リード線、６：クロス・ポイント、７：抵抗可変結線材
料1: Y-direction wiring (corresponding to the upper electrode), 2: X-direction wiring (corresponding to the lower electrode), 3: intermediate insulating layer, 4: substrate, 5:
Lead wire, 6: Cross point, 7: Variable resistance wire connection material
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 ＦＩ 技術表示箇所 // Ｈ０１Ｂ 1/02 Ｚ 7244−5Ｇ Ｈ０１Ｌ 35/16 8832−4Ｍ (72)発明者 畠山 巌 東京都千代田区内幸町１丁目１番６号 日 本電信電話株式会社内─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. 5 Identification code Internal reference number FI Technical display location // H01B 1/02 Z 7244-5G H01L 35/16 8832-4M (72) Inventor Iwahatayama Tokyo 1-1-6 Uchisaiwaicho, Chiyoda-ku, Nihon Telegraph and Telephone Corporation
Claims (2)
ら選択した元素のうち少なくとも２種以上の元素を含
み、光照射、電圧印加あるいは加熱によって電気抵抗が
変化するものであることを特徴とする素子間結線材料。1. A material containing at least two kinds of elements selected from the group consisting of Ge, Te, Sb and In, and having an electric resistance which is changed by light irradiation, voltage application or heating. Inter-element wiring material to be used.
電気抵抗が変化する材料で複数の素子間を電気的に接続
し、光照射、電圧印加あるいは加熱によって、該素子へ
の入出力を制御することを特徴とする入出力制御方法。2. A method of electrically connecting a plurality of elements with a material whose electric resistance changes by light irradiation, voltage application or heating, and controlling input / output to the element by light irradiation, voltage application or heating. Input / output control method characterized by.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5032508A JPH06232271A (en) | 1993-01-29 | 1993-01-29 | Connection material and input/output control method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5032508A JPH06232271A (en) | 1993-01-29 | 1993-01-29 | Connection material and input/output control method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06232271A true JPH06232271A (en) | 1994-08-19 |
Family
ID=12360933
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5032508A Pending JPH06232271A (en) | 1993-01-29 | 1993-01-29 | Connection material and input/output control method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06232271A (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005012183A (en) * | 2003-06-18 | 2005-01-13 | Macronix Internatl Co Ltd | Method of adjusting threshold voltage of memory cell |
| JP2005317955A (en) * | 2004-04-02 | 2005-11-10 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
| WO2006043611A1 (en) * | 2004-10-22 | 2006-04-27 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| JP2006135251A (en) * | 2004-11-09 | 2006-05-25 | Hitachi Ltd | Laser crystallization equipment |
| JP2007180406A (en) * | 2005-12-28 | 2007-07-12 | Toshiba Corp | Non-volatile switching element, its manufacturing method and integrated circuit having the same |
| JP2009065184A (en) * | 2006-03-30 | 2009-03-26 | Panasonic Corp | Nonvolatile memory device and method for manufacturing same |
| JPWO2007058175A1 (en) * | 2005-11-21 | 2009-04-30 | 株式会社ルネサステクノロジ | Semiconductor device |
| US7858972B2 (en) | 2006-04-28 | 2010-12-28 | Semiconductor Energy Laboratory Co., Ltd. | Memory device and semiconductor device |
| JP2011103491A (en) * | 2004-04-02 | 2011-05-26 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
-
1993
- 1993-01-29 JP JP5032508A patent/JPH06232271A/en active Pending
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005012183A (en) * | 2003-06-18 | 2005-01-13 | Macronix Internatl Co Ltd | Method of adjusting threshold voltage of memory cell |
| JP2005317955A (en) * | 2004-04-02 | 2005-11-10 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
| US8045369B2 (en) | 2004-04-02 | 2011-10-25 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and driving method of the same |
| JP2011103491A (en) * | 2004-04-02 | 2011-05-26 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
| US7781758B2 (en) | 2004-10-22 | 2010-08-24 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| WO2006043611A1 (en) * | 2004-10-22 | 2006-04-27 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| US8227802B2 (en) | 2004-10-22 | 2012-07-24 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| JP2006135251A (en) * | 2004-11-09 | 2006-05-25 | Hitachi Ltd | Laser crystallization equipment |
| JPWO2007058175A1 (en) * | 2005-11-21 | 2009-04-30 | 株式会社ルネサステクノロジ | Semiconductor device |
| JP2007180406A (en) * | 2005-12-28 | 2007-07-12 | Toshiba Corp | Non-volatile switching element, its manufacturing method and integrated circuit having the same |
| JP2009065184A (en) * | 2006-03-30 | 2009-03-26 | Panasonic Corp | Nonvolatile memory device and method for manufacturing same |
| US8227786B2 (en) | 2006-03-30 | 2012-07-24 | Panasonic Corporation | Nonvolatile memory element |
| US7858972B2 (en) | 2006-04-28 | 2010-12-28 | Semiconductor Energy Laboratory Co., Ltd. | Memory device and semiconductor device |
| US8203142B2 (en) | 2006-04-28 | 2012-06-19 | Semiconductor Energy Laboratory Co., Ltd. | Memory device and semiconductor device |
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