JPH06231207A - Layout pattern verifying device - Google Patents

Abstract

PURPOSE:To constitute the device so that even a beginner can execute a design in which influence of a crosstalk is taken into consideration by color-coding and displaying a layout pattern corresponding to a signal line divided into an AC and a DC by a simulation means. CONSTITUTION:By a simulation means 5, circuit diagram data 1 is read in. Subsequently, based on the read-in circuit diagram data 1, net list data 6 for a simulation is extracted, and based on its net list data 6, a circuit simulation is executed. In this regard, an analytic condition of its simulation executes a time analysis. Next, the quality of its simulation result 7 is decided. Also, the simulation means 5 divides each signal line on a circuit diagram into that which an AC signal passes through and that which a DC signal passes through by using the net list data 6, the simulation result 7, and a coordinate data file of the circuit diagram, and allows them to be subjected to color coding. Thereafter, pattern data 9 subjected to color coding is generated, and displayed on a display 4.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a layout pattern verification device for verifying a layout pattern of a semiconductor integrated circuit or the like by inputting a design rule required when creating a layout pattern.

[0002]

2. Description of the Related Art FIG. 15 is a block diagram showing a conventional layout pattern verification device. In the figure, 1 is circuit diagram data showing a circuit of a semiconductor integrated circuit whose layout pattern is verified, and 2 is its layout pattern data. 3 is a layout as a verification means for verifying that the circuit in the circuit diagram data 1 and the layout pattern in the layout pattern data 2 have the same connection.
Versus Schematic (Layout Versus Scheme)
atic; hereinafter referred to as LVS), means 4 is L
It is a display on which the execution result of the VS execution means 3 is displayed.

Next, the operation will be described. The LVS execution means 3 compares the circuit read from the circuit diagram data 1 with the layout pattern read from the layout pattern data 2 to verify whether or not the connection between them is the same.
The verification result is displayed on the display 4.

[0004]

Since the conventional layout pattern verification device is configured as described above, the connection of the circuit read from the circuit diagram data 1 and the layout pattern read from the layout pattern data 2 is the same. Although it can be easily verified, the phenomenon that an AC signal passes between layout patterns on a layout pattern, for example, an AC signal shifts to a DC signal and an AC signal passes through a layout pattern where only the DC signal should pass (hereinafter referred to as this There is a problem that a worker who is performing layout pattern verification has to find out while tracing the layout pattern in a portion that may be affected by such a phenomenon.

The present invention has been made to solve the above problems, and provides a layout pattern verifying apparatus capable of designing a layout pattern in consideration of the influence of crosstalk even for a beginner. The purpose is to get.

[0006]

According to a first aspect of the present invention, there is provided a layout pattern verifying device which performs circuit simulation on read circuit diagram data based on netlist data to classify signal lines into AC and DC. The simulation means and the color-coding means for color-coding the layout pattern on the layout pattern data whose connection with the signal line on the circuit diagram data is verified by AC / DC divided by the simulation means are provided. is there.

The layout pattern verifying apparatus according to the present invention is a base connection pattern searching means for searching a layout pattern connected to the bases of a predetermined number or more of transistors and color-coding it into different colors. Further, a large current pattern search means for searching a layout pattern in which an alternating current of a predetermined value or more flows and color-coding it into different colors is further provided.

The layout pattern verification apparatus according to the third aspect of the present invention is a parallel pattern search apparatus for searching a portion where a layout pattern in which an AC signal flows and a layout pattern in which a DC signal flows are arranged in parallel or intersect. It also has an intersection search means.

[0009]

The color coding means in the invention described in claim 1 is
The layout pattern corresponding to the signal line divided into alternating current and direct current by the simulation means is displayed in different colors so that even beginners can design the layout pattern considering the influence of crosstalk. A layout pattern verification device capable of performing

Further, the base connection pattern searching means in the invention according to claim 2 searches for the layout pattern connected to the bases of a predetermined number or more of transistors and displays them in different colors for display. In addition, the large current pattern search means searches for a layout pattern in which an alternating current larger than a predetermined value is flowing and displays it in different colors so that even a beginner can consider the influence of crosstalk or the like. A layout pattern verification device capable of designing a pattern is realized.

Further, the parallel / crossing search means in the invention according to claim 3 searches for a portion in which a layout pattern in which an AC signal flows and a layout pattern in which a DC signal flows are arranged in parallel or intersects with each other, By emphasizing the display of a part by blinking or the like, a layout pattern verification device that enables even a beginner to design a layout pattern in consideration of the influence of crosstalk or the like is realized.

[0012]

【Example】

Example 1. Embodiment 1 of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the invention described in claim 1. In the figure, 1 is circuit diagram data, 2
Is layout pattern data, 3 is L as a verification means
The VS executing means 4 is a display, which is the same as or equivalent to those of the related art denoted by the same reference numerals in FIG. 15, and therefore detailed description thereof will be omitted.

Reference numeral 5 is a simulation means for reading the circuit diagram data 1 and executing a circuit simulation of the circuit diagram data 1 based on the netlist data to divide the signal line into AC and DC. The netlist data, 7 is the simulation result by the simulation means 5. Reference numeral 8 color-codes the layout pattern on the layout pattern data 2, which has been verified by the verification means 3 to have the same connection as the signal line on the circuit diagram data 1, by AC / DC divided by the simulation means 5. Reference numeral 9 is a color classification means, and layout pattern data 9 is color-coded by the color classification means 8.

Here, the circuit diagram data 1 is shown in FIG.
It is assumed that the data of the circuit shown in the circuit diagram is stored, and the layout pattern data 2 stores the data of the layout pattern shown in the explanatory diagram of FIG.

Next, the operation will be described. Here, FIG.
Is a flowchart showing the flow of the process. First,
The circuit means 1 is read by the simulation means 5 (step ST1). Next, the netlist data 6 for simulation shown in FIG. 5 is extracted based on the read circuit diagram data 1 (step ST2), and the circuit simulation is executed based on the netlist data 6 (step ST3). . The analysis condition of the simulation is time analysis (hereinafter referred to as TR analysis). Next, the quality of the simulation result 7 is judged (step ST4). If the simulation result 7 is not correct, the circuit diagram data 1 is corrected and the step ST4 is executed again.
Start over from 1.

On the other hand, if the simulation result 7 is correct, a node number (node number) having a voltage / current that changes with time is searched for from the result of the TR analysis shown in FIG. 6 (step ST5). In the example of FIG. 6, V (5), I
(5) changes with time, and V (6) and I (6) do not change with time. V changing with time
The node number "5" of (5) and I (5) is the collector of the transistor Q7, and V which does not change with time.
It can be seen from the contents of the netlist data 6 shown in FIG. 5 that the node number "6" of (6) and I (6) is the collector of the transistor Q5. In the simulation means 5, since an AC signal passes through the signal line L5 connected to the collector of the transistor Q7, from the coordinate data file of the circuit diagram shown in FIG. 2 and the circuit diagram shown in FIG.
The signal line L5 is color-coded, for example, red (RED).

As described above, the simulation means 5 is
The netlist data 6 for simulation shown in FIG. 5, the simulation result 7 shown in FIG. 6, and FIG.
By using the coordinate data file of the circuit diagram shown in, the signal lines on the circuit diagram are divided into those through which an AC signal passes and those through which a DC signal passes, and the signal line through which an AC signal passes is red (RED).
In addition, the signal lines with constant voltage and current through which no AC signal passes are color-coded in white (WHITE) (step ST
6).

Next, the circuit diagram data color-coded as shown in FIG. 2 and the layout pattern data shown in FIG.
It is read by the execution means 3 and the identity of the connection between them is verified (step ST7). If the connection identity is confirmed by the verification by the LVS executing means 3, if the signal line is red, the corresponding layout pattern is colored red, and if it is white, the layout pattern is color-coded. The data 9 is created (step ST8) and displayed on the display 4.
FIG. 8 shows connection information extracted from layout pattern data during LVS execution. Based on this connection information, each layout pattern is color-coded similarly to each signal line in the circuit diagram. By displaying the layout patterns through which the AC signal and the DC signal pass in mutually different colors in this manner, it becomes easy for a beginner of layout pattern design to discover a portion that may be affected by crosstalk or the like.

Example 2. Next, a second embodiment of the present invention will be described with reference to the drawings. FIG. 9 is a block diagram showing an embodiment of the invention described in claim 2. In the figure, 6 is the netlist data extracted in the first embodiment, and 7 is the first embodiment.
In the simulation result of the circuit simulation executed in, 9 is layout pattern data which is color-coded in the first embodiment, and 4 is a display.

Reference numeral 10 is a base connection pattern retrieval means for retrieving a layout pattern connected to the bases of a plurality of transistors from the color-coded layout pattern data 9 and further color-coding it into another color. Reference numeral 11 is a large current pattern for searching a layout pattern in which an AC signal of the color-coded layout pattern data 9 flows and having an AC current of a predetermined value or more, for example, several hundred microamperes or more, and color-coding it into another color. It is a search means. Reference numeral 12 is layout pattern data which is further color-coded by the base connection pattern search means 10 and the large current pattern search means 11.

Next, the operation will be described. Here, FIG.
Reference numeral 0 is a flow chart showing the flow of the processing. First, the base connection pattern search means 10 uses the same node number from the simulation netlist data 6 and
The node number connected to the base of the transistor is searched (step ST11). Then, the number of transistors satisfying this condition is counted (step ST12), and it is determined whether or not there is a predetermined number, for example, 10 or more. As a result, when there are 10 or more, the correspondence between the transistors on the netlist data 6 and the transistors on the layout pattern data 9 is LVS in the first embodiment.
Since it has already been obtained when executing, the layout pattern connected to the node number of the searched transistor base on the layout pattern data 9 is:
The color is changed from white (WHITE) to green (GREEN) (step ST14).

Next, the large current pattern searching means 11 searches the simulation result 7 for the node number indicating the AC signal, and among them, the current value is about 100 which is relatively large.
A node number that flows more than a microampere is searched (step ST15). Then, it is identified whether or not the corresponding node number has been retrieved (step ST16). If the node number can be retrieved, layout pattern data 9 such as a transistor or a resistor connected to the node from the netlist data 6 is identified.
The corresponding element above and the layout pattern connected thereto are searched (step ST17). If it is possible to search, red (RED), which indicates that an AC signal is already flowing, is converted to yellow (YELLOW), and further color-coded layout pattern data 12 is created (step ST18), and is also displayed. Display on top of 4. FIG. 11 shows the contents of the color-separated layout pattern data 12. The layout pattern connected to the bases of a large number of transistors and the layout pattern through which an AC signal having a relatively large current value passes are further shown in FIG. By displaying in different colors, it becomes easier to find a portion that may be affected by crosstalk or the like.

Example 3. Next, a third embodiment of the present invention will be described with reference to the drawings. FIG. 12 is a block diagram showing an embodiment of the invention described in claim 3, in which 12 is layout pattern data further color-coded in Embodiment 2 and 4 is a display. Reference numeral 13 is a parallel / crossing search means for searching, in the layout pattern data 12, a portion in which a layout pattern in which an alternating current signal flows and a layout pattern in which a direct current signal flows is arranged in parallel, or a portion where they intersect. , 14 are coordinate data indicating the positions of the parallel portions or the intersection portions searched by the parallel / crossing retrieval means 13.

Next, the operation will be described. Here, FIG.
3 is a flowchart showing the flow of the processing. The parallel / crossing search means 13 first reads the layout pattern data 12 which is further color-coded in the second embodiment.
The color-separated layout pattern data 12 contains element / wiring names, their coordinate data, and color names, as shown in FIG. From the layout pattern data 12, the parallel / crossing search means 13 includes a position where the layout patterns of yellow (YELLOW) and green (GREEN) intersect, that is, the coordinates of the color of the other party are included in the coordinates between the two points. The location is searched (step ST21). Next, those yellow (YELLOW) and green (GREEN)
The coordinates of the layout pattern are searched for where they are arranged in parallel with each other, that is, where the X coordinate data or the Y coordinate data is the same (step ST).
22). Coordinate data 14 is created for the portion searched in this way, and the coordinate portion indicated by the coordinate data 14 is highlighted in blue on the layout pattern of the display 4 (ST23).

As described above, the portion where the layout pattern in which the AC signal flows and the layout pattern in which the DC signal flows are arranged in parallel and the portion where these intersect are further displayed in different colors by blinking, thus giving attention to the operator. To make it easier to discover areas that are likely to be affected by crosstalk.

[0026]

As described above, according to the first aspect of the invention, the layout pattern corresponding to the signal line divided into AC and DC according to the result of the circuit simulation is color-coded into different colors. Since it is configured, it is possible to display at a glance the layout pattern through which the AC signal and the DC signal pass, and it is possible to obtain a layout pattern verification device that enables beginners to design layout patterns that take into consideration the effects of crosstalk etc. There is.

According to the second aspect of the invention, a layout pattern connected to the bases of a predetermined number or more of transistors and a layout pattern in which an alternating current larger than a predetermined value flows are searched for, and each is searched. Since it is configured to be further divided into different colors, it is possible to clearly display the part where crosstalk is likely to occur, making it even more reliable for beginners to design layout patterns considering the effects of crosstalk. There is an effect that a layout pattern verification device that can be performed is obtained.

Further, according to the third aspect of the invention, since the layout pattern in which the AC signal flows and the layout pattern in which the DC signal flows are arranged to be arranged in parallel or intersect with each other, the search is made. If layout patterns that should not be placed in parallel or in parallel are placed in parallel or placed in parallel, it is possible to highlight them and give a warning, and divide the circuit design and layout pattern design. Even if a beginner is in charge of designing the layout pattern, there is an effect that a layout pattern verification device capable of designing the layout pattern without the influence of crosstalk can be obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing an example of a circuit of circuit diagram data in the above embodiment.

FIG. 3 is an explanatory diagram showing an example of a layout pattern of layout pattern data in the above embodiment.

FIG. 4 is a flowchart showing a flow of processing of the above embodiment.

FIG. 5 is an explanatory diagram showing the contents of netlist data in the above embodiment.

FIG. 6 is an explanatory diagram showing a simulation result in the above embodiment.

FIG. 7 is an explanatory diagram showing a coordinate data file of a circuit diagram in the above embodiment.

FIG. 8 is an explanatory diagram showing connection information extracted from layout pattern data during LVS execution in the above embodiment.

FIG. 9 is a block diagram showing a second embodiment of the present invention.

FIG. 10 is a flowchart showing the flow of processing of the above embodiment.

FIG. 11 is an explanatory diagram showing the contents of layout pattern data generated in the above embodiment.

FIG. 12 is a block diagram showing a third embodiment of the present invention.

FIG. 13 is a flowchart showing the flow of processing of the above embodiment.

FIG. 14 is an explanatory diagram showing the contents of coordinate data generated in the above embodiment.

FIG. 15 is a block diagram showing a conventional layout pattern verification device.

[Explanation of symbols]

 1 Circuit Diagram Data 2, 9, 12 Layout Pattern Data 3 Verification Means (LVS Execution Means) 5 Simulation Means 6 Netlist Data 8 Color Code Means 10 Base Connection Pattern Search Means 11 Large Current Pattern Search Means 13 Parallel / Cross Search Means

Claims (3)

[Claims] 1. A simulation means for reading circuit diagram data, executing a circuit simulation of the circuit diagram data based on netlist data, and dividing a signal line into alternating current and direct current; the circuit diagram data and a layout pattern. Verification means for reading the data and verifying whether the connection of the circuit diagram and the layout pattern is the same, and the verification means verified that the connection is the same as the signal line on the circuit diagram data. A layout pattern verification device, comprising: a color classification unit that colors the layout pattern on the layout pattern data by AC / DC divided by the simulation unit. 2. A base connection for searching a layout pattern connected to the bases of a predetermined number or more of transistors from the layout pattern data color-coded by the color-coding means and color-coding the layout pattern into another color. A pattern search means and a large current pattern search for searching a layout pattern in which a current of a predetermined value or more is flowing from the layout pattern in which the alternating current signal flows in the color-coded layout pattern data and further classifying the layout pattern into another color. The layout pattern verification apparatus according to claim 1, further comprising: 3. A parallel / crossing search means for searching, in the color-coded layout pattern data, a portion in which a layout pattern in which an alternating current signal flows and a layout pattern in which a direct current signal flows is arranged in parallel, or a crossing portion. The layout pattern verification apparatus according to claim 1, further comprising: