JPH06230742A - Driving circuit for lcd - Google Patents

Abstract

PURPOSE:To drive an LCD without using a dedicated driver. CONSTITUTION:A CPU 11, a ROM 12, a RAM 13, and output ports 15 are made into one-chip IC. At least a part of ports 150, 151...15N of the output ports 15 is provided with a latch function. The output ports 150, 151...15N are connected to the common electrode 21 and the segment electrodes 22T-22N of the LCD 20. respectively. The output port 150 is set/reset by the CPU 11 at a prescribed period. The output port out of the output ports 151-15N connected to the segment electrode of a segment to be put off out of the segment electrodes 221-22N is set/reset at in-phase with that of the output port 150 by the CPU 11. The output port out of the output ports 151-15N connected to the segment electrode of a segment to be put on out of the segment electrodes 221-22N is set/reset at opposite phase with that of the output port 150 by the CPU 11.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an LCD (liquid crystal display device) drive circuit.

[0002]

2. Description of the Related Art In a headphone stereo, a synthesizer type receiver, etc., a one-chip IC microcomputer is provided for system control.
This microcomputer executes processing corresponding to the user's key operation. And in that case, the LCD
When the operating mode is displayed by, the L
A CD drive circuit is used to display the desired characters, numbers, symbols, etc.

FIG. 3 shows an example of an LCD and a microcomputer having a built-in LCD drive circuit, where 10 is the microcomputer and 20 is the LCD. The microcomputer 10 is a one-chip IC as a whole, and in this microcomputer 10, 11 is a CPU and 12 is a program written R
OM, 13 is a work area RAM, 14 is a plurality of input ports, and 15 is a plurality of output ports. Although not shown, these circuits 11 to 15 are connected to each other through an internal bus, and the input port 14 is supplied with an output signal of an operation key, various detection signals, and the like from the outside, and the output port 15 Outputs a signal for controlling an external circuit or the like.

Further, in the microcomputer 10, the circuit 16
Numeral 18 is a circuit built in for driving the LCD 20, 16 is a common driver, 17 is a segment driver, and 18 is a bias generator. In this generator 18, a drive voltage for display according to the processing of the CPU 11 is formed. The drive voltage is supplied to the LCD 20 through the drivers 16 and 17.

In this example, the LCD 20
In the case where the operation mode such as the stop mode and the reproduction mode of the headphone stereo is displayed by symbol marks such as □ and Δ, the common electrode is common to all the segment electrodes. That is, L
In the CD 20, 21 is the common electrode, 221-2
Reference numeral 2N denotes N segment electrodes. The common driver 16 of the microcomputer 10 supplies the drive voltage VCMN to the common electrode 21, and the segment driver 1
The drive voltages VSEG1 to VSEGN are supplied from 7 to the segment electrodes 221 to 22N, respectively.

FIG. 4 shows drive voltages VCMN, VSEGi (i
= 1 to N), when an arbitrary segment K of the LCD 20 is turned on, as shown in FIG. 4A,
When the voltage difference between the drive voltages VCMN and VSEGK is increased to turn off the segment K, as shown in FIG. 4B,
The voltage difference between the drive voltages VCMN and VSEGK is reduced.
Further, FIG. 5 and FIG. 6 show other examples of the drive voltages VCMN and VSEGi, and in these examples as well, the drive voltage V
Similar to the example of FIG. 4, CMN and VSEGK have a large voltage difference when the segment K is turned on and a small voltage difference when the segment K is turned off.

Further, FIG. 7 shows that the display of the LCD 20 is performed in a time-divisional or intermittent manner, the period Td is a display period in which the light is turned on or off, and the period Tr is all turned off. It is a non-display period. 7A shows the case of Td: Tr = 1: 1, and FIG. 7B shows the case of Td: Tr = 1: 2.

[0008]

As described above, the LCD is
When displaying the operation mode of the headphone stereo with 20, the microcomputer 10 needs to have the drive circuits 16 to 18 of the LCD 20 built therein. Alternatively, when the microcomputer 10 does not include the drive circuits 16-18, the drive circuits 16-18 need to be externally attached.

As a result, the cost of the microcomputer 10 or the entire device increases and the size of the device increases. Further, as shown in FIG. 7, since the ratio of the display period Td and the non-display period Tr is 1: 1 to 1: 2, the LCD 20
When viewed from an angle, the display becomes faint and unclear.

The present invention is intended to solve the above problems.

[0011]

Therefore, in the present invention, when the reference numerals of the respective parts correspond to the embodiments described later, the CPU 11, the ROM 12 in which the program executed by the CPU 11 is written, and the work of the CPU 11 are provided. The area RAM 13 and the plurality of output ports 15 controlled by the CPU 11 are integrated into a single-chip IC, and at least a part 150, 151 to 15N of the output port 15 has a latch function, and the output port 15 having the latch function.
0, 151 to 15N are connected to the common electrode 21 and the segment electrodes 221 to 22N of the LCD 20, and output ports 150 and 15 having a latch function.
Of the 1 to 15 N, the output port 150 connected to the common electrode 21 is set by the CPU 11 at a predetermined cycle.
Output ports 151 to 1 having a reset and latch function
5N, of the segment electrodes 221 to 22N,
The CPU 11 sets / resets the output port connected to the segment electrode of the segment to be extinguished in the same phase as the output port 150 connected to the common electrode 21,
Of the segment electrodes 221 to 22N having the latch function, the output port connected to the segment electrode of the segment to be lighted among the segment electrodes 221 to 22N is referred to as the output port 150 connected to the common electrode 21 by the CPU 11. It is set and reset in reverse phase.

[0012]

The common electrodes 21 and the segment electrodes 221 to 22N of the LCD 20 are driven by the output voltages of the output ports 150 and 151 to 15N to perform display.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT Referring to FIG.
15 to 15 are provided, but drive circuits 16 to 18 are not provided.

At least a part of the output port 15 is provided with a latch function, and the port 15 having the latch function is controlled to control the drive voltages VCMN, VSEG1 to VS.
EGN is formed, and this drive voltage VCMN, VSEG1 to VSEGN
The common electrode 21 and the segment electrode 22 of the LCD 20
1 to 22N, respectively.

That is, when the port having a latching function among the output ports 15 is the port 150, the port 150 is connected to the common electrode 21 of the LCD 20. Then, by the CPU 11, as shown in FIG.
Time point tn (n is an integer) for each (for example, τ = 1/200 seconds)
And an instruction to set the output of the port 150 to "1",
The instruction to reset to "0" is executed alternately.

When other ports having a latch function among the output ports 15 are ports 151 to 15N,
These ports 151 to 15N are connected to the segment electrodes 221 to 22N of the LCD 20, respectively. In the following description, for simplification, it is assumed that the segment corresponding to the segment electrode 221 of the LCD 20 is turned off and the segment corresponding to the segment electrode 222 is turned on.

Then, the CPU 11 executes the port output instruction and, as shown in FIG.
An instruction to set the outputs of the ports 151 to 15N to "1" or reset to "0" is executed for each n.

However, in this case, the port 151 connected to the segment electrode 221 for extinguishing the segment
As shown in FIG. 2B, the segment electrode 2 that is set or reset in the same phase as in FIG.
The port 152 connected to 22 is set or reset in the opposite phase to that of FIG. 2A, as shown in FIG. 2C. That is, among the ports 151 to 15N, the port connected to the segment of the LCD 20 to be extinguished is shown in FIG. 2B.
2A, the port is set or reset in the same phase as that of FIG. 2A, and the port connected to the segment to be lighted of the LCD 20 is set or reset in the opposite phase of FIG. 2A as shown in FIG. 2C.

Since the ports 150 and 151 to 15N can be set / reset by 1 bit respectively, the CPU
If 11 is a 4-bit process, ports 150, 1
It is possible to set or reset 51 to 15N in groups of four.

During the period excluding time tn, the CPU 1
1 executes the original processing, for example, processing such as headphone stereo operation. In addition, the above process or command is
It is executed according to the program in the ROM 12.

According to such a configuration, the port 150
Has a latch function and is set or reset at each time point tn.
As shown in FIG. 2D, a rectangular wave voltage having a duty ratio of 50% which is inverted at every time point tn is taken out, and this rectangular wave voltage is supplied to the common electrode 21 of the LCD 20 as its drive voltage VCMN.

As shown in FIG. 2B, the port 151 is set or reset in the same phase as in FIG. 2A, so that the port 151 has a rectangular wave voltage in phase with the drive voltage VCMN as shown in FIG. 2E. Is extracted, and this rectangular wave voltage is supplied to the segment electrode 221 as its drive voltage VSEG1. Therefore, the segment of the segment electrode 221 to which the segment voltage VSEG1 is supplied is turned off.

However, as shown in FIG. 2C, the port 152 is set or reset in a phase opposite to that of FIG.
A rectangular wave voltage of opposite phase to the drive voltage VCMN is taken out,
This rectangular wave voltage is supplied to the segment electrode 222 as its drive voltage VSEG2. Therefore, the segment of the segment electrode 222 to which the segment voltage VSEG2 is supplied is turned on.

That is, of the ports 151 to 15N,
The port connected to the segment to be turned off of the LCD 20 is set or reset in the same phase as in FIG. 2A, as shown in FIG. 2B, so that the port in the same phase as the drive voltage VCMN as shown in FIG. The drive voltage VSEG is output. Then, since the drive voltage VSEG is supplied to the segment electrode of the LCD 20, the segment corresponding to the segment electrode is turned off. Also,
The port connected to the segment to be turned on of the LCD 20 is set or reset in a phase opposite to that of FIG. 2A as shown in FIG. 2C, so that the port is opposite to the drive voltage VCMN as shown in FIG. 2F. The phase drive voltage VSEG is output. Then, since the drive voltage VSEG is supplied to the segment electrode of the LCD 20, the segment corresponding to the segment electrode is turned on.

[0025]

As described above, a predetermined display is displayed on the LCD 20 according to the output of the microcomputer 10.
In this case, according to the present invention, as is clear from FIG. 1, the microcomputer 10 does not need to include a common driver for driving the LCD 20, a segment driver, or a bias generator, or these circuits can be removed. The required display can be performed without the attachment. Therefore, the cost of the microcomputer 10 or the entire device can be reduced and the size can be reduced.

Further, the drive voltage VCM shown in FIGS.
Since the LCD 20 is driven by N and VSEG, the display period Td becomes 100%, and even when the LCD 20 is viewed obliquely, the display does not become thin and a clear display can be performed.

[Brief description of drawings]

FIG. 1 is a system diagram showing an example of the present invention.

FIG. 2 is a waveform diagram for explaining the present invention.

FIG. 3 is a system diagram for explaining a conventional example.

FIG. 4 is a waveform diagram for explaining the operation of the conventional example.

FIG. 5 is a waveform diagram for explaining the operation of the conventional example.

FIG. 6 is a waveform diagram for explaining the operation of the conventional example.

FIG. 7 is a waveform diagram for explaining a display state of a conventional example.

[Explanation of symbols]

 10 Microcomputer 11 CPU 12 ROM 13 RAM 14 Input Port 15 Output Port 20 LCD 21 Common Electrode 150 to 15N Output Port 221 to 22N Segment Electrode

Claims (2)

[Claims] 1. A CPU and a ROM in which a program executed by the CPU is written
And a RAM for the work area of the CPU and a plurality of output ports controlled by the CPU in one chip IC, at least a part of the output port has a latch function, and an output port having the latch function Each of the LC
Among the output ports having the latch function, which are connected to the common electrode and the segment electrode of D, the output port connected to the common electrode is set / reset at a predetermined cycle by the CPU to have the latch function. Of the segment electrodes, the output port connected to the segment electrode of the segment to be extinguished among the segment electrodes is set by the CPU in phase with the output port connected to the common electrode.
The output port which is reset and has the latch function, and which is connected to the segment electrode of the segment to be lighted among the segment electrodes is reverse to the output port connected to the common electrode by the CPU. Set in phase
LCD drive circuit designed to be reset. 2. The drive circuit according to claim 1, wherein the set and reset intervals are equal to each other.
CD drive circuit.