JPH06224255A - Semiconductor element packaging insulation film and packaging structure for carrier and semiconductor element - Google Patents

Abstract

PURPOSE:To provide a semiconductor element mounting insulation film, a carrier member and mounting structure of semiconductor elements capable of transferring high density wired-semiconductor elements easily, and what is more, capable of aligning with a wiring pattern on an outer board precisely. CONSTITUTION:Bumps 2 for a semiconductor element 1 are connected to a wiring pattern 5 on an insulation film 3 while the wiring pattern 5 has continuity with the other side by way of a conducting passage 4 in the insulation film 3. A bump 12 is formed on the ends of the conducting passage where the wiring pattern 5 is connected and mounted to a wiring pattern 15 on an outside board 6 by means of the bump 12. Preferably, cover coating layers 7 and 17 be formed on one side or both sides of the insulation film 3.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an insulating film for mounting a semiconductor element, a carrier using the same, and a mounting structure for the semiconductor element.

[0002]

2. Description of the Related Art In recent years, with the development of electronic equipment, devices and equipment that use a large amount of semiconductor devices have been required to be densely mounted with semiconductor elements on a substrate having a constant area due to the demand for smaller, thinner and lighter devices. . Therefore, the semiconductor element used does not have an electrode pad on the peripheral portion of the element as in the conventional case, but a so-called
Area chips are being developed. To mount such an area chip, usually, the metal pad of the semiconductor element and the wiring pattern on the external substrate are accurately aligned, and then they are heated or heated and pressurized to be soldered and fixed.

However, in the flip-chip connection, since the electrode pad surface of the semiconductor element and the wiring pattern forming surface on the external substrate are aligned and connected to each other, the connection is made except when a transparent substrate is used. In reality, the connection part cannot be observed. Further, generally, for such alignment, the external shape of the semiconductor element is used, or solder is used as a bump material on the semiconductor element, and the self-alignment of the semiconductor element is utilized by utilizing the surface tension of the solder that is heated and melted. However, in the former case, precise alignment technology is required, and in the latter case, precise solder bump formation technology is also required.

If the above-mentioned alignment is not surely performed when mounting the semiconductor element, a short circuit may occur between the electrodes of the semiconductor element or between the conductors on the external substrate, or the solder from the connecting portion along the conductor may be formed. Outflow and defective connection in the subsequent sealing process of the semiconductor element occur, which adversely affects the connection reliability. Further, in any of the above methods, a complicated device is required for alignment, which is by no means a simple method.

In order to solve such problems, an insulating film for mounting a semiconductor element having a through hole for mounting a bump on an electrode pad of a semiconductor element, a carrier using the same, and a mounting structure are provided. I have proposed it earlier.

However, even if a semiconductor element provided with high-density wiring is used, in this case, the pitch of the wiring pattern on the external substrate depends on the diameter of the bump on the electrode pad of the semiconductor element, and therefore the bump diameter is increased. If the connection reliability is to be improved by increasing the through hole diameter, the external substrate to be mounted also naturally becomes large, and there is a limit in reducing the size and weight of the entire semiconductor device.

[0007]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional mounting condition of semiconductor elements. When connecting and mounting high density wiring semiconductor elements to a wiring pattern on an external substrate, the alignment of the connecting portions is required. The purpose of the invention is to make it easy, to prevent short-circuiting, and to reduce the size and weight of the obtained semiconductor device.

[0008]

The inventors of the present invention have conducted extensive studies to achieve the above object, and as a result, when mounting the semiconductor element on a wiring pattern on an external substrate, the semiconductor element has a specific structure. It was found that the above object can be achieved by mounting the semiconductor element on an external substrate through the insulating film for mounting a semiconductor element, and the present invention has been completed.

That is, the present invention is an insulating film for mounting a semiconductor element for connecting an electrode pad of a semiconductor element to a wiring pattern on an external substrate, wherein one surface of the insulating film has bumps on the electrode pad of the semiconductor element. Has a wiring pattern for connecting to the other side of the insulating film by a conduction path that penetrates the insulating film, and the wiring path on the other side is connected to the wiring pattern on the external substrate Providing an insulating film for mounting a semiconductor element, which is characterized in that a bump for forming is formed, and providing a carrier for a semiconductor element formed by mounting and connecting a semiconductor element on the insulating film for mounting a semiconductor element, In addition, a mounting structure for a semiconductor element, which is formed by connecting the carrier to a wiring pattern on an external substrate, is provided.

[0010]

Embodiments of the present invention will be specifically described below with reference to the drawings.

FIG. 1 is a sectional view for explaining a process of carrying and mounting a semiconductor element using the insulating film for mounting a semiconductor element of the present invention, and FIG. 2 shows a semiconductor element mounted on an insulating film. FIG. 3 is a cross-sectional view of the mounting structure of the present invention showing a state where the carrier according to the present invention is connected to a wiring pattern on an external substrate.

In FIG. 1, electrode pads (not shown) of the semiconductor element 1 are made of a material such as solder, gold, silver, copper, etc., and bumps 2 preferably made of solder are provided with a height of 10-2.
The semiconductor element 1 is formed with a size of about 00 μm and a diameter (width) of about 10 to 500 μm. The semiconductor element 1 is connected to the insulating film 3 by the bump 2 and is made of glass, ceramic, various resins, semiconductor wafers, or the like. It is connected and fixed to the wiring pattern 15 on the substrate 6. The insulating film 3 for mounting the semiconductor element of the present invention is usually 5 to 100 μm.
The wiring pattern 5 has a certain thickness and is provided at a position facing the bump 2 as shown in FIG. In addition, the insulating film 3 has a wiring pattern 5 formed on one surface.
To the other surface side, a conductive path 4 is formed, and a bump 12 for connecting to a wiring pattern 15 on the external substrate 6 is formed at the end of the conductive path. Similar to the bumps 2, the bumps 12 are preferably solder bumps from the viewpoint of ease of melting at the time of mounting, and the size can be arbitrarily set according to the diameter of the conductive path, but the same size as the bumps 2 is adopted. To be done.

An external substrate 6 is provided on the insulating film 3.
In order to accurately perform the alignment to the above predetermined position (wiring pattern 15), the alignment mark 8 for alignment which is in a correlation position with the conductive path 4 (or the bump 12) is provided by a known means. , It can be placed and fixed securely while checking with a camera etc. at the time of alignment.
Further, the jig hole 9 may be provided for alignment by means such as punching.

As shown in FIG. 2, the carrier of the present invention comprises a semiconductor element 1 placed on an insulating film 3 and connected to the insulating film 3. The insulating film 3 is elongated and is composed of a plurality of semiconductor elements. Can be continuously conveyed and mounted. With such a long shape, semiconductor elements can be continuously supplied in the production process of the semiconductor device, and the production efficiency can be improved.

The carrier of the present invention is positioned on the wiring pattern 15 of the external substrate 6 and then heated or heated and pressed to securely connect the carrier as shown in FIG. After connection, unnecessary portions of the insulating film 3 other than the semiconductor element 1 mounting surface are cut and removed.

In the mounting structure of the present invention as shown in FIG. 2, the semiconductor element 1 connected to the wiring pattern 15 on the external substrate 6
Is mounted with the insulating film 3 interposed therebetween, a constant distance can be maintained between the semiconductor element 1 and the wiring pattern 5, and a short circuit does not occur.

Further, as shown in FIG. 3, a cover coat layer 7 made of a synthetic resin having an electric insulating property is formed on one side or both sides of the insulating film for mounting a semiconductor element of the present invention.
Forming (17) is preferable because the cover coat layer can surely insulate the surface of each wiring pattern and each bump. In addition, the cover coat layer acts as a wall material and is made of synthetic resin that is sparse to bump metal such as solder, so even if the bump metal heats and flows, it can prevent outflow. However, the electrical connection reliability becomes extremely high, and the pitch can be narrowed.

The insulating film 3 and the cover coat layer 7 (17) used in the present invention are not limited in their materials as long as they have electric insulation properties, and examples thereof include polyester resin, epoxy resin, urethane resin, polystyrene. Resin, polyethylene resin, polyamide resin,
Any thermosetting resin or thermoplastic resin such as polyimide resin, ABS resin, polycarbonate resin, silicone resin, or fluororesin can be used. Among these materials, it is preferable to use a polyimide resin from the viewpoint of heat resistance and mechanical strength.

The conductive path 4 formed in the insulating film 3 is important for mounting the semiconductor element 1 connected on the wiring pattern 5 on the wiring pattern 15 on the external substrate 6, and a metal is used as a through hole. It can be formed by filling the inside with plating. The shape of the conducting path 4 is not particularly limited, such as a columnar shape or a prismatic shape, but preferably a cylindrical shape is preferable when a through hole is formed and plated to form the conducting path. In this case, the diameter of the conducting path is 5 to 5. About 500 μm, preferably 10
It is about 300 μm. The metal in the conduction path is not particularly limited as long as it has electrical conductivity, and a single metal or various alloys can be used. In particular, metals such as gold, copper and solder can be preferably used in terms of conductivity and affinity with solder bumps. Further, the metal forming the conductive path is not limited to one kind, and two or more kinds of metals are stacked and filled in a columnar shape, or so-called through-hole plating is performed in multiple stages,
It can be formed by stacking and filling a plurality of metals on the wall surface in the through hole. By doing so, the impedance of the metal forming the conductive path can be matched, and migration with the insulating film can be reliably prevented.

The through holes formed in the insulating film 3 to form the conductive paths can be formed by mechanical processing, laser processing, optical processing, chemical etching, etc., and the processing accuracy and etching factor From the viewpoint of (small taper angle) and the like, laser processing by perforation processing or excimer laser irradiation using an ultraviolet laser is preferable.

[0021]

As described above, according to the present invention, after the bumps on the electrode pads of the semiconductor element are connected to the wiring pattern on the insulating film having the conductive path leading to the other surface in advance, the bumps previously formed on the insulating film are connected. Since it is connected and mounted with the wiring pattern on the external board by using, it is easy to transport and mount the semiconductor element with high-density wiring, and it is possible to easily align the position with the connection part, and it is small in size. It is suitable for weight reduction. Further, since the semiconductor element is mounted on the external substrate through the insulating film, the insulation between the semiconductor element and the wiring pattern and between the electrode pads is ensured, and the short circuit due to the outflow of the metal protrusion material is prevented,
Therefore, a mounting structure of a semiconductor element having extremely high connection reliability can be obtained. Such an effect can be further improved by forming a cover coat layer having sparseness against a metal such as solder on one side or both sides of the insulating film, and the pitch can be narrowed.

[Brief description of drawings]

FIG. 1 is a cross-sectional view for explaining a process of transporting and mounting a semiconductor element using the insulating film for mounting a semiconductor element of the present invention.

2 is a sectional view of a mounting structure of the present invention in which a semiconductor element is mounted on a wiring pattern on an external substrate using the insulating film shown in FIG.

FIG. 3 is a cross-sectional view showing a mounting structure using the insulating film for mounting a semiconductor element of the present invention in which cover coat layers are formed on both sides.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor element 2,12 Bump 3 Insulating film 4 Conductive path 5,15 Wiring pattern 6 External substrate 7,17 Cover coat layer

Claims (4)

[Claims] 1. An insulating film for mounting a semiconductor element for connecting an electrode pad of a semiconductor element to a wiring pattern on an external substrate, wherein bumps on the electrode pad of the semiconductor element are connected to one surface of the insulating film. For connecting the wiring pattern to the wiring pattern on the external substrate at the end of the conductive path on the other surface side by the conductive path penetrating the insulating film. An insulating film for mounting a semiconductor element, wherein bumps are formed. 2. A cover coat layer is formed on one side or both sides of an insulating film for mounting a semiconductor element.
An insulating film for mounting a semiconductor device as described above. 3. A carrier for a semiconductor element, comprising a semiconductor element mounted and connected to the insulating film for mounting a semiconductor element according to claim 1 or 2. 4. A mounting structure for a semiconductor element, comprising the carrier according to claim 3 connected to a wiring pattern on an external substrate.