JPH0621853A - Distribution line carrier reception method and its device - Google Patents

Distribution line carrier reception method and its device

Info

Publication number
JPH0621853A
JPH0621853A JP4173555A JP17355592A JPH0621853A JP H0621853 A JPH0621853 A JP H0621853A JP 4173555 A JP4173555 A JP 4173555A JP 17355592 A JP17355592 A JP 17355592A JP H0621853 A JPH0621853 A JP H0621853A
Authority
JP
Japan
Prior art keywords
circuit
output
value
distribution line
reference value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4173555A
Other languages
Japanese (ja)
Other versions
JP3280705B2 (en
Inventor
Shigeo Mitani
重雄 三谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP17355592A priority Critical patent/JP3280705B2/en
Publication of JPH0621853A publication Critical patent/JPH0621853A/en
Application granted granted Critical
Publication of JP3280705B2 publication Critical patent/JP3280705B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y04INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
    • Y04SSYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
    • Y04S40/00Systems for electrical power generation, transmission, distribution or end-user application management characterised by the use of communication or information technologies, or communication or information technology specific aspects supporting them
    • Y04S40/12Systems for electrical power generation, transmission, distribution or end-user application management characterised by the use of communication or information technologies, or communication or information technology specific aspects supporting them characterised by data transport means between the monitoring, controlling or managing units and monitored, controlled or operated electrical equipment
    • Y04S40/121Systems for electrical power generation, transmission, distribution or end-user application management characterised by the use of communication or information technologies, or communication or information technology specific aspects supporting them characterised by data transport means between the monitoring, controlling or managing units and monitored, controlled or operated electrical equipment using the power network as support for the transmission

Landscapes

  • Remote Monitoring And Control Of Power-Distribution Networks (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

PURPOSE:To provide the distribution line carrier reception method being able to detect stably a carrier without resetting of a threshold level against fluctuation of harmonic noise of a commercial frequency in a distribution system. CONSTITUTION:A 1st comparator circuit 11 compares the output of an integration circuit 4 with a 1st reference value to extract its minimum value and a 2nd reference value B2 is generated based on an output and a 2nd comparator circuit 6 compares the output of the integration circuit 4 with the 2nd reference value B2 to detect a carrier, then even when the harmonic level of a commercial frequency is fluctuated, the 2nd reference value B2 is automatically set again in following to the fluctuation, then mis-detection of the carrier is avoided and the carrier is stably detected.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は配電自動化システムにお
いて変電所の親局と各地の子局との通信に用いられる配
電線搬送受信方法とその装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a distribution line carrier receiving method and apparatus used for communication between a master station of a substation and slave stations of various places in a distribution automation system.

【0002】[0002]

【従来の技術】配電自動化システムの配電線搬送通信に
おいても、高速で信頼性の高い配電線搬送通信装置が要
求されている。以下、従来の方法に基づく配電線搬送受
信装置について図4を参照しながら説明する。
2. Description of the Related Art A high-speed and highly reliable distribution line carrier communication device is also required for distribution line carrier communication in a distribution automation system. A distribution line carrier receiving device based on the conventional method will be described below with reference to FIG.

【0003】図4において、各地の子局から変電所の親
局に搬送されたデジタル変調信号は変流器(以下、CT
と称す)1により検出され、その信号はバンドパスフィ
ルタ(以下、BPFと称す)2により高調波成分を除去
された信号波成分のみとなる。つぎにBPF2の出力は
自乗回路3により自乗され、さらに積分回路4によりタ
イマー5で設定された一定時間だけ積分され自乗和がと
られる。その後、比較回路6により自乗和とあらかじめ
設定されたしきい値とを比較し、自乗和がしきい値を越
えた場合にキャリアを検出する。
In FIG. 4, a digitally modulated signal carried from a child station in each region to a parent station in a substation is a current transformer (hereinafter referred to as CT).
1), and the signal becomes only the signal wave component from which the harmonic component is removed by the bandpass filter (hereinafter referred to as BPF) 2. Next, the output of the BPF 2 is squared by the squaring circuit 3 and further integrated by the integration circuit 4 for a fixed time set by the timer 5 to obtain the sum of squares. Thereafter, the comparison circuit 6 compares the sum of squares with a preset threshold value, and detects the carrier when the sum of squares exceeds the threshold value.

【0004】[0004]

【発明が解決しようとする課題】このように従来の方法
に基づく配電線搬送受信装置では、信号の自乗和と比較
するしきい値が設定値に固定されている。配電系統では
商用周波の高調波などのノイズの変動が多いため、その
高調波がしきい値の設定時より大きくなった場合、商用
周波の高調波がしきい値を越えてキャリアの誤検出が発
生する問題がある。
As described above, in the distribution line carrier receiving device based on the conventional method, the threshold value to be compared with the sum of squares of signals is fixed to the set value. In a distribution system, there are many fluctuations in noise such as harmonics of commercial frequency, so if the harmonics become larger than when the threshold is set, the harmonics of the commercial frequency will exceed the threshold and false detection of carriers will occur. There is a problem that occurs.

【0005】本発明は、配電系統における商用周波の高
調波などのノイズの変動に対してしきい値を手動操作に
よって設定し直す必要がなく、また商用周波の高調波が
信号に比べ過大な場合にも安定なキャリア検出ができる
配電線搬送受信方法とその装置の提供を目的とする。
According to the present invention, there is no need to manually reset the threshold value for noise fluctuations such as harmonics of commercial frequency in the distribution system, and when the harmonics of commercial frequency are excessive as compared with the signal. In particular, it is an object of the present invention to provide a distribution line carrier receiving method and device capable of stable carrier detection.

【0006】[0006]

【課題を解決するための手段】請求項1に記載の配電線
搬送受信方法は、配電線に注入されたデジタル変調信号
を変流器により検出し、前記デジタル変調信号の復調を
行うに際し、前記変流器で検出した信号の時々の積分値
のうちの最小値に基づいて基準レベル信号を生成し、次
にこの基準レベル信号と時々の前記積分値とを比較して
キャリヤ検出することを特徴とする。
According to a first aspect of the present invention, there is provided a distribution line carrier receiving method for detecting a digital modulation signal injected into a distribution line by a current transformer and demodulating the digital modulation signal. A reference level signal is generated based on the minimum value of the integrated values of the signal detected by the current transformer, and then the reference level signal is compared with the integrated value of the time to perform carrier detection. And

【0007】請求項2に記載の配電線搬送受信装置は、
配電線に注入されたデジタル変調信号を変流器により検
出し、前記デジタル変調信号の復調を行う配電線搬送受
信装置において、前記変流器で検出した信号を自乗する
自乗回路と、その出力を繰り返し規定時間にわたって積
分する積分回路と、前記積分回路の出力と第1の基準値
とを比較して最小値を抽出する第1の比較回路と、その
第1の比較回路の出力で更新されその値を前記第1の基
準値として出力するメモリと、前記規定時間ごとに前記
積分回路の出力と前記メモリの出力に基づく第2の基準
値とを比較してキャリヤを抽出する第2の比較回路とを
設けたことを特徴とする。
A distribution line carrier receiving device according to claim 2 is
A digital modulation signal injected into a distribution line is detected by a current transformer, and in a distribution line carrier receiver that demodulates the digital modulation signal, a square circuit that squares the signal detected by the current transformer, and its output An integration circuit that repeatedly integrates over a specified time, a first comparison circuit that compares the output of the integration circuit with a first reference value to extract a minimum value, and an output that is updated by the output of the first comparison circuit. A memory that outputs a value as the first reference value, and a second comparison circuit that compares the output of the integration circuit and a second reference value based on the output of the memory at each of the specified times to extract a carrier. And is provided.

【0008】請求項3に記載の配電線搬送受信装置は、
配電線に注入されたデジタル変調信号を変流器により検
出し、前記デジタル変調信号の復調を行う配電線搬送受
信装置において、前記変流器で検出した信号の絶対値を
出力する絶対値回路と、その出力を繰り返し規定時間に
わたって積分する積分回路と、前記積分回路の出力と第
1の基準値とを比較して最小値を抽出する第1の比較回
路と、その第1の比較回路の出力で更新されその値を前
記第1の基準値として出力するメモリと、前記規定時間
ごとに前記積分回路の出力と前記メモリの出力に基づく
第2の基準値とを比較してキャリヤを抽出する第2の比
較回路とを設けたことを特徴とする。
A distribution line carrier receiving device according to claim 3 is
In the distribution line carrier receiving device for detecting the digital modulation signal injected into the distribution line by the current transformer and demodulating the digital modulation signal, an absolute value circuit for outputting the absolute value of the signal detected by the current transformer, An integrating circuit for repeatedly integrating the output over a specified time, a first comparing circuit for comparing the output of the integrating circuit with a first reference value to extract a minimum value, and an output of the first comparing circuit A memory that is updated by the above and outputs the value as the first reference value, and a carrier is extracted by comparing the output of the integration circuit and a second reference value based on the output of the memory for each specified time. And 2 comparator circuits are provided.

【0009】[0009]

【作用】請求項1の構成によると、入力信号の時々の積
分値のうちの最小値に基づいて基準レベル信号を生成す
るので、商用周波の高調波などのノイズレベルに変動が
あってもその変動に応じて基準レベル信号が自動的に変
化する。
According to the structure of the first aspect, the reference level signal is generated based on the minimum value of the integrated values of the input signal from time to time. Therefore, even if the noise level such as a harmonic of the commercial frequency fluctuates, The reference level signal automatically changes according to the change.

【0010】請求項2の構成によると、積分回路の出力
と第1の基準値とを比較して最小値を抽出する第1の比
較回路と第1の比較回路の出力で更新されその値を前記
第1の基準値として出力するメモリを設けたため、第1
の比較回路で積分回路の出力と第1の基準値とを比較し
てその最小値を抽出し、その出力に基づいて第2の基準
値を生成する。
According to the second aspect of the present invention, the output of the first comparing circuit and the first comparing circuit for comparing the output of the integrating circuit with the first reference value to extract the minimum value are updated and the value is updated. Since the memory for outputting the first reference value is provided,
The comparator circuit compares the output of the integrator circuit with the first reference value, extracts the minimum value, and generates the second reference value based on the output.

【0011】請求項3の構成によると、請求項2の自乗
回路の代わりに絶対値回路で構成したため、商用周波の
高調波が信号に比べ過大な場合にも商用周波の高調波の
積分値に基づいて生成される第2の基準値が信号波周波
の積分値を超えない。
According to the third aspect of the invention, since the absolute value circuit is used instead of the square circuit of the second aspect, even if the harmonic of the commercial frequency is larger than the signal, the integrated value of the harmonic of the commercial frequency becomes The second reference value generated based on this does not exceed the integral value of the signal wave frequency.

【0012】[0012]

【実施例】以下、本発明の配電線搬送受信方法を具体的
な実施例に基づいて説明する。なお、従来例を示す図4
と同様の作用をなすものは同一の符号を付けて説明す
る。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The distribution line carrier receiving method of the present invention will be described below with reference to specific embodiments. In addition, FIG. 4 showing a conventional example
Those having the same operation as will be described with the same reference numerals.

【0013】図1は本発明の配電線搬送受信方法を採用
した配電線搬送受信装置を示す。CT1で検出されたデ
ジタル変調信号はBPF2により信号波成分の周波数に
帯域制限され、自乗回路3により自乗され、積分回路4
によりタイマー5の計測時間Tの間積分を行い、積分回
路4の出力は切り替えスイッチ7に入力される。
FIG. 1 shows a distribution line carrying / receiving apparatus adopting the distribution line carrying / receiving method of the present invention. The digital modulation signal detected by CT1 is band-limited to the frequency of the signal wave component by BPF2, squared by square circuit 3, and integrated circuit 4
The integration is performed during the measurement time T of the timer 5, and the output of the integration circuit 4 is input to the changeover switch 7.

【0014】また、リセット回路8によりリセットされ
たカウンタ9でタイマー5の計測時間Tをカウントアッ
プし、そのカウント値が第3の比較回路10に設定され
た整数N、すなわち時間”N・T”経過までは切り替え
スイッチ7をスイッチ出力Eの側に切り換え、積分回路
4の出力は第1の比較回路11に入力され、初期値を正
の最大値に設定されたメモリ12の出力と比較され、小
さい方の値がメモリ12に更新される。メモリ12の内
容は乗算回路13により更新後のメモリ12の内容と定
数とが乗算され、第2の比較回路6のしきい値として入
力される。
The counter 9 reset by the reset circuit 8 counts up the measurement time T of the timer 5, and the count value is an integer N set in the third comparison circuit 10, that is, the time "NT". Until the lapse of time, the changeover switch 7 is switched to the switch output E side, the output of the integrating circuit 4 is input to the first comparing circuit 11, and is compared with the output of the memory 12 whose initial value is set to the maximum positive value. The smaller value is updated in the memory 12. The contents of the memory 12 are multiplied by the contents of the updated memory 12 and a constant by the multiplication circuit 13 and input as the threshold value of the second comparison circuit 6.

【0015】次に、第3の比較回路10によって、カウ
ンタ9のカウント値がN、すなわち時間”N・T”経過
後は切り替えスイッチ7をスイッチ出力Fの側に切り換
え、積分回路4の出力は第2の比較回路6に入力され、
タイマー5の計測した時間Tごとに乗算回路13で生成
されたしきい値との比較を行い、しきい値を越えればキ
ャリア検出とする。
Next, the third comparison circuit 10 switches the changeover switch 7 to the switch output F side after the count value of the counter 9 is N, that is, after the lapse of the time "NT", and the output of the integration circuit 4 is changed. Is input to the second comparison circuit 6,
For each time T measured by the timer 5, the threshold value generated by the multiplication circuit 13 is compared, and if the threshold value is exceeded, carrier detection is performed.

【0016】以下、各部の動作時の波形例を図2を参照
しながら説明する。図2において、(a)に示すAはB
PF2の出力、(b)に示す実線のB1 はメモリ12の
出力で破線のB2 は乗算回路13の出力、(c)に示す
Cは積分回路4の出力、(d)に示すDは第2の比較回
路6の出力である。
Hereinafter, an example of waveforms when each part operates will be described with reference to FIG. In FIG. 2, A shown in (a) is B
The output of PF2, the solid line B 1 shown in (b) is the output of the memory 12, the broken line B 2 is the output of the multiplication circuit 13, the C shown in (c) is the output of the integration circuit 4, and the D shown in (d) is This is the output of the second comparison circuit 6.

【0017】まず、カウンタ9のカウント値がNすなわ
ち時間”N・T”経過前までは切り替えスイッチ7はス
イッチ出力Eが選択され、(b)に示す波形B1 のよう
にメモリ12にはタイマー5の計測時間Tの間、積分回
路4により積分が行なわれた結果最小値が格納され乗算
回路13により更新後のメモリ12の内容と定数とが乗
算され、その乗算結果が第2の比較回路6に(b)の破
線B2 で示すしきい値として入力される。
First, the switch output E is selected by the changeover switch 7 until the count value of the counter 9 is N, that is, before the time "NT" has elapsed, and the timer is stored in the memory 12 as shown by the waveform B 1 in (b). During the measurement time T of 5, the minimum value obtained as a result of integration by the integration circuit 4 is stored, and the content of the updated memory 12 is multiplied by the constant by the multiplication circuit 13, and the multiplication result is the second comparison circuit. 6 is input as the threshold value shown by the broken line B 2 in (b).

【0018】つぎにカウンタ9のカウント値がNすなわ
ち時間”N・T”経過後は切り替えスイッチ7はスイッ
チ出力Fが選択され、(c)の波形Cに示すような積分
回路4の出力が第2の比較回路6に入力され、第2の比
較回路6によって(b)の破線B2 で示すしきい値との
比較を開始し、(c)に示すS点で積分回路4の出力が
しきい値B2 を越え(d)に示す波形Dのように第2の
比較回路6からキャリア検出信号Dを出力する。
Next, when the count value of the counter 9 is N, that is, after the lapse of time "NT", the switch output F is selected by the changeover switch 7, and the output of the integrating circuit 4 as shown by the waveform C in FIG. 2 is input to the comparison circuit 6 and the second comparison circuit 6 starts comparison with the threshold value shown by the broken line B 2 in (b), and the output of the integration circuit 4 is output at point S shown in (c). The threshold value B 2 is exceeded, and the carrier detection signal D is output from the second comparison circuit 6 as a waveform D shown in (d).

【0019】以上の構成によれば、リセット回路8によ
りカウンタ9がリセットされ、時間NT経過前までは切
り替えスイッチ7のスイッチ出力Eより計測時間NTの
区間における信号の自乗和の最小値の定数倍値が第2の
比較回路6のしきい値として入力され、時間NT経過後
は切り替えスイッチ7のスイッチ出力Fを選択し、第2
の比較回路6が時間Tにおける信号の自乗和としきい値
とを比較しキャリア検出信号Dを出力するので、配電線
における商用周波の高調波がしきい値設定時より大きく
なった場合でも定期的にリセット回路8によりリセット
すれば、その都度に最適なしきい値を自動設定できる。
以上の回路をマイクロプロセッサーを用いて構成しても
同様の効果が得られる。
According to the above configuration, the counter 9 is reset by the reset circuit 8, and until the time NT elapses, a constant multiple of the minimum value of the sum of squares of signals in the section of the measurement time NT from the switch output E of the changeover switch 7. The value is input as the threshold value of the second comparison circuit 6, and after the lapse of time NT, the switch output F of the changeover switch 7 is selected,
Since the comparator circuit 6 compares the sum of squares of the signal at time T with the threshold value and outputs the carrier detection signal D, even if the harmonic of the commercial frequency in the distribution line becomes larger than that when the threshold value is set, the comparison circuit 6 periodically. If the reset circuit 8 is used to reset, the optimum threshold value can be automatically set each time.
The same effect can be obtained by configuring the above circuit using a microprocessor.

【0020】上記の実施例では、自乗回路3を介して積
分回路4に信号を入力したが、これは図3に示すように
自乗回路3の代わりにCT1で検出した信号の絶対値を
出力する絶対値回路14を用いることによって、上記実
施例の効果に加えて商用周波の高調波が信号に比べ過大
となった場合にも商用周波の高調波の積分値に基づいて
生成される第2の基準値としてのしきい値が信号周波の
積分値を超えないため、安定なキャリヤ検出ができると
いう有効な効果が得られる。
In the above embodiment, the signal was input to the integrating circuit 4 via the squaring circuit 3, but this outputs the absolute value of the signal detected by CT1 instead of the squaring circuit 3 as shown in FIG. By using the absolute value circuit 14, in addition to the effect of the above-described embodiment, the second value generated based on the integral value of the harmonic of the commercial frequency even when the harmonic of the commercial frequency becomes excessive compared to the signal. Since the threshold value as the reference value does not exceed the integral value of the signal frequency, the effective effect of stable carrier detection can be obtained.

【0021】[0021]

【発明の効果】請求項1に記載の配電線搬送受信方法に
よれば、入力信号の時々の積分値のうちの最小値に基づ
いて基準レベル信号を生成し、次にこの基準レベル信号
と時々の積分値とを比較してキャリヤ検出するので、商
用周波の高調波などのノイズの変動が多くあり配電線に
おける商用周波の高調波が基準レベル信号設定時より大
きくなって基準レベル信号をこえた場合でも、その商用
周波の高調波の積分値に追従して基準レベル信号を自動
的に高く設定し直される。したがって従来のようなキャ
リアの誤検出をなくすことができ、その結果安定なキャ
リア検出が行える。
According to the distribution line carrier receiving method of the present invention, a reference level signal is generated on the basis of the minimum value of the integrated values of the input signal, and then the reference level signal and the sometimes integrated value are generated. Since carrier detection is performed by comparing with the integrated value of, the fluctuation of noise such as harmonics of the commercial frequency is large, and the harmonics of the commercial frequency on the distribution line are larger than when the reference level signal was set and exceeded the reference level signal. Even in such a case, the reference level signal is automatically reset to a high level by following the integrated value of the harmonic of the commercial frequency. Therefore, it is possible to eliminate the erroneous detection of carriers as in the conventional case, and as a result, it is possible to perform stable carrier detection.

【0022】請求項2の配電線搬送受信装置によれば、
積分回路の出力と第1の基準値とを比較して最小値を抽
出する第1の比較回路と第1の比較回路の出力で更新さ
れその値を前記第1の基準値として出力するメモリを設
け第1の比較回路で積分回路の出力と第1の基準値とを
比較してその最小値を抽出し、その出力に基づいて第2
の基準値を生成するので、配電線における商用周波の高
調波が第2の基準値設定時より大きくなった場合でも定
期的にリセット回路によりリセットすれば、その都度最
適な第2の基準値が自動設定でき、キャリアの誤検出を
なくすことができ、その結果安定なキャリア検出が行え
る。
According to the distribution line carrier receiving device of claim 2,
A first comparator circuit for comparing the output of the integrator circuit and the first reference value to extract the minimum value and a memory updated by the output of the first comparator circuit for outputting the value as the first reference value. The first comparator circuit is provided to compare the output of the integrator circuit with the first reference value to extract the minimum value, and the second value is output based on the output.
Since the reference value is generated, even if the harmonics of the commercial frequency in the distribution line become larger than when the second reference value is set, if the reset circuit is reset periodically, the optimum second reference value will be obtained each time. The automatic setting can be performed, false detection of carrier can be eliminated, and stable carrier detection can be performed as a result.

【0023】請求項3の構成によれば、請求項1の自乗
回路の代わりに絶対値回路で構成したため、商用周波の
高調波が信号に比べ過大な場合にも商用周波の高調波の
積分値に基づいて生成される第2の基準値が信号波周波
の積分値を超えないため、より安定なキャリア検出が行
える。
According to the third aspect of the present invention, since the absolute value circuit is used instead of the square circuit of the first aspect, even if the harmonic of the commercial frequency is larger than the signal, the integrated value of the harmonic of the commercial frequency is obtained. Since the second reference value generated based on does not exceed the integral value of the signal wave frequency, more stable carrier detection can be performed.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の配電線搬送受信方法を採用した配電線
搬送受信装置の構成図である。
FIG. 1 is a configuration diagram of a distribution line carrying / receiving apparatus adopting a distribution line carrying / receiving method of the present invention.

【図2】図1の要部波形図である。FIG. 2 is a waveform diagram of a main part of FIG.

【図3】別の実施例構成図である。FIG. 3 is a configuration diagram of another embodiment.

【図4】従来の配電線搬送通信装置の構成図である。FIG. 4 is a configuration diagram of a conventional distribution line carrier communication device.

【符号の説明】[Explanation of symbols]

1 変流器(CT) 2 バンドパスフィルタ(BPF) 3 自乗回路 4 積分回路 5 タイマー 6 第2の比較回路 7 切り替えスイッチ 8 リセット回路 9 カウンタ 10 第3の比較回路 11 第1の比較回路 12 メモリ 13 乗算回路 1 Current Transformer (CT) 2 Band Pass Filter (BPF) 3 Square Circuit 4 Integration Circuit 5 Timer 6 Second Comparison Circuit 7 Changeover Switch 8 Reset Circuit 9 Counter 10 Third Comparison Circuit 11 First Comparison Circuit 12 Memory 13 Multiplier circuit

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 配電線に注入されたデジタル変調信号を
変流器により検出し、前記デジタル変調信号の復調を行
うに際し、前記変流器で検出した信号の時々の積分値の
うちの最小値に基づいて基準レベル信号を生成し、次に
この基準レベル信号と時々の前記積分値とを比較してキ
ャリヤ検出する配電線搬送受信方法。
1. A minimum value of the integrated values of the signal detected by the current transformer at the time of detecting the digital modulation signal injected into the distribution line by a current transformer and demodulating the digital modulation signal. A distribution line carrier receiving method in which a reference level signal is generated based on the above, and then the carrier is detected by comparing the reference level signal with the occasionally integrated value.
【請求項2】 配電線に注入されたデジタル変調信号を
変流器により検出し、前記デジタル変調信号の復調を行
う配電線搬送受信装置において、前記変流器で検出した
信号を自乗する自乗回路と、その出力を繰り返し規定時
間にわたって積分する積分回路と、前記積分回路の出力
と第1の基準値とを比較して最小値を抽出する第1の比
較回路と、その第1の比較回路の出力で更新されその値
を前記第1の基準値として出力するメモリと、前記規定
時間ごとに前記積分回路の出力と前記メモリの出力に基
づく第2の基準値とを比較してキャリヤを抽出する第2
の比較回路とを設けた配電線搬送受信装置。
2. In a distribution line carrier receiver for detecting a digital modulation signal injected into a distribution line by a current transformer and demodulating the digital modulation signal, a squaring circuit for squaring the signal detected by the current transformer. An integrating circuit that repeatedly integrates the output over a specified time; a first comparing circuit that compares the output of the integrating circuit with a first reference value to extract a minimum value; and a first comparing circuit of the first comparing circuit. A carrier is extracted by comparing a memory that is updated with an output and outputs the value as the first reference value with a second reference value based on the output of the memory and the output of the integration circuit at each specified time. Second
The distribution line carrier receiving device provided with the comparison circuit of.
【請求項3】 配電線に注入されたデジタル変調信号を
変流器により検出し、前記デジタル変調信号の復調を行
う配電線搬送受信装置において、前記変流器で検出した
信号の絶対値を出力する絶対値回路と、その出力を繰り
返し規定時間にわたって積分する積分回路と、前記積分
回路の出力と第1の基準値とを比較して最小値を抽出す
る第1の比較回路と、その第1の比較回路の出力で更新
されその値を前記第1の基準値として出力するメモリ
と、前記規定時間ごとに前記積分回路の出力と前記メモ
リの出力に基づく第2の基準値とを比較してキャリヤを
抽出する第2の比較回路とを設けた配電線搬送受信装
置。
3. A distribution line carrier receiver for detecting a digital modulation signal injected into a distribution line by a current transformer and demodulating the digital modulation signal, and outputting the absolute value of the signal detected by the current transformer. An absolute value circuit, an integration circuit that repeatedly integrates its output over a specified time, a first comparison circuit that compares the output of the integration circuit with a first reference value and extracts a minimum value, and a first comparison circuit thereof. Comparing the output of the integrator circuit and the second reference value based on the output of the memory, which is updated by the output of the comparator circuit and outputs the value as the first reference value. A distribution line carrier receiving device provided with a second comparison circuit for extracting a carrier.
JP17355592A 1992-07-01 1992-07-01 Distribution line carrier receiving method and device Expired - Fee Related JP3280705B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17355592A JP3280705B2 (en) 1992-07-01 1992-07-01 Distribution line carrier receiving method and device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17355592A JP3280705B2 (en) 1992-07-01 1992-07-01 Distribution line carrier receiving method and device

Publications (2)

Publication Number Publication Date
JPH0621853A true JPH0621853A (en) 1994-01-28
JP3280705B2 JP3280705B2 (en) 2002-05-13

Family

ID=15962720

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17355592A Expired - Fee Related JP3280705B2 (en) 1992-07-01 1992-07-01 Distribution line carrier receiving method and device

Country Status (1)

Country Link
JP (1) JP3280705B2 (en)

Also Published As

Publication number Publication date
JP3280705B2 (en) 2002-05-13

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