JPH06216607A - Dielectric filter and manufacture therefor - Google Patents
Dielectric filter and manufacture thereforInfo
- Publication number
- JPH06216607A JPH06216607A JP2164793A JP2164793A JPH06216607A JP H06216607 A JPH06216607 A JP H06216607A JP 2164793 A JP2164793 A JP 2164793A JP 2164793 A JP2164793 A JP 2164793A JP H06216607 A JPH06216607 A JP H06216607A
- Authority
- JP
- Japan
- Prior art keywords
- conductor film
- film pattern
- dielectric block
- dielectric
- conductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、λ／４同軸型誘電体共
振器を複数個組合わせてなる誘電体フィルタ及びその製
造方法に関し、特に安定した周波数特性をもつ高周波誘
電体フィルタ及びその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dielectric filter comprising a plurality of .lambda. / 4 coaxial dielectric resonators and a method for manufacturing the same, and particularly to a high frequency dielectric filter having stable frequency characteristics and its manufacture. Regarding the method.
【０００２】[0002]
【従来の技術及び発明が解決しようとする課題】図８
は、λ／４同軸型誘電体共振器を用いて構成される従来
の高周波誘電体フィルタの一例を示す概略平面図であ
り、誘電体共振器の内導体と外導体とが短絡されていな
い開放面側を示すものである。図８において、２は誘電
体ブロックであり、４Ａ，４Ｂ，４Ｃは貫通孔であり、
該貫通孔には内導体が付されている。８は外導体であ
る。１２Ａ，１２Ｂ，１２Ｃは上記開放面において上記
内導体と接続されている第１の導体膜パターンであり、
１６Ａ，１６Ｂはこれら第１の導体膜パターン間にあっ
て外導体８の対向部分を接続する様に配置されている第
２の導体膜パターンを示す。尚、両端の貫通孔４Ａ，４
Ｃに付された内導体には入出力のための電極が容量結合
されるが、図示は省略されている。[Prior Art and Problems to be Solved by the Invention] FIG.
FIG. 4 is a schematic plan view showing an example of a conventional high-frequency dielectric filter configured by using a λ / 4 coaxial dielectric resonator, in which an inner conductor and an outer conductor of the dielectric resonator are not short-circuited. It shows the surface side. In FIG. 8, 2 is a dielectric block, 4A, 4B and 4C are through holes,
An inner conductor is attached to the through hole. Reference numeral 8 is an outer conductor. 12A, 12B, 12C are first conductor film patterns connected to the inner conductor on the open surface,
Reference numerals 16A and 16B denote second conductor film patterns which are located between these first conductor film patterns and which are arranged so as to connect the facing portions of the outer conductor 8. The through holes 4A, 4 at both ends
Electrodes for input and output are capacitively coupled to the inner conductor attached to C, but the illustration is omitted.
【０００３】この様な誘電体フィルタの等価回路を図９
に示す。上記第１の導体膜パターン１２Ａ，１２Ｂ，１
２Ｃの形状及び寸法ならびに上記第２の導体膜パターン
の形状及び寸法を変化させることにより、図９の等価回
路におけるＣ1 ，Ｃ2 ，Ｃ3，Ｍ1 ，Ｍ2 の値を変化さ
せて、フィルタの周波数特性を調整することができる。An equivalent circuit of such a dielectric filter is shown in FIG.
Shown in. The first conductor film patterns 12A, 12B, 1
By changing the shape and size of 2C and the shape and size of the second conductor film pattern, the values of C 1 , C 2 , C 3 , M 1 and M 2 in the equivalent circuit of FIG. 9 are changed, The frequency characteristic of the filter can be adjusted.
【０００４】上記第１の導体膜パターン１２Ａ，１２
Ｂ，１２Ｃ及び上記第２の導体膜パターン１６Ａ，１６
Ｂは、スクリーン印刷により導電性インクを付与し乾燥
させることにより形成される。その際に、第１の導体膜
パターン１２Ａ，１２Ｂ，１２Ｃの位置がずれると、こ
れらと外導体８との位置関係が変化して、Ｘ方向にずれ
た場合には上記Ｃ1 ，Ｃ3 の値が所定のものからずれ、
またＹ方向にずれた場合には上記Ｃ1 ，Ｃ2 ，Ｃ3 の値
が所定のものからずれて、挿入損失が増大したり、所望
の通過周波数帯域が得られなかったり、所望の周波数に
減衰極が形成されなくなったりし、特性が劣化する。導
体膜パターンの位置決めは、外導体８の付された誘電体
ブロック２の外面を基準としてなされるので、誘電体ブ
ロック２の寸法誤差や外導体８の膜厚誤差や印刷時のマ
スク配置誤差により、上記導体膜パターンの位置ずれが
発生しやすい。The first conductor film patterns 12A, 12
B, 12C and the second conductor film patterns 16A, 16
B is formed by applying a conductive ink by screen printing and drying. At that time, if the positions of the first conductor film patterns 12A, 12B, and 12C deviate, the positional relationship between these and the outer conductor 8 changes, and if they deviate in the X direction, the above C 1 , C 3 The value deviates from the prescribed value,
Further, when the value shifts in the Y direction, the values of C 1 , C 2 and C 3 deviate from the predetermined values, the insertion loss increases, the desired pass frequency band cannot be obtained, and the desired frequency is not changed. The attenuation pole is not formed and the characteristics deteriorate. Since the conductor film pattern is positioned with reference to the outer surface of the dielectric block 2 to which the outer conductor 8 is attached, it may depend on the dimensional error of the dielectric block 2, the film thickness error of the outer conductor 8 and the mask placement error during printing. The displacement of the conductor film pattern is likely to occur.
【０００５】このため、従来のこの種の誘電体フィルタ
の製造では、所望の特性を得るために、誘電体ブロック
の寸法精度を厳しくしたり、外導体の膜厚精度を厳しく
したり、印刷時のマスク配置精度を厳しくしたりするこ
とが要求され、従って、歩留りが低く、製造コストが高
くなるという難点があった。Therefore, in the conventional manufacture of this type of dielectric filter, in order to obtain desired characteristics, the dimensional accuracy of the dielectric block is strict, the film thickness accuracy of the outer conductor is strict, and printing is performed at the time of printing. However, there is a problem that the yield is low and the manufacturing cost is high.
【０００６】本発明は、以上の様な問題点を解決し、厳
しい精度を要することなく容易に所望の良好な周波数特
性のフィルタを得ることを目的とするものである。An object of the present invention is to solve the above problems and to easily obtain a desired filter with good frequency characteristics without requiring strict accuracy.
【０００７】[0007]
【課題を解決するための手段】本発明によれば、上記目
的を達成するものとして、誘電体ブロックに複数の平行
な貫通孔を形成し、各貫通孔の内面に導体膜を形成して
内導体とし、前記誘電体ブロックの内導体と交わらない
外面に導体膜を形成して外導体とし、前記貫通孔が開口
せる前記誘電体ブロックの２つの外面のうちの一方に導
体膜を形成して前記内導体と前記外導体とを短絡させ、
前記貫通孔が開口せる前記誘電体ブロックの２つの外面
のうちの他方には各内導体と接続せる略環状の内側導体
膜パターンを形成するとともに前記外導体と接続せる略
環状の外側導体膜パターンを形成してなることを特徴と
する、誘電体フィルタ、が提供される。According to the present invention, in order to achieve the above object, a plurality of parallel through holes are formed in a dielectric block, and a conductor film is formed on the inner surface of each through hole. As a conductor, a conductor film is formed on an outer surface of the dielectric block that does not intersect with the inner conductor to form an outer conductor, and a conductor film is formed on one of two outer surfaces of the dielectric block in which the through holes are opened. Shorting the inner conductor and the outer conductor,
A substantially annular inner conductor film pattern that is connected to each inner conductor is formed on the other of the two outer surfaces of the dielectric block where the through hole is opened, and a substantially annular outer conductor film pattern that is connected to the outer conductor. There is provided a dielectric filter, characterized in that
【０００８】本発明の一態様においては、前記貫通孔が
開口せる前記誘電体ブロックの２つの外面のうちの他方
には、隣接する２つの前記略環状の内側導体膜パターン
の間に、前記略環状の外側導体膜パターンの対向部分間
を接続せる中間導体膜パターンを形成してなる。In one aspect of the present invention, the other of the two outer surfaces of the dielectric block in which the through hole is opened is provided between the two adjacent substantially annular inner conductor film patterns. An intermediate conductor film pattern is formed to connect the opposing portions of the annular outer conductor film pattern.
【０００９】更に、本発明によれば、上記目的を達成す
るものとして、以上の様な誘電体フィルタを製造する方
法において、前記略環状の内側導体膜パターン及び前記
略環状の外側導体膜パターンを共通の版を用い同時に印
刷して形成することを特徴とする、誘電体フィルタの製
造方法、が提供される。Further, according to the present invention, in order to achieve the above object, in the method for manufacturing a dielectric filter as described above, the substantially annular inner conductor film pattern and the substantially annular outer conductor film pattern are provided. Provided is a method for manufacturing a dielectric filter, which is characterized by simultaneously forming and printing using a common plate.
【００１０】本発明の一態様においては、前記略環状の
内側導体膜パターン及び前記略環状の外側導体膜パター
ンを形成する際に、更に前記略環状の外側導体膜パター
ンの対向部分間を接続せる中間導体膜パターンを形成
し、前記内側導体膜パターン及び前記外側導体膜パター
ンならびに前記中間導体膜パターンを共通の版を用い同
時に印刷して形成する。In one aspect of the present invention, when the substantially annular inner conductor film pattern and the substantially annular outer conductor film pattern are formed, the opposing portions of the substantially annular outer conductor film pattern are further connected. An intermediate conductor film pattern is formed, and the inner conductor film pattern, the outer conductor film pattern, and the intermediate conductor film pattern are simultaneously printed using a common plate.
【００１１】[0011]
【実施例】以下、図面を参照しながら本発明の具体的実
施例を説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Specific embodiments of the present invention will be described below with reference to the drawings.
【００１２】図１は本発明の誘電体フィルタの一実施例
を示す一部切欠斜視図である。図において、２は直方体
形状の誘電体ブロックであり、該ブロック２としては例
えばＢａＴｉＯ3 系の比誘電率９３の材料を使用するこ
とができる。該ブロック２には上下方向（Ｚ方向）の３
つの円形貫通孔４Ａ，４Ｂ，４Ｃが形成されている。こ
れら貫通孔はＸ方向に適宜の距離隔てられて配列されて
いる。該貫通孔４Ａ，４Ｂ，４Ｃの内面には導体膜が付
されており、該導体膜により内導体６Ａ，６Ｂ，６Ｃが
形成されている。また、誘電体ブロック２の４つの側面
（Ｘ−Ｚ面と平行な外面及びＹ−Ｚ面と平行な外面）に
は導体膜が付されており、該導体膜により外導体８が形
成されている。また、ブロック２の底面にも導体膜１０
が付されており、これにより内導体６Ａ，６Ｂ，６Ｃと
外導体８とが短絡されている。かくして、外導体を共通
化した３つの同軸型誘電体共振器の配列が形成されてい
る。FIG. 1 is a partially cutaway perspective view showing an embodiment of the dielectric filter of the present invention. In the figure, reference numeral 2 is a rectangular parallelepiped dielectric block. As the block 2, for example, a BaTiO 3 -based material having a relative dielectric constant 93 can be used. The block 2 has 3 in the vertical direction (Z direction).
One circular through hole 4A, 4B, 4C is formed. These through holes are arranged at an appropriate distance in the X direction. A conductor film is attached to the inner surfaces of the through holes 4A, 4B, 4C, and the conductor films form inner conductors 6A, 6B, 6C. A conductor film is attached to the four side surfaces (the outer surface parallel to the XZ plane and the outer surface parallel to the YZ plane) of the dielectric block 2, and the outer conductor 8 is formed by the conductor film. There is. In addition, the conductor film 10 is also formed on the bottom surface of the block 2.
Are attached, whereby the inner conductors 6A, 6B, 6C and the outer conductor 8 are short-circuited. Thus, an array of three coaxial type dielectric resonators having the common outer conductor is formed.
【００１３】ブロック２の上面には、各貫通孔の周囲
に、内導体６Ａに接続せる環状の導体膜パターン（内側
導体膜パターン）１２Ａ、内導体６Ｂに接続せる環状の
内側導体膜パターン１２Ｂ、及び内導体６Ｃに接続せる
環状の内側導体膜パターン１２Ｃが形成されている。ま
た、ブロック２の上面には、外周に沿ってほぼ環状に、
外側を外導体８に接続せる外側導体膜パターン１４が形
成されている。更に、ブロック２の上面には、内側導体
膜パターン１２Ａと１２Ｂとの間に中間導体膜パターン
１６Ａが形成されており、内側導体膜パターン１２Ｂと
１２Ｃとの間に中間導体膜パターン１６Ｂが形成されて
いる。これら中間導体膜パターンは直線状であり、その
両端が外導体８に接続されている。上記各内側導体膜パ
ターンと外側導体膜パターンとの間で容量結合が形成さ
れており、また、上記中間導体膜パターンにより共振器
間が誘導結合されている。On the upper surface of the block 2, around each through hole, an annular conductor film pattern (inner conductor film pattern) 12A connected to the inner conductor 6A, an inner conductor film pattern 12B connected to the inner conductor 6B, Also, an annular inner conductor film pattern 12C that can be connected to the inner conductor 6C is formed. In addition, on the upper surface of the block 2, a substantially annular shape along the outer periphery,
An outer conductor film pattern 14 is formed to connect the outer side to the outer conductor 8. Further, on the upper surface of the block 2, an intermediate conductor film pattern 16A is formed between the inner conductor film patterns 12A and 12B, and an intermediate conductor film pattern 16B is formed between the inner conductor film patterns 12B and 12C. ing. These intermediate conductor film patterns are linear and both ends thereof are connected to the outer conductor 8. Capacitive coupling is formed between the inner conductor film patterns and the outer conductor film patterns, and the resonators are inductively coupled by the intermediate conductor film patterns.
【００１４】尚、誘電体ブロック２の１つの側面（図に
おける手前側の面）には、上記内側導体膜パターン１２
Ａに近接せる位置に外導体８から分離された入力用電極
１８Ａが形成されており、上記内側導体膜パターン１２
Ｃに近接せる位置に外導体８から分離された出力用電極
１８Ｂが形成されている。図示されている様に、これら
入力用電極及び出力用電極の部分では上記外側導体膜パ
ターンは存在しない。かくして、入力用電極１８Ａと内
側導体膜パターン１２Ａとの間で入力側の容量結合が形
成され、出力用電極１８Ｂと内側導体膜パターン１２Ｃ
との間で出力側の容量結合が形成されている。The inner conductor film pattern 12 is formed on one side surface (front surface in the figure) of the dielectric block 2.
An input electrode 18A separated from the outer conductor 8 is formed at a position close to A, and the inner conductor film pattern 12 is formed.
An output electrode 18B separated from the outer conductor 8 is formed at a position close to C. As shown in the drawing, the outer conductor film pattern does not exist at the input electrode and output electrode portions. Thus, an input side capacitive coupling is formed between the input electrode 18A and the inner conductor film pattern 12A, and the output electrode 18B and the inner conductor film pattern 12C.
A capacitive coupling on the output side is formed between and.
【００１５】本実施例の等価回路は、上記図９と同様で
ある。The equivalent circuit of this embodiment is similar to that shown in FIG.
【００１６】次に、以上の様な本実施例の誘電体フィル
タの製造方法について説明する。図２は、上記内側導体
膜パターン、上記外側導体膜パターン及び上記中間導体
膜パターンを形成する前の状態を示す一部切欠斜視図で
ある。この状態までは、従来法と同様にして形成する。Next, a method of manufacturing the above-described dielectric filter of this embodiment will be described. FIG. 2 is a partially cutaway perspective view showing a state before forming the inner conductor film pattern, the outer conductor film pattern and the intermediate conductor film pattern. Up to this state, it is formed in the same manner as the conventional method.
【００１７】そして、図３に示されている様なマスクパ
ターン（版）２０を用いて、誘電体ブロック２の上面に
導電性インクを所望パターンに付与して、上記内側導体
膜パターン、上記外側導体膜パターン及び上記中間導体
膜パターンを形成する。図３において、１２Ａ’，１２
Ｂ’，１２Ｃ’，１４’，１６Ａ’，１６Ｂ’は、それ
ぞれ上記内側導体膜パターン１２Ａ，１２Ｂ，１２Ｃ、
上記外側導体膜パターン１４及び上記中間導体膜パター
ン１６Ａ，１６Ｂを形成するための、マスクパターン開
口部である。図３に示されている様に、マスクパターン
は、外側導体膜パターン形成のための部分１４’の外形
が誘電体ブロック２の外形に対しＸ方向及びＹ方向にい
ずれもｄだけ大きく設定されている。Then, using a mask pattern (plate) 20 as shown in FIG. 3, conductive ink is applied in a desired pattern on the upper surface of the dielectric block 2 to form the inner conductor film pattern and the outer side. A conductor film pattern and the intermediate conductor film pattern are formed. In FIG. 3, 12A ′, 12
B ', 12C', 14 ', 16A' and 16B 'are the inner conductor film patterns 12A, 12B and 12C,
A mask pattern opening for forming the outer conductor film pattern 14 and the intermediate conductor film patterns 16A and 16B. As shown in FIG. 3, in the mask pattern, the outer shape of the portion 14 ′ for forming the outer conductor film pattern is set to be larger than the outer shape of the dielectric block 2 by d in both the X and Y directions. There is.
【００１８】従って、本実施例では、内側導体膜パター
ン１２Ａ，１２Ｂ，１２Ｃ、外側導体膜パターン１４及
び中間導体膜パターン１６Ａ，１６Ｂを形成するスクリ
ーン印刷の際に、マスクパターンと誘電体ブロック２と
の位置決めには、Ｘ方向及びＹ方向にいずれもｄだけ余
裕がある。なぜならば、マスクパターンと誘電体ブロッ
ク２との位置決めでｄ以下のずれが発生したとしても、
外側導体膜パターン１４と外導体８との接続は確保さ
れ、且つ外側導体膜パターン１４及び中間導体膜パター
ン１６Ａ，１６Ｂと内側導体膜パターン１２Ａ，１２
Ｂ，１２Ｃとの間の間隔は確実に所定値に維持されるの
で、図９の等価回路におけるＣ1 ，Ｃ2 ，Ｃ3 ，Ｍ1 ，
Ｍ2 の値はいずれも所望値に維持されるからである。Therefore, in this embodiment, when the inner conductor film patterns 12A, 12B and 12C, the outer conductor film pattern 14 and the intermediate conductor film patterns 16A and 16B are formed by screen printing, the mask pattern and the dielectric block 2 are removed. There is a margin of d in both the X direction and the Y direction for positioning. This is because even if a deviation of d or less occurs in the positioning between the mask pattern and the dielectric block 2,
The connection between the outer conductor film pattern 14 and the outer conductor 8 is ensured, and the outer conductor film pattern 14 and the intermediate conductor film patterns 16A and 16B and the inner conductor film patterns 12A and 12 are connected.
Since the distance between B and 12C is surely maintained at a predetermined value, C 1 , C 2 , C 3 , M 1 in the equivalent circuit of FIG.
This is because the value of M 2 is maintained at the desired value.
【００１９】図４は、以上の様な本発明実施例の誘電体
フィルタの周波数特性（透過特性）を示すものである。
比較のために、本発明実施例と同一のマスクパターン配
置誤差発生条件（即ち同一のずれ量）下で製造した図８
に示す従来の誘電体フィルタの周波数特性（透過特性）
を、図５に示す。これらの比較から分かる様に、本発明
実施例のものは、従来のものに比べて挿入損失が小さ
く、通過周波数帯域全体の均一性がよい。FIG. 4 shows frequency characteristics (transmission characteristics) of the dielectric filter of the embodiment of the present invention as described above.
For comparison, FIG. 8 manufactured under the same mask pattern placement error generation condition (that is, the same shift amount) as that of the embodiment of the present invention.
Frequency characteristics (transmission characteristics) of the conventional dielectric filter shown in
Is shown in FIG. As can be seen from these comparisons, the example of the present invention has a smaller insertion loss than the conventional example and has good uniformity in the entire pass frequency band.
【００２０】図６は上記本発明実施例の変形例を示す一
部切欠斜視図である。図６において、上記図１における
と同様の部材には同一の符号が付されている。本変形例
では、入力用電極１８Ａ及び出力用電極１８Ｂがブロッ
ク２の上面にまで延びており、これらがそれぞれ内側導
体膜パターン１２Ａ及び内側導体膜パターン１２Ｃと一
層接近して一層大きな容量結合を形成している。FIG. 6 is a partially cutaway perspective view showing a modification of the embodiment of the present invention. 6, the same members as those in FIG. 1 are designated by the same reference numerals. In this modification, the input electrode 18A and the output electrode 18B extend to the upper surface of the block 2, and these are closer to the inner conductor film pattern 12A and the inner conductor film pattern 12C, respectively, to form a larger capacitive coupling. is doing.
【００２１】図７は、本変形例の製造に際し使用される
マスクパターンと誘電体ブロックとの位置関係を示す図
である。図７において、上記図３におけると同様の部材
には同一の符号が付されている。このマスクパターン
は、図３のマスクパターンの開口部に加えて、入力用電
極１８Ａ及び出力用電極１８Ｂを形成するためのマスク
パターン開口部１８Ａ’，１８Ｂ’を有する。FIG. 7 is a diagram showing a positional relationship between a mask pattern and a dielectric block used in manufacturing this modification. 7, the same members as those in FIG. 3 are designated by the same reference numerals. This mask pattern has mask pattern openings 18A ′ and 18B ′ for forming the input electrode 18A and the output electrode 18B in addition to the openings of the mask pattern of FIG.
【００２２】尚、本発明における「略環状」とは、完全
に環形状であるものの外に、例えば上記実施例の外側導
体膜パターンの様に部分的に途切れているものをも含む
ものである。この途切れは、本発明の効果が達成される
程度のものであれば許容できるが、完全な環形状の５０
％以上、より好ましくは７５％以上、更に好ましくは８
５％以上の部分が存在することが望ましい。The term "substantially annular" as used in the present invention includes not only those having a complete annular shape but also those having a partial discontinuity such as the outer conductor film pattern of the above-mentioned embodiment. This discontinuity is acceptable as long as the effect of the present invention is achieved, but it is a perfect ring shape.
% Or more, more preferably 75% or more, and further preferably 8
It is desirable that there is a portion of 5% or more.
【００２３】[0023]
【発明の効果】以上説明した様に、本発明によれば、誘
電体ブロックの開放面にて略環状の外側導体膜パターン
を内側導体膜パターンとともに共通の版を用い同時に印
刷して形成することにより、印刷時の版と誘電体ブロッ
クとの位置ずれの許容量が大きくなり、厳しい精度を要
することなく容易に所望の良好な周波数特性のフィルタ
を得ることができる。As described above, according to the present invention, a substantially annular outer conductor film pattern is formed on the open surface of the dielectric block by printing simultaneously with the inner conductor film pattern using a common plate. As a result, the allowable amount of positional deviation between the plate and the dielectric block during printing becomes large, and it is possible to easily obtain a filter with desired desired frequency characteristics without requiring strict accuracy.
【図１】本発明の誘電体フィルタの一実施例を示す一部
切欠斜視図である。FIG. 1 is a partially cutaway perspective view showing an embodiment of a dielectric filter of the present invention.
【図２】図１の誘電体フィルタの製造過程における状態
を示す一部切欠斜視図である。2 is a partially cutaway perspective view showing a state in a manufacturing process of the dielectric filter of FIG. 1. FIG.
【図３】マスクパターンと誘電体ブロックとの位置関係
を示す図である。FIG. 3 is a diagram showing a positional relationship between a mask pattern and a dielectric block.
【図４】図１の誘電体フィルタの周波数特性図である。FIG. 4 is a frequency characteristic diagram of the dielectric filter of FIG.
【図５】従来の誘電体フィルタの周波数特性図である。FIG. 5 is a frequency characteristic diagram of a conventional dielectric filter.
【図６】図１の誘電体フィルタの変形例を示す一部切欠
斜視図である。6 is a partially cutaway perspective view showing a modified example of the dielectric filter of FIG.
【図７】マスクパターンと誘電体ブロックとの位置関係
を示す図である。FIG. 7 is a diagram showing a positional relationship between a mask pattern and a dielectric block.
【図８】従来の誘電体フィルタの一例を示す概略平面図
である。FIG. 8 is a schematic plan view showing an example of a conventional dielectric filter.
【図９】従来の誘電体フィルタの等価回路図である。FIG. 9 is an equivalent circuit diagram of a conventional dielectric filter.
２ 誘電体ブロック ４Ａ，４Ｂ，４Ｃ 貫通孔 ６Ａ，６Ｂ，６Ｃ 内導体 ８ 外導体 １０ 導体膜 １２Ａ，１２Ｂ，１２Ｃ 内側導体膜パターン １４ 外側導体膜パターン １６Ａ，１６Ｂ 中間導体膜パターン １８Ａ 入力用電極 １８Ｂ 出力用電極 ２０ マスクパターン 2 Dielectric Blocks 4A, 4B, 4C Through Holes 6A, 6B, 6C Inner Conductor 8 Outer Conductor 10 Conductor Film 12A, 12B, 12C Inner Conductor Film Pattern 14 Outer Conductor Film Pattern 16A, 16B Intermediate Conductor Film Pattern 18A Input Electrode 18B Output electrode 20 Mask pattern
───────────────────────────────────────────────────── フロントページの続き (72)発明者 上田 克史 山口県宇部市大宇小串1978番地の５ 宇部 興産株式会社無機材料研究所内 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Katsushi Ueda 5 1978, Ou Kogushi, Ube City, Yamaguchi Prefecture Ube Industries Ltd. Inorganic Materials Research Center
Claims (4)
形成し、各貫通孔の内面に導体膜を形成して内導体と
し、前記誘電体ブロックの内導体と交わらない外面に導
体膜を形成して外導体とし、前記貫通孔が開口せる前記
誘電体ブロックの２つの外面のうちの一方に導体膜を形
成して前記内導体と前記外導体とを短絡させ、前記貫通
孔が開口せる前記誘電体ブロックの２つの外面のうちの
他方には各内導体と接続せる略環状の内側導体膜パター
ンを形成するとともに前記外導体と接続せる略環状の外
側導体膜パターンを形成してなることを特徴とする、誘
電体フィルタ。1. A plurality of parallel through holes are formed in a dielectric block, a conductor film is formed on an inner surface of each through hole to form an inner conductor, and a conductor film is formed on an outer surface which does not intersect with the inner conductor of the dielectric block. An outer conductor is formed so that the through hole can be opened. A conductor film is formed on one of the two outer surfaces of the dielectric block to short-circuit the inner conductor and the outer conductor to open the through hole. On the other of the two outer surfaces of the dielectric block, a substantially annular inner conductor film pattern that is connected to each inner conductor is formed, and a substantially annular outer conductor film pattern that is connected to the outer conductor is formed. A dielectric filter characterized by:
クの２つの外面のうちの他方には、隣接する２つの前記
略環状の内側導体膜パターンの間に、前記略環状の外側
導体膜パターンの対向部分間を接続せる中間導体膜パタ
ーンを形成してなることを特徴とする、請求項１に記載
の誘電体フィルタ。2. The substantially annular outer conductor film pattern is provided between two adjacent substantially annular inner conductor film patterns on the other of the two outer surfaces of the dielectric block in which the through holes are opened. 2. The dielectric filter according to claim 1, wherein an intermediate conductor film pattern is formed to connect between the opposing portions of.
形成し、各貫通孔の内面に導体膜を形成して内導体と
し、前記誘電体ブロックの内導体と交わらない外面に導
体膜を形成して外導体とし、前記貫通孔が開口せる前記
誘電体ブロックの２つの外面のうちの一方に導体膜を形
成して前記内導体と前記外導体とを短絡させ、前記貫通
孔が開口せる前記誘電体ブロックの２つの外面のうちの
他方には各内導体と接続せる略環状の内側導体膜パター
ンを形成するとともに前記外導体と接続せる略環状の外
側導体膜パターンを形成してなる誘電体フィルタを製造
する方法において、 前記略環状の内側導体膜パターン及び前記略環状の外側
導体膜パターンを共通の版を用い同時に印刷して形成す
ることを特徴とする、誘電体フィルタの製造方法。3. A plurality of parallel through holes are formed in a dielectric block, a conductor film is formed on an inner surface of each through hole to form an inner conductor, and a conductor film is formed on an outer surface which does not intersect with the inner conductor of the dielectric block. An outer conductor is formed so that the through hole can be opened. A conductor film is formed on one of the two outer surfaces of the dielectric block to short-circuit the inner conductor and the outer conductor to open the through hole. A dielectric formed by forming a substantially annular inner conductor film pattern connected to each inner conductor on the other of the two outer surfaces of the dielectric block and forming a substantially annular outer conductor film pattern connected to the outer conductor. A method of manufacturing a body filter, comprising: forming the substantially annular inner conductor film pattern and the substantially annular outer conductor film pattern by printing simultaneously using a common plate.
記略環状の外側導体膜パターンを形成する際に、更に前
記略環状の外側導体膜パターンの対向部分間を接続せる
中間導体膜パターンを形成し、前記内側導体膜パターン
及び前記外側導体膜パターンならびに前記中間導体膜パ
ターンを共通の版を用い同時に印刷して形成することを
特徴とする、請求項３に記載の誘電体フィルタの製造方
法。4. When forming the substantially annular inner conductor film pattern and the substantially annular outer conductor film pattern, an intermediate conductor film pattern is formed which further connects opposing portions of the substantially annular outer conductor film pattern. 4. The method for producing a dielectric filter according to claim 3, wherein the inner conductor film pattern, the outer conductor film pattern, and the intermediate conductor film pattern are simultaneously printed using a common plate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2164793A JPH06216607A (en) | 1993-01-18 | 1993-01-18 | Dielectric filter and manufacture therefor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2164793A JPH06216607A (en) | 1993-01-18 | 1993-01-18 | Dielectric filter and manufacture therefor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06216607A true JPH06216607A (en) | 1994-08-05 |
Family
ID=12060851
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2164793A Pending JPH06216607A (en) | 1993-01-18 | 1993-01-18 | Dielectric filter and manufacture therefor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06216607A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6597263B2 (en) * | 2000-01-19 | 2003-07-22 | Electronics And Telecommunications Research Institute | Dielectric filter having notch pattern |
| US8261714B2 (en) | 2007-12-10 | 2012-09-11 | Cts Corporation | RF monoblock filter with outwardly extending wall to define a cavity surrounding a top surface of the filter |
| US8269579B2 (en) | 2008-09-18 | 2012-09-18 | Cts Corporation | RF monoblock filter having an outwardly extending wall for mounting a lid filter thereon |
| US8294532B2 (en) | 2008-12-09 | 2012-10-23 | Cts Corporation | Duplex filter comprised of dielectric cores having at least one wall extending above a top surface thereof for isolating through hole resonators |
| US9030272B2 (en) | 2010-01-07 | 2015-05-12 | Cts Corporation | Duplex filter with recessed top pattern and cavity |
| US9030276B2 (en) | 2008-12-09 | 2015-05-12 | Cts Corporation | RF monoblock filter with a dielectric core and with a second filter disposed in a side surface of the dielectric core |
| US9030275B2 (en) | 2008-12-09 | 2015-05-12 | Cts Corporation | RF monoblock filter with recessed top pattern and cavity providing improved attenuation |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02166802A (en) * | 1988-10-31 | 1990-06-27 | Motorola Inc | Ceramic filter having |
-
1993
- 1993-01-18 JP JP2164793A patent/JPH06216607A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02166802A (en) * | 1988-10-31 | 1990-06-27 | Motorola Inc | Ceramic filter having |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6597263B2 (en) * | 2000-01-19 | 2003-07-22 | Electronics And Telecommunications Research Institute | Dielectric filter having notch pattern |
| US8261714B2 (en) | 2007-12-10 | 2012-09-11 | Cts Corporation | RF monoblock filter with outwardly extending wall to define a cavity surrounding a top surface of the filter |
| US8269579B2 (en) | 2008-09-18 | 2012-09-18 | Cts Corporation | RF monoblock filter having an outwardly extending wall for mounting a lid filter thereon |
| US8294532B2 (en) | 2008-12-09 | 2012-10-23 | Cts Corporation | Duplex filter comprised of dielectric cores having at least one wall extending above a top surface thereof for isolating through hole resonators |
| US9030276B2 (en) | 2008-12-09 | 2015-05-12 | Cts Corporation | RF monoblock filter with a dielectric core and with a second filter disposed in a side surface of the dielectric core |
| US9030275B2 (en) | 2008-12-09 | 2015-05-12 | Cts Corporation | RF monoblock filter with recessed top pattern and cavity providing improved attenuation |
| US9030272B2 (en) | 2010-01-07 | 2015-05-12 | Cts Corporation | Duplex filter with recessed top pattern and cavity |
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