JPH06216507A - Solder precoated circuit board - Google Patents

Solder precoated circuit board

Info

Publication number
JPH06216507A
JPH06216507A JP2164693A JP2164693A JPH06216507A JP H06216507 A JPH06216507 A JP H06216507A JP 2164693 A JP2164693 A JP 2164693A JP 2164693 A JP2164693 A JP 2164693A JP H06216507 A JPH06216507 A JP H06216507A
Authority
JP
Japan
Prior art keywords
solder
pad
component
length
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2164693A
Other languages
Japanese (ja)
Inventor
Kazuto Hikasa
和人 日笠
Takao Fukunaga
隆男 福永
Satoshi Kumamoto
聖史 隈元
Takahiro Fujiwara
孝浩 藤原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Furukawa Electric Co Ltd
Harima Chemical Inc
Original Assignee
Furukawa Electric Co Ltd
Harima Chemical Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Furukawa Electric Co Ltd, Harima Chemical Inc filed Critical Furukawa Electric Co Ltd
Priority to JP2164693A priority Critical patent/JPH06216507A/en
Publication of JPH06216507A publication Critical patent/JPH06216507A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3421—Leaded components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof

Abstract

PURPOSE:To allow highly reliable component mounting by permitting the shape of a pad to have a wide part in the longitudinal direction. CONSTITUTION:The expressions I and II are satisfied, when L2 is the length of the wide part 2a of a pad 2, (x1, y1) is the center position of 2a, F is the length of the flat part of the lead 4 of a component to be mounted and (x2, y2) is the center position of the flat part. The expression I is the condition that positions the center in the lengthwide direction of the pad wide part 2a within a range of the length of the flat part of the lead 4, and such condition allows sure contact of the summit of a solder top 3a with the flat part of the component lead 4. The expression II is the condition that allows the length of the pad wide part 2a to be longer than the length of the flat part of the component lead 4 by 0.1-0.3mm, and the condition allows the formation of a solder fillet suitable for the top and the heel of the component lead 4. Thus highly reliable component mounting is allowed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明は、パッド上に部品リード
のはんだ付けに必要な厚さのはんだ層を有するはんだプ
リコート回路基板に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solder precoated circuit board having a solder layer having a thickness necessary for soldering component leads on a pad.

【０００２】[0002]

【従来の技術】従来、回路基板に表面実装部品を実装す
るには、パッド上に印刷方式によりクリームはんだをコ
ートした後、その上に部品のリードを載せ、その後加熱
してクリームはんだを溶融させることによりはんだ付け
している。しかし最近、部品リードの配列ピッチの微細
化に伴い、パッドの配列ピッチも微細化してきており、
パッドの配列ピッチが0.5 mmより小さくなると、クリー
ムはんだの印刷が困難になり、ブリッジ等のはんだ付け
不良が多発するという問題が生じている。2. Description of the Related Art Conventionally, in order to mount a surface mount component on a circuit board, a cream solder is coated on a pad by a printing method, a component lead is placed on the coat, and then the cream solder is melted by heating. It is soldered by this. However, recently, along with the miniaturization of the component lead arrangement pitch, the pad arrangement pitch has also become smaller,
If the pad arrangement pitch is less than 0.5 mm, it becomes difficult to print the cream solder, and soldering defects such as bridges frequently occur.

【０００３】またＴＡＢ等のファインパターン部品の回
路基板への実装方法としては、パッド上に電解メッキま
たは無電解メッキによりはんだ層を形成し、その上に部
品のリードを載せ、その上から加熱治具等を押しつけて
はんだ付けするいわゆるギャングボンディング法も公知
である。しかしこの方法ははんだ層の形成に問題があ
る。すなわち電解メッキによりはんだ層を形成するため
には各パッドに通電用の配線を引き回す必要があり、回
路高密度化の妨げとなるだけでなく、その配線の形成と
除去が面倒であり、またはんだ層をある程度厚く形成す
るためにはメッキ処理に時間がかかる。As a method of mounting fine pattern components such as TAB on a circuit board, a solder layer is formed on the pad by electrolytic plating or electroless plating, and the leads of the component are placed on the solder layer, and the heat treatment is applied from there. A so-called gang bonding method of pressing a tool or the like for soldering is also known. However, this method has a problem in forming the solder layer. That is, in order to form a solder layer by electrolytic plating, it is necessary to lay wiring for energization to each pad, which not only hinders circuit densification, but is troublesome to form and remove the wiring. The plating process takes time to form the layer to a certain extent.

【０００４】一方無電解メッキでは、はんだ層を厚く形
成することが困難であり、0.5 mm未満の微細なピッチの
ＱＦＰ（クワッドフラットパッケージ）やＴＣＰ（テー
プキァリアパッケージ）等と、従来の部品との一括リフ
ロー接合による部品リードのはんだ付けに必要な厚さの
はんだ層を実用レベルで形成することはできない。On the other hand, in electroless plating, it is difficult to form a thick solder layer, and a fine pitch of less than 0.5 mm, such as a QFP (quad flat package) or TCP (tape carrier package), and a conventional component are used. It is not possible to form a solder layer having a thickness necessary for soldering component leads by batch reflow bonding at a practical level.

【０００５】また回路基板のパッド上にはんだ層を形成
する方法として、はんだ合金成分のうちイオン化傾向の
小さい金属の有機酸塩（例えば有機酸鉛塩）とイオン化
傾向の大きい金属の粉末（例えば錫粉）との置換反応を
利用する方法が公知である（特開平1-157796号公報
等）。Further, as a method of forming a solder layer on a pad of a circuit board, an organic acid salt of a metal having a low ionization tendency (for example, a lead salt of an organic acid) and a powder of a metal having a high ionization tendency (for example, tin) among solder alloy components. A method utilizing a substitution reaction with (powder) is known (JP-A-1-157796, etc.).

【０００６】この方法は、例えば有機酸鉛塩と錫粉を主
成分とするペースト状はんだ析出組成物を回路基板のパ
ッド領域にベタ塗り状に塗布して、加熱すると、有機酸
鉛塩と錫粉の置換反応によりパッド上にはんだ合金が選
択的に析出するという現象を利用したものである。この
方法によると、パッドの配列ピッチが0.5 mm未満でも、
ブリッジを生じさせることなく、しかも短時間ではんだ
層を形成することができる。In this method, for example, when a paste solder deposition composition containing an organic acid lead salt and tin powder as main components is applied to a pad area of a circuit board in a solid coating and heated, the organic acid lead salt and tin are applied. It utilizes the phenomenon that the solder alloy is selectively deposited on the pad due to the powder substitution reaction. According to this method, even if the pad pitch is less than 0.5 mm,
The solder layer can be formed in a short time without causing a bridge.

【０００７】[0007]

【発明が解決しようとする課題】しかしこの方法は、有
機酸鉛塩と錫粉との置換反応によりパッド上にはんだを
析出させるものであるため、析出するはんだ層の形状が
パッドの形状に大きく左右される。例えば図６のように
パッド２の長手方向に均一な厚さのはんだ層３を形成し
ようとすると、そのはんだ層３の厚さはパッド幅Ｗの
0.1〜0.3 倍の厚さに制限される。However, in this method, since the solder is deposited on the pad by the substitution reaction of the organic acid lead salt and the tin powder, the shape of the deposited solder layer is large in the shape of the pad. It depends. For example, when the solder layer 3 having a uniform thickness is formed in the longitudinal direction of the pad 2 as shown in FIG. 6, the thickness of the solder layer 3 is equal to the pad width W.
Limited to 0.1 to 0.3 times the thickness.

【０００８】その理由は溶融したはんだの表面張力に起
因している。すなわち、はんだ層の厚さをパッド幅Ｗの
0.1倍以下にすべくペースト状はんだ析出組成物の供給
量を少なくしてパッド上にはんだを析出させると、表面
張力によりはんだ層がパッド長手方向でいくつかに分割
されてしまい、いわゆる「くびれ」が発生する。また、
はんだ層の厚さをパッド幅Ｗの 0.3倍以上にすべくペー
スト状はんだ析出組成物の供給量を多くしてパッド上に
はんだを析出させると、図７に示すようにパッド２のア
トランダムな箇所に局部的にはんだ層の厚さの厚い部分
Ａができてしまい、いわゆる「ふくれ」が発生する。こ
れらのはんだ層の厚さのバラツキは部品実装時にリード
浮き（オープン不良）等が発生する原因となる。The reason is due to the surface tension of the molten solder. That is, the thickness of the solder layer
When the amount of the paste-like solder deposition composition supplied is reduced to 0.1 times or less to deposit the solder on the pad, the surface tension causes the solder layer to be divided into several parts in the longitudinal direction of the pad, so-called "constriction". Occurs. Also,
When the amount of the paste-like solder deposition composition supplied was increased to deposit the solder on the pad in order to make the thickness of the solder layer 0.3 times or more the pad width W, as shown in FIG. A portion A where the thickness of the solder layer is thick is locally formed at a location, and so-called "blister" occurs. Variations in the thickness of these solder layers cause lead floating (open defects) during component mounting.

【０００９】一方、高密度実装回路基板への微細ピッチ
(0.5mmピッチ未満) 部品の接合方法としては、ＴＡＢ等
で用いられているギャングボンディング（ヒートツール
による熱圧着）法が一般的である。また最近ではレーザ
ーによる接合も試みられている。しかしこれらの接合方
法は個別実装方式であるため、微細ピッチ部品と従来の
通常ピッチ部品を混載する場合には、それらを別々の方
式（例えば前者はヒートツール、後者はリフロー炉）で
加熱接合する必要が生じ、設備コストがかかり、また製
造工程が煩雑になる欠点があった。On the other hand, fine pitch for high density mounting circuit boards
(Less than 0.5 mm pitch) As a method for joining components, a gang bonding (thermocompression bonding with a heat tool) method used in TAB and the like is generally used. Recently, laser bonding has been attempted. However, since these joining methods are individual mounting methods, when fine pitch components and conventional normal pitch components are mixedly mounted, they are heated and joined by separate methods (for example, the former is a heat tool, the latter is a reflow furnace). However, there are drawbacks such as a necessity, an increase in equipment cost, and a complicated manufacturing process.

【００１０】このため微細ピッチ部品と通常ピッチ部品
を一括してリフロー炉で加熱し、はんだ付けする方法が
提唱されている。この方式は、回路基板の微細ピッチ部
品搭載用パッドにははんだをプリコートしておき、他の
従来部品搭載用パッドにはクリームはんだを印刷し、全
部品を搭載した後、一括してリフロー炉等で加熱、接合
するものである。この場合、微細ピッチ部品搭載用パッ
ドには予め部品リードのＺ軸方向（高さ方向）のバラツ
キ以上の厚さのはんだをコートしておかなければ、はん
だが溶融して部品リードがはんだ中に沈み込んでも、は
んだに接触しないリードが残り、オープン不良が発生す
る。For this reason, a method has been proposed in which a fine pitch component and a normal pitch component are collectively heated in a reflow furnace and soldered. In this method, solder is pre-coated on the pads for mounting fine-pitch components on the circuit board, cream solder is printed on the pads for mounting other conventional components, and after mounting all components, the reflow furnace etc. It heats and bonds with. In this case, if the solder for the fine pitch component mounting pad is not coated in advance with a thickness equal to or more than the variation of the component leads in the Z-axis direction (height direction), the solder will be melted and the component leads will be in the solder. Even if it sinks, the leads that do not come into contact with the solder remain and open defects occur.

【００１１】ところが部品が微細化するにつれてパッド
幅Ｗはますます小さくなっているため、前述したはんだ
層の厚さの上限（パッド幅の 0.3倍）以内でははんだの
量が少なすぎて、全てのリードを確実にはんだ接合する
こと（オープン不良をなくすこと）ができないという問
題がある。仮に、前述したはんだ層の厚さの上限（パッ
ド幅の 0.3倍）以上にすべく、ペースト状はんだ析出組
成物の供給量を多くしてパッド上にはんだを析出させる
と、図７のようにパッド３のアトランダムな箇所に局部
的にはんだ層の厚い部分（ふくれ）Ａができてしまい、
リードと接触しないパッドが発生してオープン不良の原
因となる。However, since the pad width W becomes smaller and smaller as the parts become finer, the amount of solder is too small within the upper limit of the thickness of the solder layer (0.3 times the pad width), and all There is a problem that the leads cannot be soldered securely (elimination of open defects). If the amount of the paste-like solder deposition composition supplied is increased to deposit the solder on the pad in order to increase the thickness of the solder layer to the upper limit (0.3 times the pad width) or more, as shown in FIG. A thick solder layer portion (blister) A is locally formed at an at random portion of the pad 3,
Pads that do not come into contact with the leads are generated, which causes open defects.

【００１２】[0012]

【課題を解決するための手段とその作用】上記のような
課題を解決するには図２に示すように、パッド２の形状
を、長手方向の一部に幅広部２ａを有するような形状に
することが有効である。このようにすると、幅広部２ａ
に他の部分よりはんだ層３の厚さが厚い、はんだ盛り上
がり部３ａ（図１参照）を形成することが可能となり、
部品リードの高さ方向のバラツキより大きい厚さのはん
だ層３を容易に形成できる。なお図において符号１は絶
縁基板である。[Means for Solving the Problem and Its Action] In order to solve the above problems, as shown in FIG. 2, the pad 2 is formed into a shape having a wide portion 2a in a part in the longitudinal direction. It is effective to do. In this way, the wide portion 2a
It is possible to form the solder rising portion 3a (see FIG. 1) in which the solder layer 3 is thicker than other portions,
It is possible to easily form the solder layer 3 having a thickness larger than the variation in the height direction of the component leads. In the figure, reference numeral 1 is an insulating substrate.

【００１３】しかし部品リード４が接触するのははんだ
盛り上がり部３ａの頂部であるから、パッド２の長手方
向の一部に幅広部２ａを形成した場合でも、はんだ盛り
上がり部３ａの頂部の位置によっては部品リード４がは
んだ層３に接触しない場合も起こり得る。また、はんだ
盛り上がり部３ａを形成できても、例えばその長さが短
いと図３に示すように部品リード４のトップとヒールが
はんだ３のフィレットから浮いているような不安定なは
んだ付け状態になってしまう。However, since the component lead 4 comes into contact with the top of the solder protrusion 3a, even if the wide portion 2a is formed in a part of the pad 2 in the longitudinal direction, it depends on the position of the top of the solder protrusion 3a. It may happen that the component lead 4 does not contact the solder layer 3. Even if the solder protrusion 3a can be formed, if the length thereof is short, for example, the top and heel of the component lead 4 are floated from the fillet of the solder 3 as shown in FIG. turn into.

【００１４】そこで、パッドの長手方向の一部に幅広部
を形成した上で、図４に示すように部品リード４のトッ
プとヒールにはんだ３のフィレットができるような良好
なはんだ付け状態を得るための条件を検討した。その結
果、次のようにすればよいことが分かった。すなわち、
図１および図２のように座標を定め、パッド２の幅広部
２ａの長さをＬ2 、中心位置を（ｘ1 ，ｙ1 ）、搭載さ
れる部品のリード４の平坦部の長さをＦ、中心位置を
（ｘ2 ，ｙ2 ）としたとき、次の２式を満足すればよ
い。Therefore, after forming a wide portion in a part of the pad in the longitudinal direction, a good soldering state is obtained in which fillets of the solder 3 are formed on the top and heel of the component lead 4 as shown in FIG. The conditions for this were examined. As a result, it was found that the following should be done. That is,
The coordinates are determined as shown in FIGS. 1 and 2, the length of the wide portion 2a of the pad 2 is L 2 , the center position is (x 1 , y 1 ), and the length of the flat portion of the lead 4 of the mounted component is When F and the center position are (x 2 , y 2 ), the following two expressions may be satisfied.

【００１５】[0015]

【数１】ｙ2 −Ｆ／２＜ｙ1 ＜ｙ2 ＋Ｆ／２[Formula 1] y 2 −F / 2 <y 1 <y 2 + F / 2

【００１６】[0016]

【数２】Ｆ＋0.1 ≦Ｌ2 ≦Ｆ＋0.3 （mm）[Equation 2] F + 0.1 ≦ L 2 ≦ F + 0.3 (mm)

【００１７】はんだ盛り上がり部の頂部は表面張力の関
係からパッド幅広部のほぼ中心位置にできる。数式１は
パッド幅広部２ａの長さ方向の中心を部品リード４の平
坦部の長さの範囲内に位置させる条件であり、このよう
にすればはんだ盛り上がり部３ａの頂部が部品リード４
の平坦部に確実に接触することになる。Due to the surface tension, the top of the solder bulge can be located approximately at the center of the wide pad area. Formula 1 is a condition that the center in the length direction of the wide pad portion 2a is positioned within the range of the length of the flat portion of the component lead 4. In this way, the top of the solder rising portion 3a is located on the component lead 4a.
Will surely contact the flat part of the.

【００１８】また数式２はパッド幅広部２ａの長さを部
品リード４の平坦部の長さより 0.1〜0.3 mm長くすると
いう条件であり、このようにすれば部品リード４のトッ
プとヒールに図４のような良好なはんだフィレットを形
成することが可能となる。パッド幅広部２ａの長さＬ2
がＦ＋0.1 mm未満になると、はんだフィレットの形状が
図３のようになる可能性があり、またＦ＋0.3 mmより大
きくなるとはんだ盛り上がり部の頂部の位置が安定しな
くなる。Formula 2 is a condition that the length of the wide pad portion 2a is set to be 0.1 to 0.3 mm longer than the length of the flat portion of the component lead 4. By doing so, the top and heel of the component lead 4 can be formed as shown in FIG. It is possible to form a good solder fillet such as Length L 2 of wide pad 2a
Is less than F + 0.1 mm, the shape of the solder fillet may be as shown in FIG. 3, and if it is greater than F + 0.3 mm, the position of the top of the solder bulge becomes unstable.

【００１９】[0019]

【実施例】以下、本発明の実施例を詳細に説明する。0.
3 mmピッチのＳＱＦＰ型部品を実装するため、図５のよ
うな銅パッド２を有する回路基板で、パッド２の寸法
（Ｌ1 、Ｌ2 、Ｌ3 、Ｗ1 、Ｗ2 、Ｗ3 ）が異なる７種
類のサンプル（No１〜７）を製作した。各サンプルのパ
ッド２の寸法（単位mm）は表１のとおりである。EXAMPLES Examples of the present invention will be described in detail below. 0.
In order to mount an SQFP type component with a pitch of 3 mm, a circuit board having a copper pad 2 as shown in FIG. 5 has the dimensions (L 1 , L 2 , L 3 , W 1 , W 2 , W 3 ) of the pad 2. Seven different types of samples (No. 1 to 7) were manufactured. Table 1 shows the dimensions (unit: mm) of the pad 2 of each sample.

【００２０】[0020]

【表１】 [Table 1]

【００２１】なお搭載するＳＱＦＰ型部品のリードの平
坦部の長さＦ＝ 0.5mmである。したがって数式１を満足
するのはNo１〜４、数式２を満足するのはNo２、３、
５、６、両方を満足するのはNo２、３である。The flat portion of the lead of the SQFP type component to be mounted has a length F = 0.5 mm. Therefore, the numbers 1 to 4 satisfy the formula 1, and the numbers 2 and 3 satisfy the formula 2.
No. 2 and 3 satisfy both 5 and 6.

【００２２】表１に示す各サンプルNo１〜７のパッド配
列部に有機酸鉛塩と錫粉を主成分とするペースト状はん
だ析出組成物を塗布し、加熱して、各パッドに部品リー
ドの高さ方向のバラツキより大きい厚さのはんだ層を形
成した。その後、前記ＳＱＦＰ型部品を搭載し、リフロ
ー炉にて加熱して、パッドとリードのはんだ付けを行っ
た。その結果を表２に示す。A paste-like solder deposition composition containing an organic acid lead salt and tin powder as main components was applied to the pad arrangement portion of each sample No. 1 to 7 shown in Table 1 and heated to increase the height of the component lead on each pad. A solder layer having a thickness larger than the variation in the depth direction was formed. Then, the SQFP type component was mounted and heated in a reflow furnace to solder the pad and the lead. The results are shown in Table 2.

【００２３】[0023]

【表２】 [Table 2]

【００２４】このようにパッド形状を数式１、２を満足
する形状にすると（つまり、パッド幅広部の長さ方向の
中心を部品リードの平坦部の長さの範囲内に位置させ、
パッド幅広部の長さを部品リードの平坦部の長さより
0.1〜0.3 mm長くすると）、はんだ盛り上がり部の頂部
が部品リードの平坦部と確実に接触し、オープン不良を
なくすことができると共に、部品リードのトップ、ヒー
ルに良好なはんだフィレットが形成され、良好なはんだ
付け状態を得ることができる。As described above, when the pad shape is made to satisfy the equations 1 and 2, (that is, the center of the pad wide portion in the length direction is positioned within the range of the flat portion of the component lead,
Compare the length of the wide pad with the length of the flat part of the component lead.
0.1 to 0.3 mm longer), the top of the solder bulge will make sure contact with the flat part of the component lead, eliminating open defects and forming a good solder fillet on the top and heel of the component lead. A good soldering state can be obtained.

【００２５】[0025]

【発明の効果】以上説明したように本発明によれば、回
路基板のパッド上に部品リードのはんだ付けに必要な厚
さのはんだ盛り上がり部を有するはんだ層を、はんだ盛
り上がり部の頂部が部品リード平坦部と確実に接触する
ように形成できるので、オープン不良のない、はんだフ
ィレット形状の良好な、信頼性の高い部品実装を行える
利点がある。As described above, according to the present invention, a solder layer having a solder swelling portion having a thickness necessary for soldering a component lead is provided on a pad of a circuit board, and the top of the solder swelling portion is a component lead. Since it can be formed so as to be surely in contact with the flat portion, there is an advantage that it is possible to mount a component with no open defect, good solder fillet shape, and high reliability.

【図面の簡単な説明】[Brief description of drawings]

【図１】 本発明の一実施例に係るはんだプリコート回
路基板のパッド部分を示す正面図。FIG. 1 is a front view showing a pad portion of a solder pre-coated circuit board according to an embodiment of the present invention.

【図２】 図１のはんだプリコート回路基板のパッドの
形状を示す平面図。FIG. 2 is a plan view showing a shape of a pad of the solder precoat circuit board shown in FIG.

【図３】 部品リードとパッドの不安定なはんだ付け状
態を示す正面図。FIG. 3 is a front view showing an unstable soldering state of component leads and pads.

【図４】 部品リードとパッドの良好なはんだ付け状態
を示す正面図。FIG. 4 is a front view showing a good soldering state of component leads and pads.

【図５】 本発明の実施例で使用した回路基板のパッド
の配列状態を示す平面図。FIG. 5 is a plan view showing an arrangement state of pads of the circuit board used in the embodiment of the present invention.

【図６】 従来のはんだプリコート回路基板のパッド部
分を示す斜視図。FIG. 6 is a perspective view showing a pad portion of a conventional solder precoat circuit board.

【図７】 従来のはんだプリコート回路基板のパッドに
過剰のはんだが供給された場合を示す斜視図。FIG. 7 is a perspective view showing a case where excessive solder is supplied to pads of a conventional solder precoat circuit board.

【符号の説明】[Explanation of symbols]

１：絶縁基板 ２：パッド ２ａ：幅広部 ３：はんだ層 ３ａ：はんだ盛り上がり部 ４：部品リード 1: Insulating substrate 2: Pad 2a: Wide part 3: Solder layer 3a: Solder rising part 4: Component lead

───────────────────────────────────────────────────── フロントページの続き (72)発明者 隈元 聖史 兵庫県加古川市野口町水足671番地の４ ハリマ化成株式会社中央研究所内 (72)発明者 藤原 孝浩 兵庫県加古川市野口町水足671番地の４ ハリマ化成株式会社中央研究所内 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Satoshi Kumamoto 4 671 Mizumizu, Noguchi-cho, Kakogawa-shi, Hyogo Prefecture 4 at Harima Kasei Co., Ltd. (72) Inventor Takahiro Fujiwara 671 Mizuzuchi, Noguchi-cho, Kakogawa-shi, Hyogo No. 4 Harima Kasei Co., Ltd. Central Research Laboratory

Claims (1)

【特許請求の範囲】[Claims] 【請求項１】パッド上に部品リードのはんだ付けに必要
な厚さのはんだ層をプリコートしたはんだプリコート回
路基板において、パッドの幅をパッド長手方向の一部で
広くし、そのパッド幅広部の長さ方向の中心を部品リー
ドの平坦部の長さの範囲内に位置させると共に、パッド
幅広部の長さを部品リードの平坦部の長さより 0.1〜0.
3 mm長くし、パッド幅広部に他の部分よりはんだ層の厚
さが厚いはんだ盛り上がり部を形成したことを特徴とす
るはんだプリコート回路基板。1. In a solder precoated circuit board in which a solder layer having a thickness required for soldering of component leads is precoated on the pad, the width of the pad is widened in a part of the pad longitudinal direction, and the length of the wide pad portion is increased. The center in the depth direction is located within the length of the flat part of the component lead, and the length of the wide pad part is 0.1 to 0 from the length of the flat part of the component lead.
A solder pre-coated circuit board that is 3 mm longer and has a solder bump portion in which the solder layer is thicker than other portions in the wide pad portion.
JP2164693A 1993-01-18 1993-01-18 Solder precoated circuit board Pending JPH06216507A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2164693A JPH06216507A (en) 1993-01-18 1993-01-18 Solder precoated circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2164693A JPH06216507A (en) 1993-01-18 1993-01-18 Solder precoated circuit board

Publications (1)

Publication Number Publication Date
JPH06216507A true JPH06216507A (en) 1994-08-05

Family

ID=12060825

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2164693A Pending JPH06216507A (en) 1993-01-18 1993-01-18 Solder precoated circuit board

Country Status (1)

Country Link
JP (1) JPH06216507A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006277970A (en) * 2005-03-28 2006-10-12 Mitsumi Electric Co Ltd Secondary battery protection module and lead mounting method
US8125789B2 (en) 2007-03-12 2012-02-28 Fujitsu Semiconductor Limited Wiring substrate and electronic device
CN107309571A (en) * 2017-08-08 2017-11-03 深圳市亿铖达工业有限公司 A kind of preformed soldering

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006277970A (en) * 2005-03-28 2006-10-12 Mitsumi Electric Co Ltd Secondary battery protection module and lead mounting method
US8125789B2 (en) 2007-03-12 2012-02-28 Fujitsu Semiconductor Limited Wiring substrate and electronic device
CN107309571A (en) * 2017-08-08 2017-11-03 深圳市亿铖达工业有限公司 A kind of preformed soldering

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