JPH06205297A - Infrared ray sensor - Google Patents

Abstract

PURPOSE:To eliminate a dark current component and a background radiation component of an output of the infrared ray sensor inside of the infrared ray sensor. CONSTITUTION:The infrared ray sensor is provided both with picture elements consisting of photodiodes 4 generating a charge in response to a strength of an incident infrared ray, dummy picture elements 8 consisting of photo diodes generating an entirely independent dummy signal via a vertical CCD 10 not based on the charge quantity generated from each picture element by only one line other than a light receiving area 1 on which all picture elements are arranged with respect to the picture elements arranged in a matrix shape and with an amplifier 14 amplifying the dummy signal, and also is provided with a differential amplifier 15 detecting a difference between the signal outputted from the amplifier 14 and a signal outputted from a horizontal CCD 3 based on the charge from the photodiode 4 via the vertical CCDs 6, 11.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an infrared detector, and more particularly to an infrared detector using a solid-state image pickup device.

[0002]

2. Description of the Related Art In a conventional infrared detector in which pixels generating electric charges according to the intensity of infrared rays are arranged in a two-dimensional matrix, signals output from each pixel are dark current components, background radiation components, It is mainly the sum of three components, that is, an increasing component according to the intensity of incident infrared rays. These three components cannot be separated and taken out to the outside, and the increasing component corresponding to the incident infrared intensity required to obtain an infrared image is extremely smaller than the dark current component and background radiation component. . Therefore, in order to improve the dynamic range of this signal output from each pixel, this signal is clamped outside the infrared detector at an appropriate DC level of the output signal, and this clamp level and the sampled level of the output signal are clamped. The difference was detected and imaged.

Further, in a conventional infrared detector using a MOS type image sensor, a photodiode of each pixel is connected in parallel with a light-shielded photodiode, and a series circuit composed of a switch element and a capacitive element is connected thereto. Then
The difference between the output of the photodiode of each pixel and the output of the shielded photodiode is detected.

Next, an example of an infrared detector using a conventional MOS image sensor will be described with reference to the drawings.

FIG. 3 is a circuit diagram showing an example of a MOS type image sensor disclosed in Japanese Patent Laid-Open No. 63-161784.

In FIG. 3, first, the detection cell X1 will be described.

The cathode of the photodiode PD1 is MO
It is connected to the source of an S-FET (hereinafter referred to as a transistor) FT2 (enhancement type), and the anode of the photodiode PD1 is grounded. Then, a positive reference voltage V is applied to the drain of the transistor FT2.
ref is being applied. In addition, the photodiode PD1
Is connected to the source of the transistor FT1 (enhancement type), the drain of the transistor FT1 is connected to the capacitive element C1, and the other terminal of the capacitive element C1 is grounded. This capacitive element C1 is a MOS
Type capacitive element. This transistor FT
1 and the capacitive element C1 form a series circuit, and the series circuit is connected between both terminals of the photodiode PD1.

The anode of the capacitive element C1 is connected to the source of the transistor FT3 (enhancement type), and the reference voltage Vref is applied to the drain of the transistor FT3. Furthermore, the capacitive element C
The anode of 1 is a transistor F that constitutes the sense amplifier A1.
Connected to the gate of T4 (enhancement type),
The voltage Vref is applied to the drain of the transistor FT4, and the source thereof is connected to the drain of the transistor FT6 forming the load resistance. Transistor F
The source of T6 is connected to the drain of the transistor FT7, and the source of the transistor FT7 is grounded. A stable voltage is applied to the gates of both transistors FT6 and FT7. The source of the transistor FT4 is connected to the drain of the transistor FT5 (enhancement type), and the source of the transistor FT5 is connected to the video line VL.

The transistor FT3 has an active high reset signal S2 input to its gate, and is turned on when the reset signal S2 becomes high level. Further, the transistor FT1 inputs the active-high data signal S1 to its gate, and becomes conductive when the data signal S1 becomes high level. The transistor FT5 has an active high X1 selection signal S3 input to its gate,
When 3 goes high, it conducts. Further, the transistor FT2 receives the lock signal S4, which is the inverted data signal S1, and becomes conductive when the lock signal S4 becomes high level.

[0010]

In the infrared detector using the conventional two-dimensional infrared image sensor, the output signal from each pixel is a dark current component, a background radiation component, and an increasing component according to the intensity of the incident infrared light. , Which is mainly the sum of the three components, but none of them can be separated. Therefore, in order to improve the dynamic range of the two-dimensional infrared image sensor, there is a problem that a device for clamping the output signal of the image sensor is necessary in the signal processing after the image sensor.

In an infrared detector using a MOS type image sensor described in Japanese Patent Laid-Open No. 63-161784, one pixel is composed of a photodetection photodiode (detection cell) and a light-shielded photodiode (detection cell). Many components are required on the same plane in one pixel, such as a dummy cell), a switch element, and a capacitive element, which causes a problem that the fill factor of the image sensor is lowered and the sensitivity is lowered. .

[0012]

An infrared detector according to the present invention is an infrared detector having a frame transfer type CCD in a readout section for taking out charges generated in each pixel to the outside as a voltage. A plurality of first pixels arranged in a matrix that generate electric charges according to the intensity, and one row of the first pixel of the first pixel other than the area where all the pixels are arranged for the first pixel. A second pixel that generates a completely independent pseudo signal that is not based on the amount of charge generated by each pixel, an amplifier that amplifies the pseudo signal, and a first signal output from this amplifier and the intensity of infrared rays An arithmetic unit that detects a difference from the second signal output from the first pixel that generates electric charge.

Further, a storage area including a plurality of vertical CCDs for accumulating charges from the area in which the plurality of first pixels are arranged in a column unit, and the second area by accumulating charges from the storage area. A horizontal CCD for generating a signal.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an infrared detector according to an embodiment of the present invention, and FIG. 2 is a waveform diagram showing an example of control signals and output signals in the embodiment shown in FIG.

In FIG. 1, the infrared detector of this embodiment has a light receiving area 1, a storage area 2, a horizontal CCD 3, and
The pseudo signal generating area 7, the amplifier 13 for amplifying the output from the horizontal CCD 3, the amplifier 14 for amplifying the output from the vertical CCD 10, and the differential amplifier 15 for amplifying the difference between the outputs of the amplifiers 13 and 14 are provided. Then configured.

The light receiving region 1 is composed of a plurality of photodiodes 4,
It consists of a transfer gate 5 and a vertical CCD 6.
The pseudo signal generating area 7 is composed of a plurality of dummy pixels 8 for generating a pseudo signal, a transfer gate 9, and a vertical CCD 10 for transferring a pseudo signal.

Next, the operation of this embodiment will be described with reference to FIGS.

When infrared rays are incident on the light receiving region 1, each photodiode 4 generates electric charges according to the intensity of the incident infrared rays. This charge passes through each transfer gate 5,
While the integration pulse φINT is being applied to the transfer gate 5, it is accumulated in the potential well formed below the electrode of the vertical CCD 6. When the accumulation of charges by the integration pulse φINT is completed, the vertical CCD 6 on the light receiving area 1
Four-phase high-speed transfer pulses φIV1, φIV2, φIV3, φIV4 to the transfer electrodes IV1, IV2, IV3, IV4 of
Is applied, and at the same time, the vertical CCD 11 in the storage area 2
To the transfer electrodes SV1, SV2, SV3, SV4 of four-phase transfer pulses φSV1, φSV2, φSV different from the high-speed transfer pulses φIV1, φIV2, φIV3, φIV4.
3, φSV4 is applied, and the signal charges of all the pixels in the light receiving region 1 are transferred to the storage region 2 at high speed.

After that, the integral pulse φINT is applied again to the transfer gate 5 in the light receiving region 1 to accumulate the charges again. The signal charges transferred to the storage region 2 are sent row by row downward during this time via the transfer gate (TG) 12.

First, the signal charges in the lowermost row of the vertical CCD 11 are transferred to the horizontal CCD 3 one row at a time, and the horizontal CC
The D transfer pulses φH1 and φH2 are sent to the amplifier 13 as a time series signal. At this time, since the next signal charge has already been transferred to the next stage, the next transfer pulse φSV
1, φSV2, φSV3, and φSV4, the signal charge enters the horizontal CCD 3, and the horizontal CCD transfer pulses φH1 and φH again.
2 is sent to the amplifier 13 as a time series signal.

Next, the operation of the pseudo signal generating area 7 will be described with reference to FIG.
A description will be given in combination with FIG.

FIG. 2 is a timing chart of various transfer pulses in the vicinity of a blanking period during the transfer of one horizontal scanning line segment of signal charges. Shown in BLK.

ΦH1 and φH2 are horizontal CCDs in FIG.
.Phi.SV1 to .phi.SV4 are transfer pulses of the vertical CCD 11 in the storage area 2, .phi.VL.
Is a pulse applied to a transfer gate (TG) 12 that separates the vertical CCD 11 and the horizontal CCD 3. Also, φ
IG is an integration pulse of the pseudo signal charge in the pseudo signal generating region 7, and φT1 and φT2 are transfer pulses of the pseudo signal charge.

First, the integral pulse φIG is applied to the transfer gate 9 in the pseudo signal generating region 7. The dummy pixel 8 is optically shielded, and the transfer gate 9
While the integration pulse φIG is being applied to the dummy pixels 8, the charges generated in the dummy pixels 8 are transferred to the potential well below the transfer electrodes of the vertical CCD 10 via the transfer gate 9.

At this time, in the storage area 2, the vertical CCD
The signal charges in 11 are transferred pulses φSV1 to
The signal charges transferred to the lower side of the vertical CCD 11 by φSV4 are transferred to the transfer gate (T
G) Transferred to the horizontal CCD 3 via 12.

The signal charges transferred to the horizontal CCD 3 are transferred to the amplifier 13 by the horizontal transfer pulses φH1 and φH2, and the dummy charges transferred to the vertical CCD 10 are vertical Cs.
The time-series signals are transferred to the amplifier 14 by the CD transfer pulses φT1 and φT2, respectively, but compared with the integration time of the integration pulse φINT applied to the photodiode 4 in the light receiving region 1, the dummy pixel 8 in the pseudo signal generating region 7 is compared. Since the integration time of the integration pulse φIG applied to is overwhelmingly short, the gain of the amplifier 14 is set to be larger than the gain of the amplifier 13. Then, the signal from the amplifier 13 and the signal from the amplifier 14 are simultaneously sent to the differential amplifier 15, and the difference between them is detected and taken out to the outside.

As described above, the horizontal transfer pulses φH1 and φH2 of the horizontal CCD 3 and the vertical CCD of the pseudo signal generation area 7 are used.
By synchronizing the 10 vertical CCD transfer pulses φT1 and φT2 and repeating the above operation, unnecessary charge components can be removed from the signal charges. However, this operation is not performed during the high-speed transfer period of the vertical CCD 6 in the light receiving area 1.

[0029]

As described above, according to the present invention, in the infrared detector having the frame transfer type CCD in the reading section for taking out the electric charge generated in each pixel as a voltage to the outside, the infrared detector according to the intensity of the incident infrared ray. A plurality of first pixels arranged in a matrix for generating electric charges, and electric charges generated by each pixel of the first pixels in one row of the matrix other than the area in which all the pixels are arranged for the first pixel Second to generate totally independent pseudo-signals not based on quantity
The pixel, the amplifier for amplifying the pseudo signal thereof, and the difference between the first signal output from the amplifier and the second signal output from the first pixel that generates electric charge according to the intensity of infrared rays. By including the calculation unit that operates, an unnecessary signal component that does not contribute to the infrared image output from the infrared detector can be removed inside the infrared detector. As a result, the dynamic range of the infrared detector can be improved without lowering the sensitivity. Further, when the infrared imaging device is configured, the size and weight can be reduced.

[Brief description of drawings]

FIG. 1 is a block diagram showing an infrared detector according to an embodiment of the present invention.

FIG. 2 is a waveform diagram showing an example of control signals and output signals in the embodiment shown in FIG.

FIG. 3 is a block diagram showing an example of a solid-state image sensor used as a MOS image sensor.

[Explanation of symbols]

1 light receiving area 2 storage area 3 horizontal CCD 4 photodiode 5 transfer gate 6 vertical CCD 7 pseudo signal generation area 8 dummy pixel 9 transfer gate 10 vertical CCD 11 vertical CCD 12 transfer gate (TG) 13 amplifier 14 amplifier 15 differential amplifier 21 selection Signal output circuit 90 Aperture unit 91 n-type substrate 92 Source 93 Drain 94 Gate 96 Aluminum layer φINT integration pulse φIV1, φIV2, φIV3, φIV4 High-speed transfer pulse φSV1, φSV2, φSV3, φSV4 transfer pulse φVL applied pulse φH1, φH2 Horizontal CCD transfer Pulse φT1, φT2 vertical CCD transfer pulse φIG integration pulse H.P. BLK blanking period IV1, IV2, IV3, IV4, SV1, SV2, S
V3, SV4 transfer electrodes FT1 to FT7, FT11 to FT17 MOS-FE
T PD, PD1, PD11 photodiode C1, C11 capacitive element X1 detection cell W dummy cell A1, A11 sense amplifier VL video line DL dummy line

Claims (2)

[Claims] 1. A frame transfer type C is provided in a read-out portion for taking out charges generated in each pixel as a voltage to the outside.
In an infrared detector including a CD, a plurality of first pixels arranged in a matrix that generate electric charges according to the intensity of incident infrared light, and all the pixels are arranged for the first pixel. A second pixel for generating a completely independent pseudo signal that is not based on the charge amount generated by each pixel of the first pixel in only one column of the matrix other than the region, an amplifier for amplifying the pseudo signal, and this amplifier An infrared detector comprising: an arithmetic unit that detects a difference between a first signal that is output and a second signal that is output from the first pixel that generates a charge according to the intensity of infrared rays. . 2. A storage region including a plurality of vertical CCDs for accumulating charges from a region in which the plurality of first pixels are arranged in column units, and the second region by accumulating charges from the storage regions. The infrared detector according to claim 1, further comprising a horizontal CCD that generates a signal.