JPH06205223A - Picture processor - Google Patents

Abstract

PURPOSE:To provide a picture processor with high utilization efficiency of a picture bus, and thus, high utilization efficiency of an entire unit. CONSTITUTION:The picture processor 1 using a scanner section 12, a printer section 11, a picture memory 10 and a coding/decoding device 13, etc., to transfer picture data before coding or decoding via a picture bus 23 is provided with a bus controller 16 receiving a priority designation signal for the transfer of picture data from a CPU 19 to control the transfer of picture data before coding or after decoding via the picture bus 23.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of an image processing apparatus used in a facsimile machine or the like.

[0002]

2. Description of the Related Art In a facsimile apparatus, image data read from a transmission original is compressed by encoding and then transmitted to a receiving side, and the receiving side decodes the compressed and encoded image data to obtain the original image. Play the data,
It is designed to print out every scanning line.
As a result, it is possible to perform efficient data transmission with reduced line usage time.

FIG. 3 shows an example of the configuration of a conventional image processing apparatus for performing such encoding processing and decoding processing. Reference numeral 12 denotes a scanner unit for reading an image from a transmission original and electrically converting it into dot data. , 11 is a printer section, 13 is a code / decoder for converting dot data into MH code or MR code, or vice versa, from the scanner section 12 or code / decoder 13. Image memory for temporarily storing the dot data of
An image bus 23 is a dot data transfer path.
Reference numeral 17 is a system RAM, 19 is a CPU, 21 is a modem for modulating / demodulating transmission / reception data, 20 is a decoding memory for temporarily storing the reception data demodulated by the modem 21,
22 is a system bus which is a transfer path of MH code or MR code, 18 is from decoding memory 20 to code / decoder 1
3 is a DMA controller that directly transfers the received data to the device 3 via the system bus 22 without passing through the CPU 19.

To explain the decoding operation of the image processing apparatus 100, the MH code or MR code is transferred from the modem 21 to the decoding memory 20 via the system bus 22 under the control of the CPU 19. Decryption memory 2
The MH code or MR code transferred to 0 is transmitted via the system bus 22 under the control of the DMA controller 18.
It is transferred to the encoder / decoder 13 where it is decoded into dot data. The decoded dot data is sent to the image memory 10 or directly to the printer unit 11 via the image bus 23 and printed out.

On the other hand, to describe the operation at the time of encoding, the dot data read from the image by the scanner unit 12 and electrically converted are transferred to the image memory 10 or directly to the encoder / decoder 13 via the image bus 23. Then, the MH code or the MR code is encoded. The encoded MH code or MR code is transferred to the modem 21, modulated and transmitted.

However, as an example, when the image data read by the scanner section 12 and electrically converted into dot data is being transferred to and stored in the image memory 10, the image bus 23 is occupied by this transfer, Until this transfer is completed, another transfer process, for example, the image data decoded into dot data by the encoder / decoder 13 is transferred to the image memory 1.
The process of transferring and writing to 0 cannot be performed, and the image bus 23
Was not used efficiently.

[0007]

SUMMARY OF THE INVENTION The present invention has been proposed in view of the above circumstances and has a high use efficiency of the image bus.
Furthermore, it is an object of the present invention to provide an image processing apparatus with high usage efficiency of the entire apparatus.

[0008]

DISCLOSURE OF THE INVENTION The present invention, which is proposed to achieve the above object, provides a scanner unit, an image bus, and a scanner unit.
In an image processing apparatus in which image data before encoding or after decoding is mutually transferred by a printer unit, an image memory, an encoder / decoder, etc., in response to a priority designation signal for transfer of the image data from the CPU, A bus controller for controlling the transfer of the pre-encoded or post-encoded image data via the image bus is provided.

[0009]

According to the present invention, the bus controller receives the data transfer request from the encoder / decoder, the printer section and the scanner section in accordance with the priority designation signal for the data transfer via the image bus inputted from the CPU, and the maximum operation is performed. The data transfer permission is given only to the priority part, and the transfer process with the highest priority is started. If the data transfer request from the top priority part is interrupted even during the top priority transfer process and the image bus becomes empty, the bus controller gives the data transfer permission to the next priority part and starts the next priority transfer process. Let When the data transfer request is received again from the highest priority part, the bus controller immediately interrupts the data transfer permission to the next priority part and gives the data transfer permission to the highest priority part even during the process of the next priority transfer. hand,
The next-priority transfer process is suspended and the highest-priority transfer process is restarted. In this way, the bus controller controls the image bus in a time-division manner so as not to create unnecessary space.
The image bus can be used efficiently.

[0010]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing a configuration example of an image processing apparatus according to the present invention.
The same reference numerals are given and the description is omitted. In the figure, reference numeral 15 is provided in the system bus 22, and when detecting an EOL signal, the CPU 19 is notified of the EOL signal detection by an interrupt signal and an EOL detection circuit for sending an EOL detection signal to the gate 14, and 14 is an EOL detection circuit Receiving the EOL detection signal from the encoder / decoder 13 to the DMA controller 1
8 is a gate for stopping the transmission of the DMA request signal to the terminal 8. Further, 16 receives a data transfer request signal RQ from the encoder / decoder 13, the printer unit 11, the scanner unit 12 and the like, and in accordance with a priority designation signal from the CPU 19, a data transfer permission confirmation signal to only the highest priority unit. It is a bus controller that controls the image bus 23 by outputting ACK.

The operation related to the image bus 23 of the image processing apparatus 1 having such a configuration will be described below. (1) Operation during facsimile transmission Image data read by the scanner unit 12 is stored in the image memory 1
When the image data is read from the image memory 10 and transferred to the encoder / decoder 13 to be transferred and encoded, the reading speed of the scanner unit 12 is higher than the encoding speed of the encoder / decoder 13. Greater than In this case, the data transfer from the high-speed scanner unit 12 to the image memory 10 is prioritized over the data transfer from the image memory 10 to the encoder / decoder 13, and this priority order is CPU1.
9 instructs the bus controller 16 with a priority designation signal.

In the actual operation, the data transfer request signal RQ is input to the bus controller 16 from the scanner unit 12 and the encoder / decoder 13, respectively.
Reference numeral 6 denotes a data transfer permission confirmation signal A only to the scanner unit 12 according to the instruction of the priority designation signal from the CPU 19.
Since CK is output, data transfer from the scanner unit 12 to the image memory 10 is started first.

During the data transfer from the scanner unit 12 to the image memory 10, for example, the data transfer becomes unnecessary during the time for feeding the original by one line in the sub-scanning direction, and the data transfer request from the scanner unit 12 is made. The signal RQ is interrupted,
When the image bus 23 becomes available, the bus controller 16
Outputs a data transfer permission confirmation signal ACK to the encoder / decoder 13 in response to the data transfer request signal RQ from the encoder / decoder 13, and transmits data from the image memory 10 to the encoder / decoder 13. Start the transfer. If the data transfer request signal RQ is input again from the scanner unit 12, the bus controller 16 immediately starts the encoder / decoder even during the data transfer from the image memory 10 to the encoder / decoder 13. Acknowledgment signal AC for data transfer permission to 13
The output of K is interrupted, the confirmation signal ACK of the data transfer permission is output to the scanner unit 12, the data transfer from the image memory 10 to the encoder / decoder 13 is interrupted, and the scanner unit 12 outputs the image memory 10 Data transfer to. FIG. 2 is a time chart showing the occupation status of the image bus 23 during such an operation.

(2) Operation during facsimile reception: The image data decoded into dot data by the encoder / decoder 13 is transferred to and stored in the image memory 10, and the image data is read out from the image memory 10 and the printer unit 11 is read.
When the printer unit 11 is an electrophotographic system, the printer unit 11 has a page memory, and therefore the data transfer speed from the image memory 10 to the printer unit 11 is the same as the code / code. It is higher than the data transfer rate from the decoder 13 to the image memory 10. In this case, the data transfer from the high-speed image memory 10 to the printer unit 11 is prioritized over the data transfer from the encoder / decoder 13 to the image memory 10, and the priority order is CPU1.
9 instructs the bus controller 16 with a priority designation signal.

In actual operation, the data transfer request signal RQ is input to the bus controller 16 from the printer unit 11 and the encoder / decoder 13, respectively.
Reference numeral 6 denotes a data transfer permission confirmation signal A only to the printer unit 11 according to the instruction of the priority designation signal from the CPU 19.
Since CK is output, first, data transfer from the image memory 10 to the printer unit 11 is started.

During the data transfer from the image memory 10 to the printer unit 11, for example, one page of image data is accumulated in the page memory to start printing, or the image memory 10 is transferred to the printer unit 11. Data transfer is no longer necessary due to the loss of image data to be stored.
The data transfer request signal RQ from
3 becomes available, the bus controller 16 outputs the data transfer permission confirmation signal ACK to the encoder / decoder 13 in response to the data transfer request signal RQ from the encoder / decoder 13 to encode / decode the data. Data transfer from the digitizer 13 to the image memory 10 is started. When the data transfer request signal RQ is input again from the printer unit 11, the code /
Even during the data transfer from the decoder 13 to the image memory 10, the bus controller 16 immediately suspends the output of the data transfer permission confirmation signal ACK to the encoder / decoder 13 and causes the printer unit 11 to output. A data transfer permission confirmation signal ACK is output to interrupt the data transfer from the encoder / decoder 13 to the image memory 10 and restart the data transfer from the image memory 10 to the printer unit 11.

(3) Operation during facsimile transmission while reading out and printing out the image data stored in the image memory 10, while reading out the image data from the image memory 10 and transferring to the printer section 11 for printing out, When the image data read by the scanner unit 12 is transferred to and stored in the image memory 10 and the image data is read from the image memory 10 and transferred to the encoder / decoder 13 for encoding, the printer unit 1
If 1 is an electrophotographic system, the data transfer speed from the image memory 10 to the printer unit 11 is the highest, and then the data transfer speed from the scanner unit 12 to the image memory 10,
The data transfer speed from the image memory 10 to the encoder / decoder 13 is in order. In this case, the data transfer from the image memory 10 to the printer unit 11, the data transfer from the scanner unit 12 to the image memory 10, the data transfer from the image memory 10 to the encoder / decoder 13 and the order of priority are performed in descending order of speed. The priority order is determined by the CPU 19 using the priority order designation signal to the bus controller 16.

In actual operation, the data transfer request signal RQ is input to the bus controller 16 from the printer unit 11, the scanner unit 12 and the encoder / decoder 13, respectively.
The bus controller 16 outputs the data transfer permission confirmation signal ACK only to the printer unit 11 having the highest priority in accordance with the instruction of the priority designation signal from the CPU 19, so that the data transfer from the image memory 10 to the printer unit 11 is started first. It

In the middle of data transfer from the image memory 10 to the printer unit 11, for example, image data for one page is accumulated in the page memory and printing is started. When the data transfer request signal RQ from the unit 11 is interrupted and the image bus 23 becomes vacant, the bus controller 16 responds to the data transfer request signal RQ from the scanner unit 12 having the next priority, and the scanner unit 12
A data transfer permission confirmation signal ACK is output to start data transfer from the scanner unit 12 to the image memory 10.

Further, from the scanner unit 12 to the image memory 10
In the middle of the data transfer to, the data transfer becomes unnecessary by, for example, feeding the original by one line in the sub-scanning direction, the data transfer request signal RQ from the scanner unit 12 is interrupted, and the image bus 23 becomes empty. Occurs, the bus controller 16 causes the data transfer request signal R from the encoder / decoder 13 to be transmitted.
In response to Q, a data transfer permission confirmation signal ACK is output to the encoder / decoder 13 to start data transfer from the image memory 10 to the encoder / decoder 13.

In this state, when the data transfer request signal RQ from the printer section 11 or the scanner section 12 having a higher priority is input to the bus controller 16,
Even if the bus controller 16 is in the middle of data transfer from the image memory 10 to the encoder / decoder 13, the bus controller 16 immediately suspends the output of the data transfer permission confirmation signal ACK to the encoder / decoder 13 and also the printer unit. 11 or a scanner unit 12 outputs a data transfer permission confirmation signal ACK,
The data transfer from the image memory 10 to the encoder / decoder 13 is interrupted, and at the same time the image memory 10 is transferred to the printer unit 1.
1 or the data transfer from the scanner unit 12 to the image memory 10 is restarted.

Thereafter, in the same manner, the bus controller 16
Selects the data transfer request signal RQ having a higher priority from the input data transfer request signals RQ, returns a confirmation signal ACK of the data transfer permission, and returns the data transfer request signal RQ having a higher priority. The image bus 23 is controlled as is done.

[0023]

According to the present invention, the bus controller is
The image bus is controlled in a time-division manner in accordance with a priority designation signal for data transfer via the image bus, which is input from the CPU, so that an unnecessary space is not generated, so that the image bus can be used efficiently, and eventually It is possible to provide an image processing apparatus with high usage efficiency of the entire apparatus.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration example of an image processing apparatus according to the present invention.

FIG. 2 is a data transfer from a scanner unit to an image memory,
6 is a time chart showing an image bus occupancy state of data transfer from an image memory to a code / decoder.

FIG. 3 is a diagram illustrating a configuration example of a conventional image processing apparatus.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Image processing apparatus 10 ... Image memory 11 ... Printer section 12 ... Scanner section 13 ... Encoder / decoder 14 ... Gate 15 ... EOL detection circuit 16 ... Bus controller 17 ... System RAM 18 ... DMA controller 19 ... CPU 20 ... Decoding memory 21 ... Modem 22 ... System bus 23 ... Image bus ACK ... Data transfer permission Confirmation signal RQ ・ ・ ・ Data transfer request signal

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[Procedure amendment]

[Submission date] May 20, 1993

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be amended] Claims

[Correction method] Change

[Correction content]

[Claims]

[Procedure Amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0008

[Correction method] Change

[Correction content]

[0008]

DISCLOSURE OF THE INVENTION The present invention, which is proposed to achieve the above object, provides a scanner unit, an image bus, and a scanner unit.
The printer unit, another image memory and encoding / decoding, etc.
An image processing apparatus for transferring image data , comprising C
A bus controller that receives a priority designation signal for the transfer of the image data from the PU and controls the transfer of the image data via the image bus is configured.

Claims (1)

[Claims] 1. A CPU in an image processing apparatus in which image data before encoding or after image data is mutually transmitted between a scanner unit, a printer unit, an image memory, an encoder / decoder, etc. via an image bus. Image processing, comprising: a bus controller for controlling the transfer of the pre-encoded or post-encoded image data via the image bus by receiving the image data transfer priority designation signal from apparatus.