JPH0620065B2 - Method for manufacturing plasma silicon oxide film - Google Patents
Method for manufacturing plasma silicon oxide filmInfo
- Publication number
- JPH0620065B2 JPH0620065B2 JP58143857A JP14385783A JPH0620065B2 JP H0620065 B2 JPH0620065 B2 JP H0620065B2 JP 58143857 A JP58143857 A JP 58143857A JP 14385783 A JP14385783 A JP 14385783A JP H0620065 B2 JPH0620065 B2 JP H0620065B2
- Authority
- JP
- Japan
- Prior art keywords
- chamber
- oxide film
- silicon oxide
- sio
- plasma
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 13
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 title claims description 8
- 229910052814 silicon oxide Inorganic materials 0.000 title claims description 8
- 238000000034 method Methods 0.000 title description 6
- 239000004065 semiconductor Substances 0.000 claims description 9
- 238000000151 deposition Methods 0.000 claims 1
- 238000005530 etching Methods 0.000 description 9
- 238000011156 evaluation Methods 0.000 description 7
- 238000002161 passivation Methods 0.000 description 6
- 229910008051 Si-OH Inorganic materials 0.000 description 3
- 229910006358 Si—OH Inorganic materials 0.000 description 3
- 238000010521 absorption reaction Methods 0.000 description 3
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 125000002887 hydroxy group Chemical group [H]O* 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000010410 layer Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
Description
【発明の詳細な説明】 〔技術分野〕 本発明はシリコン酸化膜の製造方法に関し、特に耐湿性
に優れて半導体装置のパッシベーションに用いて好適な
プラズマＣＶＤ法により形成したシリコン酸化膜の製造
方法に関するものである。Description: TECHNICAL FIELD The present invention relates to a method for producing a silicon oxide film, and more particularly to a method for producing a silicon oxide film formed by a plasma CVD method which is excellent in moisture resistance and suitable for passivation of semiconductor devices. It is a thing.
半導体装置のパッシベーション膜、特にファイナルパッ
シベーション膜の材料としてプラズマＣＶＤ法により形
成したシリコン酸化膜（Ｐ−SiO）が利用されている
（雑誌「Semiconductor World」1983年２月号Ｐ４９〜
５７）。パッシベーションの効果を高いものとするため
にはその耐湿性等を優れたものにする必要がある。A silicon oxide film (P-SiO) formed by a plasma CVD method is used as a material for a passivation film of a semiconductor device, particularly a final passivation film (Magazine "Semiconductor World", February 1983, P49-).
57). In order to enhance the effect of passivation, it is necessary to have excellent moisture resistance and the like.
しかしながら、本発明者の検討によれば従来のＰ−SiO
膜の品質はプラズマＣＶＤ法により形成したシリコン窒
化膜（Ｐ−SiN）に比べ耐湿性等の点で劣る。この理由
は、Ｐ−SiOの各生成パラメータの最適値が明らかにさ
れていないためと考えられる。これに加えて、本発明者
の検討によれば次のような問題がある。すなわち、耐湿
性の評価としてこれまで蒸気圧検査（ＰＣＴ）法が用い
られ、所定時間のＰＣＴ処理に耐え得るものが高品質の
ものであるとされてきている。しかしながら、Ｐ−Ｓｉ
Ｏの品質はこのＰＣＴ法による評価では評価に長時間必
要であり実情にそぐわないため上記研究の進展を妨げて
いた。However, according to the study by the present inventor, the conventional P-SiO
The film quality is inferior to the silicon nitride film (P-SiN) formed by the plasma CVD method in terms of moisture resistance and the like. It is considered that this is because the optimum value of each P-SiO formation parameter has not been clarified. In addition to this, according to the study by the present inventor, there are the following problems. That is, the vapor pressure test (PCT) method has been used so far as the evaluation of the moisture resistance, and it has been considered that the one that can withstand the PCT treatment for a predetermined time is of high quality. However, P-Si
The quality of O requires a long time for the evaluation by the PCT method and does not fit the actual situation, which hinders the progress of the above research.
このため、本発明者は耐湿性について短時間で的確に評
価できる評価方法を用い、これによってＰ−SiO膜の各
生成パラメータについての最適値について明らかにし
た。Therefore, the present inventor has used an evaluation method capable of accurately evaluating the moisture resistance in a short time, and clarified the optimum value for each production parameter of the P-SiO film by this.
本発明者は赤外吸収法に着目し、前述のＰＣＴ法と赤外
吸収法とを併用したＰ−SiOの新たな評価法を開発し
た。そして、この評価法によりＰ−SiOの耐湿性等の評
価を行なったところ、従来法による評価結果とは一致す
る結果が短時間で得られた。これから、短時間のＰ−Si
Oの製造条件検討で高品質のＰ−SiOを得ることができる
ことが判明した。The present inventor has focused on the infrared absorption method and has developed a new evaluation method for P-SiO using the above-mentioned PCT method and infrared absorption method in combination. Then, when the moisture resistance and the like of P-SiO were evaluated by this evaluation method, a result that was in agreement with the evaluation result by the conventional method was obtained in a short time. From now on, P-Si for a short time
It was found that a high-quality P-SiO can be obtained by examining O production conditions.
本発明の目的は耐湿性に優れ、半導体装置のパッシベー
ションに用いても半導体装置の信頼性を低下することの
全くない高品質のＰ−SiOを製造する方法を提供するこ
とにある。An object of the present invention is to provide a method for producing high-quality P-SiO, which has excellent moisture resistance and never deteriorates reliability of a semiconductor device even when used for passivation of the semiconductor device.
本発明の前記ならびにそのほかの目的と新規な特徴は、
本明細書の記述および添付図面からあきらかになるであ
ろう。The above and other objects and novel characteristics of the present invention are
It will be apparent from the description of the present specification and the accompanying drawings.
本願において開示される発明のうち代表的なものの概要
を簡単に説明すれば、下記のとおりである。The outline of a typical one of the inventions disclosed in the present application will be briefly described as follows.
すなわち、Ｐ−SiOを製造する際のＲＦパワー密度，Ｒ
Ｆ周波数，真空度を適宜に設定することにより、耐湿性
の向上等、Ｐ−SiOの高品質化を達成するものである。That is, RF power density when manufacturing P-SiO, R
By appropriately setting the F frequency and the degree of vacuum, it is possible to achieve high quality P-SiO, such as improved moisture resistance.
本発明者による種々の検討によればＰ−SiOが吸湿する
とＳｉと水酸基（ＯＨ）とが結合してSi−OHが形成さ
れ、特有の赤外周波数においてSi−OHに起因する吸収が
現われることが判明した。また、このSi−ＯＨの結合で
決定される耐湿性はＰ−SiOの緻密性と大なる相関を有
し、かつこの緻密性はＰ−SiOのエッチ速度によって表
わされる。According to various studies by the present inventor, when P-SiO absorbs moisture, Si and a hydroxyl group (OH) combine to form Si-OH, and Si-OH-induced absorption appears at a specific infrared frequency. There was found. The moisture resistance determined by the bond of Si-OH has a great correlation with the denseness of P-SiO, and this denseness is represented by the etching rate of P-SiO.
そこで、本発明者が、ＰＣＴ試験とエッチ速度の相関を
求めたところ、第１図に示す関係を得ることができた。
即ち、製品として必要とされる耐湿性は、ＰＣＴによっ
てＰ−SiOが吸湿しない時間を200hr確保することであ
り、このためには、エッチ速度が10（Å／sec）以下で
あることが必要である。Therefore, when the present inventor obtained the correlation between the PCT test and the etch rate, the relationship shown in FIG. 1 could be obtained.
That is, the moisture resistance required as a product is to secure a time for which P-SiO does not absorb moisture by PCT for 200 hours, and for this purpose, the etching rate needs to be 10 (Å / sec) or less. is there.
したがって、この結果に基づいて、第５図に示すＰ−Si
O製造装置１により各条件を変化させてＰ−SiOの製造を
行なったところ、第２図ないし第４図に示す関係を得る
ことができた。前記製造装置１は、チャンバ２内に上下
の各電極３，４を配置し、上部電極３にソースとしての
Ｓ：５を取着し、下部電極４上に被処理物であるシリコ
ンウエーハ等６を載置すると共に両電極間に所要の周波
数でかつ所要のパワー密度のＲＦ（高周波）をＲＦ電源
７から供給する。また、チャンバ２にはガス供給管８や
排気管９を接続し、プラズマが発生し得るようにチャン
バ２内にアルゴン，酸素を供給する一方、内部を所要の
真空度に設定する。これにより、両電極間３，４に発生
するプラズマの作用によりＳ：Ｏ（SiO2）が生成され、
これがウエーハ６表面に堆積されることになる。Therefore, based on this result, the P-Si shown in FIG.
When O-manufacturing apparatus 1 was used to manufacture P-SiO under various conditions, the relationships shown in FIGS. 2 to 4 could be obtained. In the manufacturing apparatus 1, upper and lower electrodes 3 and 4 are arranged in a chamber 2, S: 5 as a source is attached to an upper electrode 3, and a silicon wafer or the like 6 which is an object to be processed is attached to a lower electrode 4. The RF power supply 7 supplies RF (high frequency) having a required frequency and a required power density between both electrodes. Further, a gas supply pipe 8 and an exhaust pipe 9 are connected to the chamber 2, and argon and oxygen are supplied into the chamber 2 so that plasma can be generated, while the inside is set to a required degree of vacuum. As a result, S: O (SiO 2 ) is generated by the action of the plasma generated between the electrodes 3 and 4,
This will be deposited on the surface of the wafer 6.
このようにして形成したＰ−SiOについて検討したとこ
ろ、第２図のＲＦパワー密度とエッチ速度との関係で
は、エッチ速度を１０（Å／sec）以下にするためには
ＲＦパワー密度は0.5（Ｗ／cm2）以上であることが要求
される。第３図のＲＦ周波数とエッチ速度との関係で
は、エッチ速度を１０（Å／sec）以下にするためには
ＲＦ周波数は略２MHz以下にすることが好ましい。更に
第４図の真空度とエッチ速度との関係では、エッチ速度
を10（Å／sec）以下にするためには真空度は0.7Torr以
下が好ましい。When the P-SiO formed in this way was examined, it was found that the RF power density was 0.5 (in order to keep the etching rate at 10 (Å / sec) or less in the relationship between the RF power density and the etching rate in FIG. W / cm 2 ) or more is required. Regarding the relationship between the RF frequency and the etching rate in FIG. 3, it is preferable that the RF frequency is approximately 2 MHz or less in order to keep the etching rate at 10 (Å / sec) or less. Further, in the relationship between the degree of vacuum and the etching rate shown in FIG. 4, the degree of vacuum is preferably 0.7 Torr or less in order to keep the etching rate at 10 (Å / sec) or less.
そこで、次表に示すように、ＲＦパワー密度，ＲＦ周波
数，真空度を夫々相違させたＡ〜Ｅの５種類のＰ−SiO
を製造して各々のＰＣＴ時間を求めたところ、三つの条
件の全てを満足したもののみがＰＣＴ時間が200hrを越
えて耐湿性が高くなることが判明した。また、これらか
ら、三つの条件の中、一つでも条件を満たさないと、良
好な耐湿性が得られないことも判明した。Therefore, as shown in the following table, five types of P-SiO, A to E, in which the RF power density, the RF frequency, and the degree of vacuum are different from each other, respectively.
When each of them was manufactured and the PCT time was obtained, it was found that only those satisfying all three conditions had a PCT time of more than 200 hours and high moisture resistance. It was also found from these that good moisture resistance cannot be obtained unless at least one of the three conditions is satisfied.
このことから、ＰＦパワー密度，ＰＦ周波数，真空度の
各条件間でも相互に関係があり、各条件が前述の数値を
満足すれば評価としては合格であるが、その値の設定，
組合せによっては最上，上等の品質に差が生じることが
判る。 From this, there is a mutual relationship among the conditions of the PF power density, the PF frequency, and the degree of vacuum, and if each condition satisfies the above-mentioned numerical values, the evaluation is acceptable, but the setting of the value,
It can be seen that there is a difference in quality between the top and the top depending on the combination.
(1)Ｐ−SiOを形成する際のＰＦパワー密度，RF周波数、
真空度の各条件を夫々0.5（Ｗ／cm2）以下，２（MHz）
以下、0.7（Torr）以下に設定することにより、Ｐ−SiO
の耐湿性を評価するＰＣＴ時間を200hr以上にし、Ｐ−S
iOの耐湿性を向上して品質の向上を達成できる。(1) PF power density when forming P-SiO, RF frequency,
Each vacuum condition is 0.5 (W / cm 2 ) or less, 2 (MHz)
By setting below 0.7 (Torr), P-SiO
The PCT time to evaluate the moisture resistance of the
The moisture resistance of iO can be improved and the quality can be improved.
(2)前記三つの条件を満たすのみではなく、各条件値の
相対関係を適宜に定めることにより、ＰＣＴ時間の大幅
な増大を得ることができ、最上，上品質のＰ−SiOを得
ることができる。(2) Not only the above three conditions are satisfied, but also by appropriately determining the relative relationship of each condition value, it is possible to obtain a large increase in PCT time and obtain the highest quality P-SiO. it can.
以上本発明者によってなされた発明を実施例にもとづき
具体的に説明したが、本発明は上記実施例に限定される
ものではなく、その要旨を逸脱しない範囲で種々変更可
能であることはいうまでもない。Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above embodiments and can be variously modified without departing from the scope of the invention. Nor.
以上の説明では主として本発明者によってなされた発明
をパッシベーションとしてのＰ−SiOに適用した場合に
ついて説明したが、それに限定されるものではなく、層
間絶縁層として使用する場合は勿論のこと、半導体技術
分野以外でＰ−SiOを形成する場合にも適用することが
できる。In the above description, the case where the invention made by the present inventor is mainly applied to P-SiO as passivation has been described, but the present invention is not limited to this, and it goes without saying that it is used as an interlayer insulating layer and semiconductor technology. It can also be applied to the case of forming P-SiO in a field other than the field.
第１図はエッチ速度とＰＣＴ時間の関係を示すグラフ、 第２図はＲＦパワー密度とエッチ速度の関係を示すグラ
フ、 第３図はＲＦ周波数とエッチ速度の関係を示すグラフ、 第４図は真空度とエッチ速度の関係を示すグラフ、 第５図はＰ−SiO製造装置の概念図である。 １……Ｐ−SiO、２……チャンバ、３……上部電極、４
……下部電極、６……ウエーハ、７……ＲＦ電源、８…
…ガス供給管、９……排気管。1 is a graph showing the relationship between etch rate and PCT time, FIG. 2 is a graph showing the relationship between RF power density and etch rate, FIG. 3 is a graph showing the relationship between RF frequency and etch rate, and FIG. 4 is Fig. 5 is a graph showing the relationship between the degree of vacuum and the etching rate, and Fig. 5 is a conceptual diagram of a P-SiO manufacturing apparatus. 1 ... P-SiO, 2 ... chamber, 3 ... upper electrode, 4
...... Lower electrode, 6 ... Wafer, 7 ... RF power supply, 8 ...
… Gas supply pipe, 9… Exhaust pipe.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 原 雄次 東京都小平市上水本町1450番地 株式会社 日立製作所武蔵工場内 (56)参考文献 特開 昭59−148326（ＪＰ，Ａ) 特公 昭57−51972（ＪＰ，Ｂ２) ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Yuji Hara 1450, Kamimizuhoncho, Kodaira-shi, Tokyo Inside Musashi Factory, Hitachi, Ltd. (56) References JP 59-148326 (JP, A) JP 57 -51972 (JP, B2)
Claims (1)
化膜を堆積するプラズマシリコン酸化膜の製造方法であ
って、上下電極が配置されたチャンバと、その電極間に
プラズマを発生させるためのＲＦ電源と、チャンバに接
続され、そのチャンバ内にプラズマが発生し得るように
所望のガスを供給するガス供給管と、チャンバに接続さ
れそのチャンバ内を真空にするための排気管とを備えた
プラズマ処理装置を用意し、前記チャンバ内の下部電極
上に半導体ウエーハを位置せしめ、前記ＲＦ電源のＲＦ
パワー密度が０．５（Ｗ／cm2）以下で、周波数が２
（ＭHz）以下、そしてチャンバ内真空度を０．７（Ｔｏ
ｒｒ）以下に設定し、その条件下で前記半導体ウエーハ
主面にプラズマシリコン酸化膜を堆積することを特徴と
するプラズマシリコン酸化膜の製造方法。1. A method of manufacturing a plasma silicon oxide film, comprising depositing a plasma silicon oxide film on a main surface of a semiconductor wafer, comprising: a chamber in which upper and lower electrodes are arranged; and an RF power supply for generating plasma between the electrodes. A plasma processing apparatus provided with a gas supply pipe connected to a chamber for supplying a desired gas so that plasma can be generated in the chamber, and an exhaust pipe connected to the chamber for evacuating the chamber Is prepared, a semiconductor wafer is positioned on the lower electrode in the chamber, and the RF of the RF power source is
Power density is 0.5 (W / cm 2 ) or less and frequency is 2
(MHz) or less, and the degree of vacuum in the chamber is 0.7 (To
rr) A method for producing a plasma silicon oxide film, characterized in that the plasma silicon oxide film is deposited below the main surface of the semiconductor wafer under the conditions.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58143857A JPH0620065B2 (en) | 1983-08-08 | 1983-08-08 | Method for manufacturing plasma silicon oxide film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58143857A JPH0620065B2 (en) | 1983-08-08 | 1983-08-08 | Method for manufacturing plasma silicon oxide film |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6035521A JPS6035521A (en) | 1985-02-23 |
| JPH0620065B2 true JPH0620065B2 (en) | 1994-03-16 |
Family
ID=15348579
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58143857A Expired - Lifetime JPH0620065B2 (en) | 1983-08-08 | 1983-08-08 | Method for manufacturing plasma silicon oxide film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0620065B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7223941B2 (en) * | 2020-12-18 | 2023-02-17 | 日亜化学工業株式会社 | Method for manufacturing light-emitting element |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4505405A (en) * | 1980-07-24 | 1985-03-19 | Graco Inc. | Proportional pumping system |
| JPS59148326A (en) * | 1983-02-14 | 1984-08-25 | Sumitomo Electric Ind Ltd | Fabrication of thin film by cvd method |
-
1983
- 1983-08-08 JP JP58143857A patent/JPH0620065B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6035521A (en) | 1985-02-23 |
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