JPH06196728A - Photovoltaic element, and manufacture thereof - Google Patents

Abstract

PURPOSE:To obtain a photovoltaic element and a manufacturing method thereof in which a p-n junction will not be destroyed when a tab is soldered, and the photovoltaic element can be modularized a superior yield. CONSTITUTION:An insulating layer 2 is formed inside or on the surface of a part of a crystal semiconductor layer 1 which is located below a part of a collecting electrode 3 which is to be soldered. The collecting electrode 3 is directly formed on the insulating layer 2, or is formed on the same with an amorphous semiconductor layer 4 interposed between them.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a photovoltaic element, and more particularly to a photovoltaic element having a heterojunction formed by combining a crystalline semiconductor and an amorphous semiconductor.

[0002]

2. Description of the Related Art In recent years, a solar cell using polycrystalline silicon as a photovoltaic element has been actively researched. Among them, a solar cell having a heterojunction formed by combining amorphous silicon and polycrystalline silicon is inexpensive and has high conversion efficiency, and thus has attracted attention.

In such a photovoltaic element, a plurality of photovoltaic elements are generally connected and used in series in order to obtain a sufficient voltage. Such a structure in which a plurality of photovoltaic elements are connected in series is generally called a module, and modularization is achieved by connecting the collecting electrodes of the photovoltaic elements with tabs by soldering.

[0004]

However, when a plurality of photovoltaic elements are electrically connected by tabs, there is a problem that the characteristics of the photovoltaic elements change due to heating for soldering. That is, when the amorphous semiconductor layer is heated to be crystallized or the like, for example, a crack or the like is generated in the semiconductor layer, a metal or the like forming the collecting electrode enters through the crack, and the cell is short-circuited to cause a pn junction. Was sometimes destroyed.

Further, in the conventional photovoltaic element, the formation of the collector electrode is usually the last step, but in the case of the heterojunction photovoltaic element having an amorphous silicon layer, the amorphous silicon layer is formed. Since the heat resistance is low, a normal high temperature sintering type silver paste cannot be used, and a method using a low temperature curing type silver paste, a method by patterning evaporated silver, etc. are adopted. However, the low temperature curing type silver paste has a drawback that it has high resistance and low characteristics. Further, the method of patterning vapor-deposited silver has a drawback that the number of steps is increased and more materials are required, resulting in higher cost.

An object of the present invention is to provide a photovoltaic element and a method for manufacturing the same, in which the pn junction is not destroyed even by tab soldering, and the yield at the time of modularization is improved. Another object of the present invention is to provide a method of manufacturing a photovoltaic element capable of manufacturing the current collecting electrode at low cost.

[0007]

According to another aspect of the present invention, there is provided a photovoltaic element, which comprises a crystalline semiconductor layer of one conductivity type, a collector electrode electrically connected to a tab by soldering, and a collector electrode. An insulating layer formed on or inside the surface of the crystalline semiconductor layer located below the soldered portion, and an amorphous semiconductor layer of another conductivity type formed directly or indirectly on the crystalline semiconductor layer. Is characterized by.

According to the first aspect of the invention, the insulating layer is formed on or inside the surface of the crystalline semiconductor layer located below the soldered portion of the collector electrode. When it is formed on the surface of the crystalline semiconductor layer, a film to be an insulating layer is selectively formed on the surface, or a film to be an insulating layer is formed over the entire surface and then unnecessary portions are removed by etching or the like. Can be formed.

As the insulating layer, oxides such as silicon oxide and aluminum oxide, and nitrides and carbides such as amorphous silicon nitride and amorphous silicon carbide can be used. When amorphous silicon nitride or amorphous silicon carbide is used, it may not be possible to etch with hydrofluoric acid, so it is preferable that the composition ratio does not match the stoichiometric composition ratio.

As a method of forming the insulating layer, a method such as a sputtering method or a CVD method or a method of applying a paste and then firing it can be adopted. Further, in the case of an oxide, it can be formed by a method of forming an oxide layer by thermal oxidation and removing an unnecessary portion by etching or the like.
Further, a predetermined portion of the crystalline semiconductor layer may be irradiated with a laser in an oxygen atmosphere to form an oxide layer therein. A polycrystalline semiconductor or a single crystal semiconductor can be used for the crystalline semiconductor layer. Alternatively, a microcrystalline semiconductor may be used.

In the first aspect of the invention, an amorphous semiconductor layer may be interposed between the insulating layer and the collecting electrode. For example, after forming an insulating layer in a predetermined portion, an amorphous semiconductor layer is formed, a transparent conductive film is further formed thereon, and then a collector electrode can be provided above the insulating layer. In this case, the amorphous semiconductor layer and the transparent conductive film are interposed between the collector electrode and the insulating layer.

Further, the collector electrode may be formed directly on the insulating layer. In this case, after forming the insulating layer on a predetermined portion,
A collecting electrode is formed on the insulating layer, and after forming the collecting electrode, an amorphous semiconductor layer and a transparent conductive film are sequentially formed. In this case, it is necessary that the transparent conductive layer and the collector electrode are electrically connected to each other at least in part.

According to the first aspect of the invention, the amorphous semiconductor layer of another conductivity type is directly or indirectly provided on the crystal semiconductor layer of one conductivity type to form a pn junction. An intrinsic amorphous semiconductor layer may be formed between the crystalline semiconductor layer and the other conductive type amorphous semiconductor layer.

The inventions described in claims 6 and 7 are inventions of a method capable of manufacturing the photovoltaic element of the invention described in claim 1, respectively. In the manufacturing method of the invention according to claim 6, the step of forming an insulating layer at a predetermined portion on the one-conductivity-type crystal semiconductor layer, the step of forming a collecting electrode on the insulating layer, and the forming of the collecting electrode After that, a step of directly or indirectly forming another conductivity type amorphous semiconductor layer on the crystalline semiconductor layer is provided.

According to a seventh aspect of the manufacturing method of the present invention, a step of forming an insulating layer in a predetermined portion on a crystalline semiconductor layer of one conductivity type, and an amorphous semiconductor layer of another conductivity type on the crystalline semiconductor layer. The method includes a step of forming directly or indirectly and a step of forming a collector electrode above the amorphous semiconductor layer on the insulating layer.

[0016]

In the photovoltaic element according to the first aspect, the insulating layer is formed on or inside the surface of the crystalline semiconductor layer located below the soldered portion of the collector electrode. The presence of this insulating layer can prevent a short circuit of the cell. That is, when the tab is soldered to the collector electrode, the amorphous semiconductor layer is heated, and a crack or the like occurs in the amorphous semiconductor layer, and even if the metal forming the collector electrode or the tab enters along the crack. Since the insulating layer prevents metal from entering the crystalline semiconductor layer, a short circuit of the cell does not occur.

In the manufacturing method according to the sixth aspect, the other conductive type amorphous semiconductor layer is formed after the collector electrode is formed.
Therefore, when forming the collector electrode, it is not necessary to consider damage to the amorphous semiconductor layer due to heat, and a high temperature sintering type silver paste can be used. Therefore, a collector electrode having low resistance and excellent characteristics can be formed at low cost. In addition, even when the tab is soldered to the collector electrode, as in the case of the first aspect of the invention, since the insulating layer is present on the crystalline semiconductor layer, cell short circuit does not occur.

In the invention described in claim 7, since the collector electrode is formed above the amorphous semiconductor layer on the insulating layer,
Similarly to the invention described in claim 1, it is possible to manufacture a photovoltaic element capable of preventing a short circuit of cells at the time of soldering a tab and improving a yield at the time of modularization. .

[0019]

FIG. 1 is a sectional view showing a first embodiment in which a collector electrode is directly formed on an insulating layer, which is an embodiment according to the invention described in claim 1. In FIG. Referring to FIG. 1, a silicon oxide layer 2 as an insulating layer is formed on an n-type polycrystalline silicon substrate 1.
Is selectively provided in a predetermined portion. The n-type polycrystalline silicon substrate 1 has a thickness of 300 μm and a specific resistance of about 1Ω.
・ It is cm. The thickness of the silicon oxide layer 2 is about 1000.
It is ~ 2000Å.

A collector electrode 3 is formed on the silicon oxide film 2. This collector electrode 3 is formed by using a high temperature sintering type silver paste, and is printed by screen printing to have a thickness of about 10 μm after sintering.

A p-type amorphous silicon layer 4 is formed on the n-type polycrystalline silicon substrate 1. The p-type amorphous silicon layer 4 has a thickness of about 100Å and is also formed on the collector electrode 3. Further, a transparent electrode film 5 is formed on the p-type amorphous silicon layer 4. The transparent electrode film 5 has a thickness of about 700 μm and is made of ITO (indium tin oxide).
It is formed from a film. A back surface electrode 6 is formed on the back surface side of the n-type polycrystalline silicon substrate 1, and is formed with a thickness of 2 μm by vapor deposition of aluminum.

When the photovoltaic element shown in FIG. 1 is modularized, a tab is soldered on the transparent electrode film 5 on the collector electrode 3. At this time, even if the transparent electrode film 5 and the p-type amorphous silicon layer 4 are damaged by heat, the collector electrode 3 exists below the collector electrode 3 and oxidation as an insulating layer under the collector electrode 3 occurs. Silicon layer 2 is present. Therefore, it is possible to effectively prevent the short circuit of the cell due to the heating of the soldering.

In FIG. 1, the collector electrode 3 and the transparent electrode film 5 need to be electrically connected.
Normally, when the p-type amorphous silicon layer 4 is formed on the collector electrode 3, a part of the p-type amorphous silicon layer is missing, so that the collector electrode 3 and the transparent electrode film 5 are electrically connected at this portion.

FIG. 2 is a cross-sectional view showing a step of manufacturing the embodiment shown in FIG. 1, and is a cross-sectional view showing an embodiment of the manufacturing method of the present invention. As shown in FIG. 2A, a silicon oxide layer 2 is entirely formed on an n-type polycrystalline silicon substrate 1. The silicon oxide layer 2 can be formed by a sputtering method under the conditions of, for example, a gas flow rate of Ar-10 sccm, a pressure of 3 × 10 ⁻³ Torr, a substrate temperature of 200 ° C., and a power of 2 W / cm ² .

Next, as shown in FIG. 2B, a collector electrode 3 is formed on a predetermined portion of the silicon oxide layer 2. Collector electrode 3
Is formed by screen printing using a high temperature sintering type silver paste and then sintering at 550 ° C., for example. Next, as shown in FIG. 2C, the silicon oxide layer 2 other than the lower portion of the collector electrode 3 is etched and removed with a solution containing hydrofluoric acid.

Next, as shown in FIG. 2D, a p-type amorphous silicon layer 4 is formed, and then a transparent electrode film 5 is formed.
Next, as shown in FIG. 2E, a back surface electrode 6 is formed on the back surface side of the n-type polycrystalline silicon substrate 1.

In the embodiment shown in FIGS. 1 and 2, the p-type amorphous silicon layer 4 is formed directly on the n-type polycrystalline silicon substrate 1, but the intrinsic non-crystalline layer 1 is formed on the n-type polycrystalline silicon 1. After forming the crystalline silicon layer, the p-type amorphous silicon layer 4 may be formed on the intrinsic amorphous silicon layer.

According to the manufacturing method of this embodiment, the collector electrode 3 is formed before the p-type amorphous silicon layer 4 and the transparent electrode film 5 which are damaged by heating are formed. It is possible to sinter the collector electrode 3 at a high temperature without considering the above. Therefore, a high temperature sintering type silver paste or the like can be used, and a collector electrode having low resistance and good characteristics can be formed.

FIG. 3 is a sectional view showing a second embodiment in which a collector electrode is directly formed on an insulating layer, which is an embodiment according to the invention described in claim 1. In FIG. Referring to FIG. 3, a silicon oxide layer 12 is formed on a predetermined portion of n-type polycrystalline silicon substrate 11. A collector electrode 13 is formed on the silicon oxide layer 12. The p-type amorphous silicon layer 14 is
It is formed on the n-type polycrystalline silicon substrate 11,
It is not formed on a part of the upper surface of the collecting electrode 13. This p
A transparent electrode film 15 is formed on the amorphous silicon layer 14, and the collector electrode 13 and the transparent electrode film 15 are in direct contact with each other and electrically connected to each other on the upper surface of the collector electrode 13. A back surface electrode 16 is formed on the back surface side of the n-type polycrystalline silicon substrate 11. In this embodiment, the p-type amorphous silicon layer 14 is not partially formed on the upper surface side of the collecting electrode 13, and the transparent electrode film 15 is in direct contact with the collecting electrode 13, as shown in FIG. It is formed in substantially the same manner as the embodiment shown. That is, in the embodiment shown in FIG. 3, the transparent electrode film 15 is positively electrically connected on the upper surface side of the collecting electrode 13.

FIG. 4 is a cross-sectional view showing a process of manufacturing the embodiment shown in FIG. 3, and is a cross-sectional view showing an embodiment of the manufacturing method of the invention according to claim 6. In FIG. 4A, a silicon oxide layer 12 is formed on an n-type polycrystalline silicon substrate 11,
The state in which the collector electrode 13 is formed on the silicon oxide layer 12 is shown, and the state after the steps similar to those in FIG. 2C is shown. In this state, the p-type amorphous silicon layer 14 is formed. After forming the p-type amorphous silicon layer 14 on the entire surface, the p-type amorphous silicon layer 14 is etched and removed by laser pattern etching or photolithography so that a part above the collector electrode 13 is exposed. To do. FIG. 4B shows this state.

Next, as shown in FIG. 4C, a transparent electrode film 5 is formed thereon. As shown in FIG. 4C, the transparent electrode film 15 is in contact with and electrically connected to the upper surface side of the collecting electrode 13. Next, as shown in FIG. 4D, the back surface electrode 16 is formed on the back surface side of the n-polycrystalline silicon substrate 11. This is formed in the same manner as the embodiment shown in FIG.

In the embodiment shown in FIGS. 3 and 4, the electrical contact between the collecting electrode and the transparent electrode film is positively ensured.
Also in this embodiment, similarly to the embodiment shown in FIGS. 1 and 2, the collector electrode 13 can be formed by using a high temperature sintering type silver paste, and the collector electrode having low resistance and excellent characteristics is formed. can do. Further, even when the tab is soldered, the silicon oxide layer 12 is provided below the collector electrode 13, so that the cell can be prevented from being short-circuited.

FIG. 5 is a sectional view showing an embodiment according to the invention described in claim 1 and is a sectional view showing an embodiment in which an amorphous semiconductor layer is interposed between an insulating layer and a collector electrode. Referring to FIG. 5, a silicon oxide layer 22 is formed on a predetermined portion of n-type polycrystalline silicon substrate 21. The n-type polycrystalline silicon substrate 21 is formed so as to cover the silicon oxide 22.
A p-type amorphous silicon layer 24 is formed thereon, and a transparent electrode film 25 is further formed thereon. A collector electrode 23 is formed on the transparent electrode film 25 above the silicon oxide layer 22. A back surface electrode 26 is formed on the back surface side of the n-type polycrystalline silicon substrate 21.

The thickness of the silicon oxide layer 22 is 10 μm, the thickness of the p-type amorphous silicon layer 24 is 100 Å, the thickness of the transparent electrode film 25 is 700 Å, and the collector electrode 2
3 has a thickness of 30 μm, and the back electrode 26 has a thickness of 2 μm.
m, which are formed by the same method as the embodiment shown in FIGS. 1 and 2, respectively.

As shown in FIG. 5, the tab 27 is soldered on the collector electrode 23 in the photovoltaic device constructed as described above. Even if the p-type amorphous silicon layer 24 and the transparent electrode 5 are heated by the heat at the time of soldering to cause cracks or the like, the silicon oxide layer 22 exists below them, so that a cell short circuit is caused. Can be prevented,
The yield at the time of modularization can be improved.

FIG. 6 is a sectional view showing a manufacturing process of the embodiment shown in FIG. 5, and is a sectional view showing an embodiment of the manufacturing method of the present invention. Referring to FIG. 6A, n
A paste is applied on a predetermined portion of the mold polycrystalline silicon substrate 21 by using a silicon oxide paste by a screen printing method. The silicon oxide layer 22 is formed by baking under a baking condition of about 50 ° C. for 1 hour.

Referring to FIG. 6B, a p-type amorphous silicon layer 24 and a transparent electrode film 25 are formed on the surfaces of the n-type polycrystalline silicon substrate 21 and the silicon oxide layer 22 by a method such as plasma CVD or sputtering. It is formed by sequentially stacking. Next, referring to FIG. 6C, the silicon oxide layer 2
On the transparent electrode film 25 above 2, the collector electrode 23 having a width narrower than the width of the silicon oxide layer 22 is formed by using silver paste.

After the photovoltaic element is manufactured as described above, the photovoltaic elements are connected by tabs to form a module. As shown in FIG. 5, tabs 27 are soldered on the collector electrodes 23 to connect them. As described above, due to the presence of the silicon oxide layer 22 even during this soldering, the short circuit of the cell can be prevented.

When tabs were attached to 11 cells by soldering and the yield of the cells which did not cause a short circuit was determined, 10 cells out of 11 cells did not cause a short circuit. For comparison, the p-type amorphous silicon layer 24 and the transparent electrode film 25 are formed without forming the silicon oxide layer 22 on the n-type polycrystalline silicon substrate 21, and the collector electrode 2 is formed thereon.
A photovoltaic element having No. 3 formed was produced, and the yield was calculated in the same manner.
It was an individual. As is clear from this, the yield at the time of tab attachment can be improved by forming the insulating layer at the position below the collector electrode according to the present invention.

Although the insulating layer is formed on the crystalline semiconductor layer in the above embodiment, the insulating layer may be formed inside the insulating semiconductor layer. FIG. 7 is a sectional view showing such an embodiment. A silicon oxide layer 32 is formed in a predetermined portion of the n-type polycrystalline silicon substrate 31 so as to be embedded therein. This silicon oxide layer 32 can be formed, for example, by thermally oxidizing a part of the silicon substrate 31 by irradiating the silicon substrate 31 with a laser in an oxygen atmosphere to heat it. After the silicon oxide layer 32 is formed in this manner, the amorphous silicon layer 34 is formed on the silicon substrate 31. The amorphous silicon layer 34 is
Intrinsic amorphous silicon layer 34a and p-type amorphous silicon layer 3
4b is laminated. An ITO thin film is formed on the amorphous silicon layer 34 to provide a transparent electrode film 35. A collector electrode 33 is formed on the transparent electrode film 35 above the silicon oxide layer 32.

A tab is attached by soldering on the collector electrode 33 thus formed. Even if the amorphous silicon layer 34 is heated and destroyed during this soldering, the silicon oxide layer 32 exists under the amorphous silicon layer 34, so that the cell is not short-circuited.

Also, when the collector electrode is directly formed on the insulating layer as in the embodiment shown in FIGS. 1 to 4, the insulating layer is formed in the silicon substrate as in this embodiment, and the insulating layer is formed. A collector electrode can be provided directly on top. In each of the above examples,
The silicon substrate that is a crystalline semiconductor layer is n-type and the amorphous semiconductor layer formed thereabove is p-type. However, the conductivity types are opposite to each other, the silicon substrate is p-type, and the amorphous semiconductor layer is n-type. It may be a mold.

In each of the above embodiments, the insulating layer is formed on or in the surface of the crystalline semiconductor layer located below the collector electrode, but it is possible to prevent only the short circuit of the cell caused by heating during soldering. If it suffices, the insulating layer may be provided only below the soldering portion of the collector electrode, and the insulating layer may not be formed below the collector electrode portion other than the soldering portion.

[0044]

In the photovoltaic element according to the first aspect of the present invention, the insulating layer is formed on or inside the surface of the crystalline semiconductor layer located below the soldered portion of the collector electrode. For this reason, by heating when soldering the tab,
Even if a crack or the like occurs in the amorphous semiconductor layer, the insulating layer can prevent entry of a metal that causes a cell short circuit. Therefore, it is possible to prevent a short circuit of the cell.

According to a sixth aspect of the present invention, in the photovoltaic element of the first aspect of the present invention, a photovoltaic element having a structure in which a collector electrode is directly formed on an insulating layer is produced. According to this method, the collector electrode can be formed by using a high temperature baking type paste when forming the collector electrode as described above. Also, when the tab is attached to the collector electrode by soldering after forming the photovoltaic element, it is possible to prevent the short circuit of the cell.

According to a seventh aspect of the present invention, there is provided a photovoltaic device having a structure in which an amorphous semiconductor layer is interposed between an insulating layer and a collecting electrode in the photovoltaic element according to the first aspect. This is a method by which a power device can be manufactured, and it is possible to prevent a cell short circuit when a tab is soldered to a collector electrode.

[Brief description of drawings]

FIG. 1 is a sectional view showing an embodiment of the invention described in claim 1.

FIG. 2 is a cross-sectional view showing the manufacturing method of the embodiment shown in FIG. 1 and showing one embodiment of the manufacturing method of the invention according to claim 6;

FIG. 3 is a sectional view showing another embodiment of the invention described in claim 1.

FIG. 4 is a cross-sectional view showing the manufacturing method of the embodiment shown in FIG. 3, showing another embodiment of the manufacturing method of the invention according to claim 6;

FIG. 5 is a sectional view showing still another embodiment of the invention according to claim 1;

FIG. 6 is a cross-sectional view showing the manufacturing method of the embodiment shown in FIG. 5, showing one embodiment of the manufacturing method of the invention according to claim 7;

FIG. 7 is a sectional view showing still another embodiment of the invention according to claim 1;

[Explanation of symbols]

 1, 11, 21, 31 ... N-type polycrystalline silicon substrate 2, 12, 22, 32 ... Silicon oxide layer 3, 13, 23, 33 ... Collection electrode 4, 14, 24, 34b ... P-type amorphous silicon layer 34a ... Intrinsic amorphous silicon layer 5, 15, 25, 35 ... Transparent electrode film 6, 16, 26, 36 ... Back electrode

[Procedure amendment]

[Submission date] February 18, 1993

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0021

[Correction method] Change

[Correction content]

A p-type amorphous silicon layer 4 is formed on the n-type polycrystalline silicon substrate 1. The p-type amorphous silicon layer 4 has a thickness of about 100Å and is also formed on the collector electrode 3. Further, a transparent electrode film 5 is formed on the p-type amorphous silicon layer 4. The transparent electrode film 5 has a thickness of about 700 Å and is formed of an ITO (indium tin oxide) film. A back surface electrode 6 is formed on the back surface side of the n-type polycrystalline silicon substrate 1, and is formed with a thickness of 2 μm by vapor deposition of aluminum.

[Procedure Amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0036

[Correction method] Change

[Correction content]

FIG. 6 is a cross-sectional view showing a process of manufacturing the embodiment shown in FIG. 5, and is a cross-sectional view showing an embodiment of the manufacturing method of the present invention. Referring to FIG. 6A, n
A paste is applied on a predetermined portion of the mold polycrystalline silicon substrate 21 by using a silicon oxide paste by a screen printing method. The silicon oxide layer 22 is formed by baking under a baking condition of about 500 ° C. for 1 hour.

Claims (7)

[Claims] 1. A photovoltaic element having tabs soldered for modularization; a crystalline semiconductor layer of one conductivity type; a collector electrode electrically connected to the tabs by soldering; An insulating layer formed on or in the surface of the crystalline semiconductor layer located below the soldered portion of the electrode; and another conductive type amorphous semiconductor layer formed directly or indirectly on the crystalline semiconductor layer. And a photovoltaic element. 2. In the region where the insulating layer is formed, the amorphous semiconductor layer is formed on the insulating layer, and the collector electrode is formed above the insulating layer via the amorphous semiconductor layer. The photovoltaic element according to claim 1, which is 3. The photovoltaic element according to claim 1, wherein the collector electrode is directly formed on the insulating layer. 4. The photovoltaic element according to claim 1, wherein an insulating layer is formed below the collector electrode portion other than the soldering portion. 5. The photovoltaic element according to claim 1, wherein an intrinsic amorphous semiconductor layer is formed between the crystalline semiconductor layer and the amorphous semiconductor layer. 6. A step of forming an insulating layer on a predetermined portion of a crystalline semiconductor layer of one conductivity type; a step of forming a collecting electrode on the insulating layer; and a step of forming another collecting electrode after forming the collecting electrode. And a step of directly or indirectly forming the amorphous semiconductor layer on the crystalline semiconductor layer. 7. A step of forming an insulating layer on a predetermined portion of a crystalline semiconductor layer of one conductivity type; a step of directly or indirectly forming an amorphous semiconductor layer of another conductivity type on the crystalline semiconductor layer; Forming a collector electrode above the amorphous semiconductor layer on the insulating layer.