JPH06195497A - Bar code decoder - Google Patents

Abstract

PURPOSE:To improve versatile applicability by enabling the decode by the bidirectional reading for the bar code in which a supplemental code is attached to a standard code. CONSTITUTION:This decoder is provided with a decode processing means 11 inputting binary video signals showing bar code digital signals, bars space, outputting the character and parity of a standard code by decoding them and outputting various kinds of signals expressing a supplemental code by decoding the supplemental code and a sequence controller 14 detecting the character and parity of the standard code, determining a code type from a set parity pattern based on the parity pattern, detecting the character and the parity of the supplemental code and determining the code type from the set parity pattern based on the parity pattern.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bar code decoder for bar codes consisting of standard codes and supplemental codes.

[0002]

2. Description of the Related Art A bar code reader, as shown in FIG. 10, irradiates a light beam from a light beam generator 1 such as a laser generator onto a deflector 2 such as a polygon mirror or a vibrating mirror to deflect the light beam. The deflected light scans the barcode label 3. After the reflected light from the barcode label 3 is detected by the photodetector 4, the analog circuit 5 performs processes such as photoelectric conversion, signal amplification, A / D conversion, etc., and a time width corresponding to each bar width of the barcode. And a binary video signal representing a bar and a space are output.

The bar code digital signal and the video signal are input to a decoder 6, and the decoder 6 decodes the code code of each signal. That is, the transition of the bar and the space is delayed for a predetermined period (interval) and is generated as a character whenever a predetermined relationship described later is satisfied.

In the decoder 6, the character is judged by the ratio of the sum of four adjacent bar code digital signals and the sum of the preceding four adjacent bar code digital signals, and the theoretical value is 85% (27/32). If the above is satisfied, it is judged as a character.

The relationship between the character and the bar code digital signal and the video signal is determined under the following conditions.

Characters represented by the numbers 0 to 9 can be judged by a general module (bar width or space width minimum unit), and parity can be determined by the same method. There is. .

For example, the UPC code has a right margin and a guard bar, a left margin and a guard bar, and a central bar dividing the left and right character codes.

For such a UPC code, the current decoding position is i and the bar code digital signal is D
(I) Sum of four adjacent barcode digital signals, that is {D (i-3) + D (i-2) + D (i-1) +
The condition determination will be described by setting D (i)} to S (i), positive logic V (i) for a bar as a video signal, and negative logic V (i) for a space.

The left margin and the guard bar have a left margin of 5 modules or more, and the guard bar has a module of 1 module.
Space bar is a requirement.

As an expression that satisfies this, negative logic V (i-1) & positive logic V (i) & [S (i + 4)
<85% x S (i)] & [31.25% x {D (i-
3) + D (i-2)}> D (i-1) + D (i)].

Next, the left and right characters are divided by distinguishing the center bar into a left center bar and a right center bar.

The left center bar requires a bar of one module and a space. As an expression that satisfies this, negative logic V (i-1) & positive logic V (i) & [S (i) <8
5% x S (i-4)] & [negative logic V (i-7) is not the right margin and guard bar. ] & [Positive logic V (i) is not the left margin and guard bar. ] & [Positive logic V
(I-4) is neither the left margin nor the guard bar. ] &
[S (i + 1) is the number 1 or 2 or 7 or 8. ] & [S
(I) is the number 1 or 2 or 7 or 8. ] Is set.

The right center bar is subject to a space of one module, a bar, a space, and a bar. As an expression that satisfies this, negative logic V (i) & positive logic V (i-1) & [S (i) <8
5% × S (i + 4)] & [negative logic V (i + 4) is not the right margin and guard bar. ] & [Negative logic V (i) is not the right margin and guard bar. ] & [S (i-
1) is the number 1 or 2 or 7 or 8. ] & [S (i) is number 1
Or 2 or 7 or 8. ] Is set.

The right margin and guard bar have a right merge of 5
For modules and above, the guard bar requires one module bar and space. As an expression that satisfies this, negative logic V (i-2) & positive logic V (i-3) & [S (i-
4) <85% x S (i)] & [31.25% x {D
(I) + D (i-1)}> D (i-1) + D (i-
2)] is set.

The valid character and parity data from the decoder 6 are input to the sequence controller 7.

The sequence control device 7 performs a four-sequence control focusing on the fact that the transition interval is 4, and uses the left margin of the effective character and the guard bar as the start character and the left center bar as the stop character to determine the number data of the left half segment. And store parity data. Similarly, the right center bar of the effective character is used as a start character, and the right margin and guard bar are used as stop characters to store the right half segment number data and parity data. A code type table can be provided to determine the code type from the pattern of parity data.

If there is a supplemental code as shown in FIG. 11 in the label data, the sequence controller 7 determines that the parity array of the right half segment is "E,
E, E, E, E, E ”, it is assumed that there is a supplemental code in the following continuous data, and the supplemental sequence shown in the timing chart of FIG. 11 is activated to store the character. It is supposed to do.

That is, when the right margin and the guard bar are detected by the guard bar signal, the process transitions to step 7 (transition interval 7) and the LOAD-P signal is set to the high level at the position of the first supplemental character. Then, the first supplemental character is stored according to the high level of the LOAD-P signal, the counting operation of the supplemental counter is started, and the counter is counted by one.

Next, 6 sequence control of step 6 (transition interval 6) is performed to store the character at the time of transition. Then, 6 sequence control is executed until the supplemental counter counts 6, and a total of 6 characters of the corresponding 2 characters in FIG. 11 and some character not shown are transferred to the CPU 8.

[0020]

In the case of using such a decoder and sequence control device, a forward direction (from the left side to the right side in the figure) with respect to the bar code including the supplemental code (portion 08) shown in FIG. However, decoding in the opposite direction (reading from the right side to the left side in the figure) was not possible. However, a bar code reader cannot be practically used as a bar code reader unless the bar code can be scanned in the forward direction or in the reverse direction, and thus the conventional bar code decoder includes a supplemental code. There was a problem that it could not be used for barcodes.

Therefore, the present invention is intended to provide a bar code decoder capable of bidirectionally decoding a bar code including a supplemental code and improving versatility.

[0022]

The present invention comprises at least two aspects.
A bar code consisting of bars and spaces having different width values is input as a bar code digital signal corresponding to the width of each bar and space and a binary video signal representing the bar and space, and the code sign of the input signal is input. Bar code decoder for decoding In addition to decoding the character data and parity data of the standard code by the input bar code digital signal and video signal, the supplementary code by decoding the guard bar and margin of the supplemental code independently from the standard code. Decoding processing means for outputting various signals indicating the, the parity pattern setting means for setting the parity pattern of the standard code and the supplemental code, and the character data, the parity data and the supplemental code from the decoding processing means. The various signals representing the supplemental code are compared with the parity pattern of the supplemental code set in the parity pattern setting means, and the various signals satisfy the predetermined relationship with the parity pattern of the supplemental code. When the bar code is present, the bar code judging means for judging that the bar code is valid is provided.

[0023]

In the present invention having such a structure, the decoding processing means decodes the character data and the parity data of the standard code by the input bar code digital signal and video signal, and supplements the standard code independently of the standard code. It decodes the guard bar and margin of the code and outputs various signals representing the supplemental code. When the bar code determination means fetches character data, parity data, and various signals representing the supplemental code from the decoding processing means, the various signals representing the supplemental code and the parity pattern of the supplemental code set in the parity pattern setting means are obtained. By comparison, the bar code is determined to be valid when various signals satisfy a predetermined relationship with the parity pattern of the supplemental code.

[0024]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

As shown in FIG. 1, a bar code digital signal corresponding to the width of each bar and space and a binary video signal representing the bar and space from an analog circuit (not shown) are input to the decoding processing means 11. is doing. The decoding processing means 11 is a decoding processing unit 1 for standard codes.
2 and a decoding processing unit 13 for supplemental code are provided, and the decoding processing unit 12 decodes the character data and parity data of the standard code and outputs the character data and parity data.
It decodes the guard bar and margin of the supplemental code and outputs various signals representing the supplemental code.

Various signals representing character data, parity data, and supplemental codes from the decoding processing means 11 are supplied to the sequence controller 14.

The decoding processing means 11 is a latch timing for which a sufficient setup / hold time is guaranteed for a bar code digital signal having a time width corresponding to each bar width and a binary video signal representing a bar and a space. The clock is used to perform delay processing, and character data is generated when a predetermined relationship described later is satisfied, and an error signal is generated when the condition is not satisfied.

For each character, 0-9 is 1
Hexadecimal, Ah for the left margin and guard bar, Bh for the right margin and guard bar, Dh for the left center bar, Eh for the right center bar, and Fh for the error signal.

For the supplemental code, the input supplemental guard bar is INAD, the output supplemental guard bar is OUTAD, the input supplemental character is INCH, and the output supplemental character is O.
Indicated by UTCH.

The character is judged by the ratio of the sum of the four adjacent bar code digital signals and the sum of the preceding four adjacent bar code digital signals, and the theoretical value is 85%.
When (27/32) is satisfied, the character is judged.

The relationship between the character and the bar code digital signal and the video signal is determined under the following conditions. However, this does not apply to supplementary characters.

In the case of supplementary characters, one module space and bar are inserted between adjacent characters as character delimiters, so that the ADEQL signal is generated at these delimiters.

The ADEQL signal is judged by the ratio of the sum of four adjacent bar code digital signals and the transitional amount of space and bar to the sum of the preceding four adjacent bar code digital signals, and the theoretical value is 85%. When satisfied, it is effective.

Here, the current decoding position is i, the bar code digital signal is D (i), and the sum of four adjacent bar code digital signals, that is, {D (i-3) + D (i-
2) + D (i-1) + D (i)} is represented as S (i), a positive logic V (i) when the video signal is a bar, and a negative logic V (i) when the video signal is a space. The character Ah must have a left margin of 5 modules or more, and the guard bar must be 1 module of bar space bar. As an expression that satisfies this, negative logic V (i-1) & positive logic V (i) & [S (i + 4)
<85% x S (i)] & [31.25% x {D (i-
3) + D (i-2)}> D (i-1) + D (i)].

The character Bh has a right margin of 5 modules or more, and the guard bar has 1 module of bar space.
Bar is a requirement. As an expression that satisfies this, negative logic V (i-2) & positive logic V (i-3) & [S (i-
4) <85% x S (i)] & [31.25% x {D
(I) + D (i-1)}> D (i-1) + D (i-
2)] is set.

The character Dh requires a space bar space bar of one module. As an expression that satisfies this, negative logic V (i-1) & positive logic V (i) & [S (i) <8
5% × S (i-4)] & [negative logic V (i-7) is not Bh. ] & [Positive logic V (i) is not Ah. ] &
[Positive logic V (i-4) is not Ah. ] & [S (i +
1) is the number 1 or 2 or 7 or 8. ] & [S (i) is number 1
Or 2 or 7 or 8. ] Is set.

The character Eh is required to have a bar space bar space of one module. As an expression that satisfies this, negative logic V (i) & positive logic V (i-1) & [S (i) <8
5% × S (i + 4)] & [negative logic V (i + 4) is not Bh. ] & [Negative logic V (i) is not Bh. ] &
[S (i-1) is the number 1 or 2 or 7 or 8. ] & [S
(I) is the number 1 or 2 or 7 or 8. ] Is set.

Next, as various signals representing supplemental codes, INAD requires a space of 7 to 10 modules, a bar space of 1 module and a bar of 2 modules. As an expression that satisfies this, negative logic V (i-1) & positive logic V (i) & [40.6% x
{D (i-3) + D (i-2)}> D (i-1) + D
(I)] & [25.0% x {D (i-3) + D (i-
2)} <D (i-1) + D (i)] is set.

OUTAD is subject to a bar of 2 modules, a space bar of 1 module and a space of 7 to 10 modules. As an expression that satisfies this, negative logic V (i-2) & positive logic V (i-3) & [40.6
% × {D (i) + D (i-1)}> D (i-2) + D
(I-3)] & [25.0% x {D (i) + D (i-
1)} <D (i-2) + D (i-3)].

The INCH is required to have a space of 5 modules or more and two bars and spaces forming a character. As an expression that satisfies this, negative logic V (i) & positive logic V (i-1) & [62.5% x
S (i)> D (i-4)] is set.

OUTCH is required to have two spaces forming a character, a bar, and a space of 5 modules or more. As an expression that satisfies this, negative logic V (i-1) & positive logic V (i) & [62.5% x
S (i)> D (i + 1)] is set.

The sequence control device 14 is provided with a standard code sequence section 15, a bar code label determining means 16 and a parity pattern table 17 as a parity pattern setting means, and carries out a four sequence control focusing on a transition interval of 4. Then, the number data and the parity data of the left half segment are stored with the effective character Ah as the start character and Dh as the stop character. Similarly, with the valid character Eh as the start character and Bh as the stop character, the right half segment number data and parity data are stored.

For example, when the bar code label including the supplemental code shown in FIG. 12 is scanned as shown by the arrow in the figure, the decoding processing means 11 makes a determination according to the above-mentioned character determination condition for each transition of each bar and each space. .

Assuming that the character (right center bar) Eh which is the start character is captured in the cycle 1 by the standard code sequence unit 15 of the sequence controller 14, the effective character captured in the cycle 1 is shown in FIG.
It becomes the character shown in (a).

The sequence control device 14 recognizes that one half segment has been obtained when the character Bh, that is, the right margin and the guard bar are recognized.
At this time, the parity data is captured at the same time as the valid character data.

The sequence controller 14 stores the character data and the parity data representing the number surrounded by the start and stop characters, and further refers to the parity pattern table 17 to determine the code type based on the parity pattern (EEEEEE). decide.

The sequence controller 14 subsequently takes in the supplemental label shown in FIG. 3 from the decoding processing means 11 and makes a judgment by the bar code label judging means 16.
That is, when INAD which is the start character of the supplemental code is detected at the position of the stop character, that is, the transition interval 3 after the detection of the character Bh, the supplementary character is captured.

After detecting INAD, the first capture sequentially captures characters at the transition interval 4 and the second capture at the transition interval 6 and the capture process is executed until OUTCH is detected. At this time, it is effective as in the standard code. Only the character when the ADEQL signal is established to capture the character is regarded as the valid character and is captured. At this time, the parity data (00) is captured together with the character data.

The sequence controller 14 controls the OUTC
When H is recognized, the supplemental label attached to the half segment is obtained. At this time, if the number of supplemental characters “2” captured using the supplemental counter is counted, the supplemental character capturing process becomes more reliable.

The sequence controller 14 uses INAD
Character data and parity data that represent a number including OUTCH and OUTCH are stored, and Table 1 shows the determination whether the parity is valid parity, that is, the valid label, based on the parity pattern (00). The determination is made by referring to the supplemental code table of the parity pattern table 17 as described above.

Further, for example, when the bar code label including the supplemental code shown in FIG. 12 is scanned in the direction opposite to the direction shown by the arrow in the figure, the sequence control device 14 first causes the decoding processing means 11 to show in FIG. Bar code label determination means 1 that takes in supplemental labels
Judge at 6. That is, when INCH which is the first supplemental character is detected, the second character is captured at the transition interval 6 and OUTAD is further detected. Then, only the character when the ADEQL signal is established to capture the effective character is regarded as the effective character.

At this time, the supplemental counter is used to count the number of supplementary characters “2” captured. It is very effective to count the number of supplemental characters by the supplemental counter at the time of reading in the reverse direction. This is necessary to confirm the standard bar code label that always exists after the supplemental code surrounded by INCH and OUTAD. That is, processing can be performed under the condition that OUTAD is not recognized as a valid label even when OUTAD is detected while the supplemental counter is counting other than "2".

Then, after detecting OUTAD, when the character Ah (left margin and guard bar) is confirmed at the transition interval 3, it is determined that the supplemental code can be captured.

An effective character that is captured while satisfying these conditions is the character shown in FIG. At this time, the parity data (00) is captured together with the valid character data.

The sequence controller 14 uses the INCH
Character data and parity data that represent a number including INCH0 and are surrounded by OUTAD and OUTAD, and whether parity is valid parity, that is, valid label, based on the parity pattern (00), as shown in Table 1. It is determined by referring to the supplemental code table of the pattern table 17.

The sequence control device 14 continuously captures the bar code label of the standard code by the standard code sequence section 15 when the character Ah is confirmed. That is, when the character Ah, which is the start character, is captured in cycle 2, the effective character captured in cycle 2 becomes the character shown in FIG. 2 (b).

The sequence controller 14 recognizes that one half segment has been obtained when the character Dh, that is, the left center bar is recognized. At this time, the parity data is captured at the same time as the valid character data.

The sequence controller 14 stores the character data and the parity data representing the number surrounded by the start and stop characters, and further refers to the parity pattern table 17 for the code type based on the parity pattern (EEEEEE). decide.

[0059]

[Table 1] As described above, for the supplemental label, the decoding processing means 11 makes an IN from the read supplemental code.
Various signals representing supplemental codes such as AD, OUTCH, INCH, OUTAD are generated, the sequence controller 14 detects the valid character and its parity pattern from the various signals, and the parity pattern is supplemented by the parity pattern table 17. Since it is determined whether the label is a valid label or not by referring to the code table, it is possible to perform bidirectional reading scanning for the supplemental label as well as the standard label.

Therefore, it is possible to decode a bar code label consisting only of standard labels, as well as a bar code label in which a supplemental label is attached to a standard label, and it is possible to improve versatility.

Although the case where the number of characters of the supplemental label is two has been described above, even when the number of characters of the supplemental label is five as shown in FIGS. 5 and 6, bidirectional reading is performed by the same processing. Can be decoded.

That is, FIG. 5 shows the supplemental label character and parity pattern and various signal timings during forward reading, and FIG. 6 shows the supplemental label character and parity pattern and various signal timings during backward reading. Is shown. Then, the table of Table 2 may be used as a supplemental code table for determining whether or not this supplemental label is an effective label.

[0063]

[Table 2] Next, another embodiment of the present invention will be described with reference to the drawings.

As shown in FIG. 7, this is a bar code digital signal and bar corresponding to the width of each bar and space,
A binary video signal representing a space is input to the barcode reading unit 21.

The bar code reading section 21 includes standard code decoding algorithm executing means 22 for executing standard code decoding, supplemental code decoding algorithm executing means 23 for executing supplemental code decoding, and each executing means 22. , 23 and the parity pattern table 17 are provided with a label determination unit 24 for determining whether the label is a standard code label or a label in which a standard code and a supplemental code are paired. Each of the algorithm executing means 22 and 23 constitutes a decoding processing means, and the label judging section 24 constitutes a bar code judging means.

The result determined by the label determination unit 24, that is, the character data and the code type are transferred to the storage unit 25 and stored therein. The storage unit 25 notifies the CPU 26 that it stores character data and code type. As a result, the CPU 25 knows that the barcode label has been read and can always obtain the barcode data from the storage unit 25 thereafter.

For example, the current decoding position is i, the bar code digital signal is D (i), the sum of adjacent bar code digital signals, that is, {D (i-1) + D (i)} is T.
(I) The sum of four adjacent bar code digital signals, that is, {T (i-2) + T (i)} is S (i), positive logic V (i) when a bar is used as a video signal, space If it is expressed as negative logic V (i), the standard code decoding algorithm executing means 22 executes the following algorithm.

The input margin is positive logic V (i-2) & negative logic V (i-1) & positive logic V
(I) & [S (i + 4) <85% × S (i)] & [3
1.25% x T (i)> T (i-2)] & [31.25
% × T (i)> T (i-1)] is set.

The output margin is as follows: positive logic V (i-3) & negative logic V (i-2) & positive logic V
(I-1) & negative logic V (i) & [S (i-4) <85%
XS (i)] & [31.25% x T (i)> T (i-
2)] & [31.25% × T (i)> T (i-1)].

The input center bar is: negative logic V (i-4) & positive logic V (i-3) & negative logic V
(I-2) & positive logic V (i-1) & negative logic V (i) &
[S (i + 4) is not the output margin. ] & [42.
97% × S (i + 4) <S (i) <78.91% S (i
+4)] & [S (i-1) is the number 1 or 2 or 7 or 8. ] Is set.

The output center bar has positive logic V (i-3) & negative logic V (i-2) & positive logic V
(I) & negative logic V (i-1) & [S (i-4) is not an input margin. ] & [42.97% × S (i-4) <
S (i) <78.91% S (i-4)] & [S (i-
1) is the number 1 or 2 or 7 or 8. ] Is set.

For each set value, four sequence control is performed with attention paid to the transition interval of 4, and character data and parity data of the left half segment are captured with the input margin as the start and the output center bar as the stop.

Similarly, the character data and parity data of the right half segment are captured using the input center bar as the start and the output margin as the stop.

The standard code decoding algorithm executing means 22 outputs the captured character and code type to the label determining section 24.

The decoding algorithm executing means 23 for supplemental code executes the following algorithm.

The input supplemental margin is as follows: negative logic V (i-3) & positive logic V (i-2) & positive logic V
(I-1) & negative logic V (i) & [40.6% x T (i-
2)> T (i)] & [25.0% × T (i) ≦ T (i−
2)] is set.

The output supplemental margin is as follows: positive logic V (i-3) & negative logic V (i-2) & positive logic V
(I-1) & negative logic V (i) & [40.6% x T (i)
> T (i-2)] & [25.0% × T (i-2) ≦ T
(I)] is set.

The input character is: negative logic V (i) & positive logic V (i-1) & [62.5% ×
S (i) <D (i-4)] is set.

The output character is: negative logic V (i + 1) & positive logic V (i) & [62.5% ×
S (i) <D (i + 1)] is set.

Each set value captures the character data and the parity data of the supplemental code in the forward direction with the input supplemental margin as the start and the output character as the stop.

Similarly, the character data and the parity data of the supplementary code in the opposite direction are captured with the input character as the start and the output supplemental margin as the stop.

The supplemental code decoding algorithm executing means 23 outputs the captured character and code type to the label determining section 24.

The label judging section 24 judges the bar code label by referring to the parity pattern table 17 based on the parity data from the standard code decoding algorithm executing means 22.

In the embodiment having such a configuration, when the bar code label with the supplemental code is scanned, for example, on the right half segment and the supplemental code, the standard code decoding algorithm executing means 22 first
As shown in FIG. 2 (a), the input center bar E which is the start triggers to capture the character at the transition interval 4. Then, when the output margin B is recognized, it is known that the right half segment has been obtained. At this time, the parity data is also captured at the same time.

The label determining unit 24 stores the character data and the parity data surrounded by the start and stop, and further determines the code type based on the parity pattern (EEEEEE) by referring to the parity pattern table 17. Since this code type may be accompanied by a supplemental code, the character code and the code type are transferred to the storage unit 24, and at the same time, the flag memory F provided inside is set. The set state of the flag memory F is held until the next standard code is input or the supplemental code is input, and when the storage section 24 knows the set state of the flag memory F, the CPU 25
Do not notify the label reading for. This state continues until the flag memory F is reset.

Next, as shown in FIG. 8, the supplemental code decoding algorithm executing means 23 is triggered by the input supplemental margin which is the start,
The first character is captured at transition intervals 4, and the second and subsequent characters are sequentially captured at transition intervals 6 including the bars and spaces inserted between the characters. Then, when the output character is recognized, it is known that one forward supplemental code is obtained. At this time, the parity data is also captured at the same time.

The label determining unit 24 stores the character data and the parity data surrounded by the start and stop, and further determines the code type by referring to the parity pattern table 17 based on the parity pattern "00E0E". That is, it is determined with reference to Table 2. Then, after confirming that the flag memory F is set, the character data and the code type are transferred to the storage unit 24, and at the same time, the flag memory F is reset. At this time, the code type of the standard code stored in the storage unit 24 is changed to the code type indicating that the supplemental code is attached.

Further, for example, when the supplemental code is scanned in the reverse direction, first, the supplemental code decoding algorithm executing means 23, as shown in FIG.
When the input character "1" which is a character is detected,
The second and subsequent characters are sequentially captured at transition intervals 6. Then, at the time when the output supplemental margin is recognized, it is known that one backward supplemental code is obtained. At this time, the parity data is also captured at the same time.

The label determining section 24 stores the character data and the parity data surrounded by the input character and the output supplemental margin, and further determines the code type by referring to the parity pattern table 17 based on the parity pattern "E0E00". To do. That is, it is determined with reference to Table 2. Then, after confirming that the flag memory F is set, the character data and the code type are transferred to the storage unit 24, and at the same time, the flag memory F is set. The set state of the flag memory F is held until the next standard code is input.

Next, as shown in FIG. 2B, the standard code decoding algorithm executing means 22 captures the character at the transition interval 4 triggered by the input margin A which is the start. Then, when the output center bar D is recognized, it is known that the right half segment has been obtained. At this time, the parity data is also captured at the same time.

The label determination section 24 stores the character data and the parity data surrounded by the start and stop, and further determines the code type by referring to the parity pattern table 17 based on the parity pattern (EEEEEE). Since this code type may be accompanied by a supplemental code, the character code and the code type are transferred to the storage unit 24, and at the same time, it is confirmed whether or not the flag memory F provided therein is set. In this case, since the flag memory F is in the set state, the fact that the supplemental code is attached to the code type is stored and transferred to the storage unit 24. Then, the flag memory F is reset.

As described above, also in the present embodiment, bidirectional reading and scanning can be performed on the supplemental label similarly to the standard label. Therefore, it is possible to decode not only a bar code label consisting of only standard labels, but also bar code labels in which supplementary labels are attached to standard labels, thus improving versatility.

Moreover, it is possible to determine whether the decoded label is only the standard code or the standard code accompanied by the supplemental code, by determining whether the flag memory F is in the set state or not, and the determined result is stored as the code type in the storage unit 2
Since it is stored in 4 with the character code, CP
After that, the U25 can independently read the character data of the standard code from the storage unit 24 for the label having only the standard code at any timing to perform the desired processing.
Further, for the label of the standard code accompanied by the supplementary code, the character data of the standard code and the character data of the supplemental code can be read as a pair from the storage unit 24 to perform desired processing. Further, in some cases, even if the label is a standard code accompanied by a supplemental code, it is possible to read only the standard code and perform desired processing if the setting that makes the supplemental code unnecessary is made in advance. Therefore, versatility can be further improved.

In each of the embodiments described above, the parity pattern table is used as the parity pattern setting means, but the present invention is not limited to this, and a program may be set.

[0095]

As described above, according to the present invention, various signals representing character data, parity data and a supplemental code from the decoding processing means are taken in, and various signals representing the supplemental code are set in the parity pattern setting means. Compared with the parity code of the mental code, the barcode is judged to be valid when various signals satisfy the predetermined relationship with the parity pattern of the supplemental code, so the supplemental code is added to the standard code. The attached bar code can be decoded by bidirectional reading, improving versatility.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a diagram for explaining a standard bar code reading process in the embodiment.

FIG. 3 is a view for explaining a reading process at the time of reading the supplemental code in the forward direction in the embodiment.

FIG. 4 is a view for explaining a reading process at the time of reading the supplemental code in the backward direction in the embodiment.

FIG. 5 is a view for explaining a reading process at the time of forward reading when different types of supplemental codes are added in the same embodiment.

FIG. 6 is a diagram for explaining a reading process at the time of backward reading when different types of supplemental codes are added in the embodiment.

FIG. 7 is a block diagram showing another embodiment of the present invention.

FIG. 8 is a view for explaining a reading process at the time of reading the supplemental code in the forward direction in the embodiment.

FIG. 9 is a view for explaining a reading process at the time of reading the supplemental code in the backward direction in the embodiment.

FIG. 10 is a block diagram showing a configuration of a barcode reading device.

FIG. 11 is a view for explaining a conventional problem when reading a supplemental code.

FIG. 12 is a view showing a barcode label in which a supplemental code is attached to a standard code.

[Explanation of symbols]

 11 ... Code processing means 14 ... Sequence control device 17 ... Parity pattern table

Claims (1)

[Claims] 1. A bar code consisting of a bar and a space having at least two kinds of width values is inputted as a bar code digital signal corresponding to the width of each bar and space and a binary video signal representing the bar and space. In a bar code decoder that decodes the code code of the input signal, the character data and parity data of the standard code are decoded by the input bar code digital signal and video signal, and the supplementary code guard bar and the standard code are provided independently of the standard code. Decoding processing means for decoding the margin and outputting various signals representing the supplemental code, parity pattern setting means for setting the parity patterns of the standard code and the supplemental code, the character data and the parity data from the decoding processing means. And various signals representing the supplemental code are taken in, the various signals representing the supplemental code are compared with the parity pattern of the supplemental code set in the parity pattern setting means, and the various signals are compared with the parity pattern of the supplemental code. A bar code decoder comprising bar code judging means for judging that a bar code is valid when a predetermined relationship is satisfied.