JPH06189553A - Power supply circuit - Google Patents

Abstract

PURPOSE:To reduce the peak value of a charging current flowing into a smoothing capacitor during the chopping and smoothing process, on the occasion of supplying a stable DC voltage, obtained through chopping and smoothing process for a rectified output voltage, to a load. CONSTITUTION:Under the condition that a pair of SCR 38 and capacitor 40 and a pair of SCR 39 and capacitor 41 are provided for conducting chopping and smoothing process for the rectified output voltage from a full-wave rectifier circuit 36, the capacitor 40 has a comparatively small capacitance and the capacitor 41 has a comparatively large capacitance, a control pulse signal for causing an SCR 38 to conduct is first supplied during each level-reducing period of the rectified output voltage. Thereafter, a control pulse signal is then supplied for causing an SCR 39 to conduct in view of obtaining stable DC voltage of the predetermined levels across the capacitor 40 and capacitor 41.

Description

Detailed Description of the Invention

[0001]

INDUSTRIAL APPLICABILITY The present invention obtains a stable DC voltage having a predetermined level by performing chopping and smoothing processing on a rectified output voltage obtained by rectifying an AC voltage. The present invention relates to a power supply circuit that supplies a DC voltage as a power supply voltage to a load.

[0002]

2. Description of the Related Art A voltage forming circuit for obtaining a stabilized DC voltage of a relatively small level based on a rectified voltage obtained by rectifying an AC voltage from a commercial AC power source is used as a power supply circuit in various electronic devices. Widely used for practical use. Various types of power supply circuits that supply a stabilized DC voltage of such a relatively small level are being proposed, and for example, a rectified output voltage obtained by rectifying an AC voltage is used. On the other hand, a chopper type that performs a chopping and smoothing process with feedback control to obtain a stabilized DC output voltage that takes a predetermined level, an AC based on the rectified output voltage obtained by rectifying the AC voltage A converter system that obtains a voltage, obtains a desired level, and then converts it to direct current again, in which case feedback control is performed to obtain a stabilized direct current voltage that has a predetermined level, Are known that employ both the chopper method and the converter method.

FIG. 4 shows an example of a conventionally proposed chopper type power supply circuit. In the power supply circuit shown in FIG. 4, a pair of power supply connection terminals 11A and 11B is used.
In the meantime, the AC voltage AV from the commercial AC power supply is supplied.
Then, the AC voltage AV is supplied to the double-wave rectification circuit unit 12, whereby the output terminal 14 of the double-wave rectification circuit unit 12 is
A rectified output voltage Vr, which is formed by double-wave rectifying the AC voltage AV, is obtained.

The rectified output voltage Vr obtained at the output terminal 14 of the full-wave rectification circuit section 12 is an input terminal of a silicon controlled rectifier (SCR) 15 which is a typical thyristor as a switching element. Is supplied to the anode. A capacitor 16 is connected between the cathode side of the SCR 15 and the ground potential point.

A rectified output voltage Vr obtained at a connection point 19 between a resistance element 17 and a resistance element 18 connected in series between the output terminal 14 of the full-wave rectification circuit section 12 and the ground potential point. The voltage Vr ′ formed by dividing the voltage by the resistance elements 17 and 18 is supplied to the conduction state control unit 20.
In the conduction state control unit 20, as shown in the time chart of FIG. 5, the rectified output voltage is set by referring to the voltage Vr ′ supplied from the connection point 19 between the resistance element 17 and the resistance element 18. The control pulse signal Pt is formed at a predetermined timing within each level fluctuation cycle of Vr, and the formed control pulse signal Pt is SCR15.
Is supplied to the gate. As a result, the SCR 15 causes the rectified output voltage Vr to rise as shown in the time chart of FIG.
Of the control pulse signal Pt, which is a predetermined time point in each level reduction period, from the time point of the leading edge of each control pulse signal Pt to the time point of the end of the level reduction period. , And is in a non-conducting state (off state) in other periods.

Then, every time the SCR 15 is turned on, the rectified output voltage Vr supplied to the anode of the SCR 15 is led to the cathode side of the SCR 15 and supplied to the capacitor 16, which causes the capacitor 16 to:
As shown in the time chart of FIG. 5, the charging current Ic through the SCR 15 flows. As a result, capacitor 1
Between both ends of 6, the rectified output voltage Vr derived through the SCR 15 is smoothed to obtain the DC voltage Vo. The DC voltage Vo thus obtained across the capacitor 16 is led to the output terminal 21 provided at one end of the capacitor 16 and supplied to the load circuit section 22 connected to the output terminal 21 as a power supply voltage. .

The load circuit section 22 is additionally provided with a fluctuation detecting section 23 for detecting fluctuations in the power supply voltage therein.
A fluctuation detection output Dv obtained from the fluctuation detector 23 according to the fluctuation of the power supply voltage in the load circuit 22 is supplied to the conduction state controller 20. In the conduction state control unit 20, the generation timing of the control pulse signal Pt formed within each level fluctuation cycle of the rectified output voltage Vr is changed in accordance with the fluctuation detection output Dv from the fluctuation detection unit 23, whereby , SCR 15 is kept conductive for controlling the DC voltage Vo obtained across both ends of the capacitor 16 such that fluctuations in the power supply voltage in the load circuit section 22 are suppressed. That is, S
The conduction phase control in CR15 is performed, and as a result, a stable DC voltage Vo having a predetermined level is obtained at the output terminal 21.

[0008]

In the conventional power supply circuit shown in FIG. 4 as described above, the output terminal of the full-wave rectification circuit section 12 is connected to the cathode side of the SCR 15 and cooperates with the SCR 15. The capacitor 16 that performs the chopping and smoothing processing on the rectified output voltage Vr obtained at 14 and obtains the DC voltage Vo across the rectified output voltage Vr is usually assumed to have a relatively large capacity. Therefore, as shown in FIG. 5, the charging current Ic flowing through the capacitor 16 has an extremely large peak value every time the SCR 15 is brought into the conducting state according to the control pulse signal Pt from the conducting state control unit 20. Supposed to be the capacitor 1
There is a risk that the burden on 6 will be heavy and that unwanted noise will be induced.

In view of the above point, the present invention performs a chopping and smoothing process on a rectified output voltage obtained by rectifying an AC voltage by a switching element and a capacitor to generate a stable DC voltage having a predetermined level. When performing the operation of supplying the obtained DC voltage to the load as the power supply voltage, the rectified output voltage is chopped and smoothed in cooperation with the switching element, and the DC voltage is obtained across the both ends. It is an object of the present invention to provide a power supply circuit capable of reducing the peak value of the charging current of the different capacitor flowing in each conduction period of the switching element.

[0010]

In order to achieve the above object, a power supply circuit according to the present invention comprises a rectifying section for rectifying an AC voltage from an AC power source to obtain a rectified output voltage, and a rectifying section for each input terminal. Of the first and second switching elements, which are connected to the output terminals of the first and second switching elements to which the rectified output voltage obtained by the rectifying section is supplied, and one end of which is connected to the output terminals of the first switching element. A first capacitor having a smaller capacity, a second capacitor having one end connected to the output end of the second switching element and having a larger capacity than the first capacitor, and a cathode at one end of the first capacitor Is connected to a diode having an anode connected to one end of the second capacitor and a load, and a DC voltage obtained through the load through one end of the first capacitor is used as a power supply voltage. An output terminal for supplying the first and second
And a conduction state control unit for the switching element of
The conduction state control unit causes the first control signal and the second switching element for causing the first switching element to be in the conduction state intermittently within each level change cycle of the rectified output voltage obtained by the rectification unit. The first and second control signals obtained by forming the first control signal and the second control signal for making the conductive state intermittently at mutually different timings
Of the switching element and the control terminal of the second switching element, respectively.

[0011]

In the power supply circuit according to the present invention having such a configuration, the conduction state control section is provided, for example, during the level reduction period within each level change cycle of the rectified output voltage obtained by the rectification section. The first and second control signals from the first cause the first switching element to be in a conductive state while the level of the rectified output voltage is relatively high, and then the second switching element. However, it is assumed that the rectified output voltage is brought into a conductive state after being lowered from a relatively high level. When the first switching element is turned on, a current based on the rectified output voltage having a relatively large level, which is derived from the input side to the output side through the first switching element, is applied to the first switching element. The capacitor flows as charging current, but the first
The capacitor has a relatively small capacity, so that the peak value of the charging current flowing through the first capacitor is suppressed to a relatively small value. Also,
Following the transition of the first switching element to the conductive state,
When the second switching element is turned on, the second
A current based on the rectified output voltage having a level reduced from a relatively large state, which is derived from the input side to the output side through the switching element of, flows through the second capacitor as a charging current. Since the level of the rectified output voltage is lowered, the peak value of the charging current flowing through the second capacitor is relatively small.

In this way, a stable DC voltage having a predetermined level is obtained at the output terminal provided at one end of the first capacitor and is supplied as a power supply voltage to the load connected to the output terminal. Under the circumstances, the charging currents flowing through the first and second capacitors, respectively, when the first and second switching elements are in a conductive state, have their peak values relatively small. become.

[0013]

1 shows an example of a power supply circuit according to the present invention. In this example, the AC voltage AV from the commercial AC power supply is supplied between the pair of power supply connection terminals 31A and 31B. The AC voltage AV is applied to the rectifying diode 3
2, 33, 34 and 35 are supplied to the full-wave rectification circuit section 36, whereby the AC voltage AV is full-wave rectified at the output terminal 37 of the full-wave rectification circuit section 36. The voltage VR is obtained.

The rectified output voltage VR obtained at the output terminal 37 of the full-wave rectification circuit section 36 is supplied to the anodes that form the input terminals of the SCRs 38 and 39, which are typical of thyristors, which are switching elements. It A capacitor 40 is connected between the cathode side of the SCR 38 and the ground potential point, and a capacitor 41 is connected between the cathode side of the SCR 39 and the ground potential point. Has been done. The capacitor 40 is assumed to have a relatively small capacitance C1, while the capacitor 41
Has a relatively large capacitance C2 that is larger than the capacitance C1 (C1 <C2). In addition, SCR38
A diode 42 having a cathode connected to the connection point between the cathode and the capacitor 40 and an anode connected to the connection point between the cathode of the SCR 39 and the capacitor 41 is provided.

The rectified output voltage VR obtained at the connection point 45 between the resistance element 43 and the resistance element 44 connected in series between the output terminal 37 of the full-wave rectification circuit section 36 and the ground potential point. The voltage VR ′ formed by dividing the voltage by the resistance elements 43 and 44 is supplied to the conduction state control unit 46.
In the conduction state control unit 46, as shown in the time chart of FIG. 2, the rectified output voltage set by referring to the voltage VR ′ supplied from the connection point 45 between the resistance element 43 and the resistance element 44. In each level fluctuation period in VR, for example, in the level reduction period TR, the control pulse signal PT1 for making the SCR 38 conductive at the timing of its start end side is formed, and at the same time the control pulse signal PT1 is formed. The control pulse signal PT2 for causing the SCR 39 to be in the conductive state is formed at a timing later than the timing.

Then, in each level reduction period TR of the rectified output voltage VR, first, the control pulse signal PT1 becomes SC.
It is supplied to the gate of R38 as a trigger signal, and then the control pulse signal PT2 is supplied to the gate of SCR39 as a trigger signal. As a result, SCR38
However, as shown in the time chart of FIG. 2, in the period from the leading edge of the control pulse signal PT1 in each level reduction period TR of the rectified output voltage VR to the end of the level reduction period TR, the conduction state ( It is assumed to be in an on state) and to be in a non-conducting state (off state) in other periods. Similarly, as shown in the time chart of FIG. 2, the SCR 39 is a period from the leading edge of the control pulse signal PT2 to the end of the level reduction period TR in each level reduction period TR of the rectified output voltage VR. In, the conductive state (ON state) is set, and in the other period, the non-conductive state (OFF state) is set.

During the period in which the SCR 38 is in the conductive state, the rectified output voltage VR supplied to the anode of the SCR 38 is led out to the cathode side of the SCR 38 and supplied to the capacitor 40, which causes the capacitor 40 to: The charging current IC1 flows through the SCR 38 as shown in the time chart of FIG. As a result, capacitor 4
A DC voltage VO1 formed by smoothing the rectified output voltage VR derived through the SCR 38 is obtained between both ends of 0. At this time, in the beginning of the period in which the SCR 38 is in the conductive state, the rectified output voltage VR derived through the SCR 38 at that time is relatively large corresponding to the timing of the start end side in the level reduction period TR. Although having a level, the capacitor 40 is selected to have a relatively small capacitance C1, so that the charging current IC1 flowing through the capacitor 40 is suppressed to have a relatively small peak value. To be taken.

Further, during the period in which the SCR 39 is in the conductive state, the rectified output voltage VR supplied to the anode of the SCR 39 is led to the cathode side of the SCR 39 and supplied to the capacitor 41, whereby the capacitor 41 is charged. Is the SCR3 as shown in the time chart of FIG.
The charging current IC2 through 9 flows. As a result, the rectified output voltage VR derived through the SCR 39 is smoothed across the capacitor 41 to form a DC voltage VO.
2 is obtained. At this time, the capacitor 41 is selected to have a relatively large capacitance C2 that is larger than the capacitance C1, but during the period in which the SCR 39 is in the conducting state, it is derived through the SCR 38 at that time. Since the rectified output voltage VR has a level reduced as compared with a relatively large level corresponding to the timing of the start end side in the level reduction period TR, the charging current IC2 flowing through the capacitor 41 also. , Its peak value will be relatively small.

As described above, the DC voltage VO1 is obtained across the capacitor 40 and the DC voltage VO2 is obtained across the capacitor 41, and the level of the DC voltage VO1 is equal to the DC voltage VO2. , The DC voltage VO1 is led to an output terminal 47 provided at one end of the capacitor 40, and the DC voltage VO1
When the level of 2 becomes higher than the DC voltage VO1, the DC voltage VO2 is led out to the output terminal 47 provided at one end of the capacitor 40 through the diode 42. Then, the DC voltage VO1 or the DC voltage VO2 led to the output terminal 47 is supplied to the load circuit section 48 connected to the output terminal 47 as a power supply voltage.

The load circuit section 48 is provided with a fluctuation detecting section 49 for detecting fluctuations in the power supply voltage therein.
The fluctuation detection output DV, which is obtained from the fluctuation detection unit 49 and corresponds to the fluctuation of the power supply voltage in the load circuit unit 48, is supplied to the conduction state control unit 46. In the conduction state control unit 46, the generation timing of the control pulse signals PT1 and PT2 formed during the level reduction period TR in each level fluctuation period for the rectified output voltage VR is the fluctuation detection unit 49.
Of the DC voltage VO1 obtained across the capacitor 40 and the capacitor 41 between the DC voltage VO1 obtained across the capacitor 40 and the capacitor 41. The controlled DC voltage VO2 is controlled so that the fluctuation of the power supply voltage in the load circuit section 48 is suppressed. That is, S
The conduction phase control is performed in the CRs 38 and 39, and as a result, a stable DC voltage having a predetermined level is obtained at the output terminal 47.

FIG. 3 shows another example of the power supply circuit according to the present invention. This example includes many parts configured similarly to the example shown in FIG. 1, and the parts corresponding to the parts shown in FIG. 1 in FIG. And shown, and duplicate description thereof is omitted.

In the example shown in FIG. 3, in addition to the configuration of the example of FIG. 1, an SCR 50, a capacitor 51 and a diode 52 are provided, and the conduction state control unit 46 in the example of FIG. 1 is provided. Instead, the conduction state control unit 53 is provided. Then, the output end 37 of the both-wave rectification circuit unit 36
The rectified output voltage VR thus obtained is supplied not only to the respective anodes of the SCRs 38 and 39, but also to the anode forming the input end of the SCR 50. A capacitor 51 is connected between the cathode side of the SCR 50 and the ground potential point, and the capacitor 51 has a large capacitance C3 which is larger than the capacitance C2 of the capacitor 41. (C1 <C2 <C3). Also, SCR
A diode 52 having a cathode connected to the connection point between the cathode of 39 and the capacitor 41 and an anode connected to the connection point between the cathode of the SCR 50 and the capacitor 51 is provided.

Based on this, in the conduction state control unit 53, the same control pulse signals PT1 and PT2 as those formed in the conduction state control unit 46 in the example of FIG.
Of the rectified output voltage VR
In the level reduction period in each level fluctuation cycle in, the control pulse signal PT3 for making the SCR 50 conductive is formed at a timing that is further delayed than the timing at which the control pulse signal PT2 is formed.
Then, in each level reduction period of the rectified output voltage VR, first, the control pulse signal PT1 is supplied to the gate of the SCR 38 as a trigger signal, and subsequently, the control pulse signal PT2 is supplied to the gate of the SCR 39 as a trigger signal. After that, the control pulse signal PT3 becomes SC
It is supplied to the gate of R50 as a trigger signal. As a result, the SCR 38 is in a conductive state during a period from the leading edge of the control pulse signal PT1 to the end of the level reducing period in each level reducing period of the rectified output voltage VR, and is non-conducting in other periods. The SCR 39 is in a conducting state during a period from the leading edge of the control pulse signal PT2 during each level reduction period of the rectified output voltage VR to the end of the level reduction period, and the other states It is assumed to be in a non-conduction state (off state) during the period, and further, the SCR50
Of the rectified output voltage VR is in a conductive state during the period from the leading edge of the control pulse signal PT3 to the end of the level reduction period in each level reduction period of the rectified output voltage VR, and is in a non-conductive state (OFF state) in other periods. ) Is taken.

The period during which the SCR 38 is conductive and the S
In the period in which the CR 39 is in the conductive state, the same operation as in the case of the example of FIG. 1 is performed. Then, during the period in which the SCR 50 is in the conductive state, the rectified output voltage VR supplied to the anode of the SCR 50 is led to the cathode side of the SCR 50 and supplied to the capacitor 51, whereby the SCR 50 is supplied to the capacitor 51. The charging current IC3 flows through. As a result, a DC voltage VO3 formed by smoothing the rectified output voltage VR derived through the SCR 50 is obtained across the capacitor 51. At this time, the capacitor 51 is selected to have a capacitance C3 that is larger than the capacitance C2 of the capacitor 41, but during the period when the SCR 50 is in the conductive state,
At that time, the rectified output voltage V derived through the SCR 50
Since R has a relatively small level corresponding to the timing on the terminal side in the level reduction period TR, the charging current IC flowing through the capacitor 51.
Also in No. 3, the peak value will be relatively small.

In this way, a DC voltage VO1 is obtained across the capacitor 40, a DC voltage VO2 is obtained across the capacitor 41, and a DC voltage VO3 is obtained across the capacitor 51. Therefore, when the level of the DC voltage VO1 is equal to or higher than the respective levels of the DC voltages VO2 and VO3, the voltage VO1 changes to the capacitor 4
0 is output to the output terminal 47 provided at one end, and when the level of the DC voltage VO2 becomes higher than the DC voltage VO1, the DC voltage VO2 passes through the diode 42 to the output terminal 47 provided at one end of the capacitor 40. Further, the level of the DC voltage VO3 is derived and the level of the DC voltage VO3 is
And VO2 respectively, the DC voltage VO
3 through the diodes 52 and 42 to the capacitor 4
It is led out to the output terminal 47 provided at one end of 0. Then, the voltages VO1 and VO2 or the DC voltage VO3 derived to the output terminal 47 are supplied to the load circuit section 48 connected to the output terminal 47 as a power supply voltage.

Also in this case, the control pulse signal P formed in the conduction state control unit 53 during the level reduction period within each level fluctuation cycle of the rectified output voltage VR.
The generation timings of T1, PT2, and PT3 are changed according to the fluctuation detection output DV from the fluctuation detection unit 49, whereby the period in which the SCRs 38, 39, and 50 are in the conductive state is the capacitor 40. The fluctuation of the power supply voltage in the load circuit unit 48 is suppressed by the DC voltage VO1 obtained between both ends, the DC voltage VO2 obtained between both ends of the capacitor 41, and the DC voltage VO3 obtained between both ends of the capacitor 51. Controlled to do so. That is, the conduction phase control in the SCRs 38, 39 and 50 is performed, and as a result, the output terminal 47
Moreover, a stable DC voltage having a predetermined level can be obtained.

In the example of FIG. 1 described above, there are two sets of a switching element and a capacitor (SCR 38 and capacitor 40) for performing chopping and smoothing processing on the rectified output voltage.
And SCR39 and capacitor 41), the example of FIG.
Three sets of switching elements and capacitors (SCR3) that perform chopping and smoothing processing on the rectified output voltage
8 and capacitor 40 and SCR 39 and capacitor 41
And the SCR 50 and the capacitor 51), the power supply circuit according to the present invention is not limited to these examples, and includes a set of a switching element and a capacitor for performing chopping and smoothing processing on the rectified output voltage. It is also possible to configure as having more than one set. Further, in the example of FIG. 1 and the example of FIG. 3, the selection and derivation of the rectified output voltage by the switching element for the chopping and smoothing processing for the rectified output voltage is performed in the level reduction period within each level fluctuation cycle of the rectified output voltage. However, in the power supply circuit according to the present invention, unlike this example, selective derivation of the rectified output voltage by the switching element for chopping and smoothing processing for the rectified output voltage is performed in the rectified output voltage. During the level increase period within each level fluctuation cycle, or
It may be performed during both the level reduction period and the level increase period within each level fluctuation cycle of the rectified output voltage.

Further, in the example of FIG. 1 and the example of FIG. 3, the SCR is used as a switching element for performing the chopping and smoothing processing on the rectified output voltage, but the power supply circuit according to the present invention uses these SCRs. The switching element for performing the chopping and the smoothing process on the rectified output voltage is not limited to the example, and is not limited to the SC.
Instead of R, for example, another switching element such as a field effect transistor (FET) may be used.

[0029]

As is apparent from the above description, in the power supply circuit according to the present invention, chopping and smoothing processing by a switching element and a capacitor for a rectified output voltage obtained by rectifying an AC voltage are performed. In doing so, when a stable DC voltage is obtained at the output terminal and the obtained DC voltage is supplied as a power supply voltage to the load connected to the output terminal, chopping and smoothing processing for the rectified output voltage are performed. A switching element and a first capacitor group and a second switching element and a second capacitor group are provided, and the first capacitor has a relatively small capacity, and the second capacitor Capacitor has a relatively large capacity, which is larger than the capacity of the first capacitor. When the first switching element is turned on, the rectified output voltage having a relatively high level is supplied to the first capacitor through the first switching element, and at this time, the first capacitor is relatively By having a small capacity, the charging current flowing through the first capacitor is operated so that its peak value is suppressed to a comparatively small peak value. Following the transition of the switching element to the conducting state, when the second switching element is brought into the conducting state, the rectified output voltage having a level reduced from a relatively large state is the second switching element. Is supplied to the first capacitor through, and at that time, the rectified output voltage is assumed to have its level lowered, so that the charging current flowing through the second capacitor is Operation peak is assumed to be relatively small is performed. As a result, a stable DC voltage having a predetermined level is obtained at the output terminal provided at one end of the first capacitor,
When it is supplied as a power supply voltage to the load connected to the output terminal, the charging currents flowing through the first and second capacitors, respectively, when the first and second switching elements are in the conductive state, The peak value will be relatively small.

[Brief description of drawings]

FIG. 1 is a block connection diagram showing an example of a power supply circuit according to the present invention.

FIG. 2 is a time chart used for explaining the operation of the example shown in FIG.

FIG. 3 is a block connection diagram showing another example of the power supply circuit according to the present invention.

FIG. 4 is a block connection diagram showing a conventional power supply circuit.

5 is a time chart provided for explaining the operation of the power supply circuit shown in FIG.

[Explanation of Codes] 31A, 31B Power supply connection terminal 36 Double wave rectification circuit section 38, 39, 50 SCR 40, 41, 51 Capacitor 42, 52 Diode 43, 44 Resistance element 46, 53 Conduction state control section 47 Output terminal 48 Load Circuit part 49 Fluctuation detection part

Claims (4)

[Claims] 1. A rectifying section for rectifying an AC voltage from an AC power source to obtain a rectified output voltage, and an input terminal connected to an output terminal of the rectifying section, and a rectified output voltage obtained by the rectifying section at the input terminal. First supplied
A second switching element, the input end of which is connected to the output end of the rectification unit, and the rectified output voltage obtained by the rectification unit is supplied to the input end.
A first capacitor having a relatively small capacitance, one end of which is connected to the output terminal of the first switching element, and one end of which is connected to the output terminal of the second switching element, A second having a larger capacity than the first capacitor
And a diode having a cathode connected to one end of the first capacitor and an anode connected to one end of the second capacitor, and a load connected to the load through one end of the first capacitor. An output terminal for supplying the obtained DC voltage as a power supply voltage, and a first terminal for intermittently bringing the first switching element into a conducting state within each level change cycle of the rectified output voltage obtained by the rectification unit. Control signal and the second
And a second control signal for intermittently bringing the switching element into a conductive state at different timings, and the obtained first and second control signals are applied to the control terminal of the first switching element. And a conduction state control unit that supplies the control terminals of the second switching elements, respectively, to a power supply circuit. 2. The second control signal, wherein the first and second control signals formed in the conduction state control section are higher than the level of the rectified output voltage at the timing when the first control signal is obtained. 2. The power supply circuit according to claim 1, wherein the rectified output voltage has a low level at a timing at which is obtained. 3. The first and second control signals formed in the conduction state control section are such that, during each level reduction period for the rectified output voltage, the first control signal is first the control terminal of the first switching element. 3. The power supply circuit according to claim 2, wherein the second control signal is supplied to the control terminal of the second switching element, and then the second control signal is supplied to the control terminal of the second switching element. 4. The first and second switching elements are respectively constituted by first and second thyristors, and the first and second control signals from the conduction state control section are applied to the gate and the first thyristor of the first thyristor. The power supply circuit according to claim 1, wherein the power supply circuit is supplied as a trigger signal to the gates of the second thyristors.