JPH06189447A - Protective relay - Google Patents

Abstract

PURPOSE:To prevent the output of an unnecessary trip signal by detecting an abnormality of analog input circuits. CONSTITUTION:A CPU 9 detects an abnormality of each voltage data by comparing two voltage data obtained by sampling the voltages of the same transmission and distribution lines stored in a RAM 7 at the same time through analog input circuits 3a and 3b with an abnormal voltage set in a setting I/F 8. When the CPU 9 detects the abnormality of each voltage data, the abnormal detection is transferred to an OR gate 22 and an AND gate 23 through a D/O circuit 10. Next, the OR gate 22 outputs an abnormal detection signal when one of the voltage data is abnormal and the AND gate 23 outputs the signal when both of the voltage data are abnormal. Then, a decision circuit 24 outputs the abnormal detection signal representing the abnormality of the input circuits 3a and 3b when unmatching of valid states of the OR gate 22 and the AND gate 23 is detected for a predetermined time or longer continuously. Also, an output circuit 27 outputs a trip signal when the abnormal detection signals are outputted from both the OR gate 22 and the AND gate 23.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a protective relay device which protects a transmission and distribution line while considering an abnormality in an analog input circuit.

[0002]

2. Description of the Related Art FIG.
Volume No. 4, January 21, 1986 Issued by The Japan Electrical Cooperation Society, It is a block diagram showing the conventional protective relay device shown on page 29, in which 1 is the voltage of the transmission and distribution line (physical quantity ) Is taken in and converted into a value suitable for the operation of the arithmetic unit 2. The input converter 2 has an analog input circuit 3 for sampling the voltage data of the transmission and distribution line taken in by the input converter 1, It is an arithmetic unit that detects an abnormality.

Reference numeral 4 is a low-pass filter for extracting the fundamental wave component of the voltage, 5 is a sample and hold circuit for sampling and holding the input voltage data, and 6 is A for analog-to-digital conversion of the voltage data sampled and held by the sample and hold circuit 5. A / D converter, 7 is a random access memory (hereinafter referred to as RAM) for storing the voltage data analog / digital converted by the A / D converter 6 and other operation data, and 8 is a settling interface for setting an abnormal voltage, for example. , 9 is a microprocessor (hereinafter, referred to as CPU) that detects the abnormality of the voltage data by comparing the sampled voltage data with the abnormal voltage set by the settling interface 8, 10 is an output interface circuit (hereinafter, D / O
Circuit).

Reference numeral 11 is an output circuit for outputting a trip signal when the arithmetic unit 2 detects an abnormality in the voltage data, 12 is a coil, and 13 is a contact.

Next, the operation will be described. First, the input converter 1 takes in the voltage of the transmission and distribution line and converts it into a value suitable for the calculation of the calculation device 2. Next, low-pass filter 4
However, after removing frequency components other than the sine wave of the fundamental frequency of the power system, the sample hold circuit 5 samples and holds the voltage data, so that the value of the voltage data fluctuates during conversion of the A / D converter 6. It prevents you from doing it.

Then, the A / D converter 6 performs analog-digital conversion on the voltage data and stores the result in the RAM 7.

On the other hand, the relay operator sets the abnormal voltage in advance using the settling interface 8. Here, the CPU 9 detects an abnormality in the voltage data by comparing the voltage data stored in the RAM 7 with the abnormal voltage set by the settling interface 8. If the CPU 9 detects an abnormal voltage data,
The fact is transmitted to the output circuit 11 via the D / O circuit 10.

As a result, the output circuit 11 has the coil 12
Is excited, the contact 13 is closed, and a trip signal is output.

Further, in the above-mentioned conventional example, the phase of the transmission and distribution line is not particularly limited, but in FIG. 4, the abnormality of each phase (a phase, b phase, c phase) of the three phase transmission and distribution line is detected. To do. In the figure, 1a, 1b, 1c are input converters, 3a, 3b, 3c are analog input circuits, and 14 is a voltage for each phase of a three-phase transmission / distribution line.
An arithmetic unit having three analog input circuits 3a, 3b, 3c for detecting an abnormality of three voltages, and 15 is an A / D circuit for sequentially taking in voltage data of each phase held by the analog input circuits 3a, 3b, 3c. A multiplexer (hereinafter referred to as MPX) 16 for outputting to the converter 6 is an arithmetic unit 14
Is an OR gate that outputs an abnormality detection signal when any of the voltage data abnormality is detected by.

Next, the operation will be described. First, the input converters 1a, 1b, 1c take in the voltage of each phase of the transmission and distribution line and convert it into a value suitable for the operation of the arithmetic unit 14. Next, the analog input circuits 3a, 3b, 3c sample and hold the voltage of each phase at the same time. And
The MPX 15 sequentially takes in the voltage data of each phase held by the analog input circuits 3a, 3b, 3c and A
Output to the / D converter 6.

Then, the A / D converter 6 performs analog-digital conversion on the voltage data and stores the result in the RAM 7.

On the other hand, the relay operator sets the abnormal voltage in advance by using the settling interface 8. Here, the CPU 9 detects the abnormality of the voltage data of each phase by comparing the voltage data of each phase stored in the RAM 7 with the abnormal voltage set by the settling interface 8. If the CPU 9 detects an abnormality in the voltage data of each phase, the OR gate 16 is passed through the D / O circuit 10.
To that effect.

The OR gate 16 is connected to the arithmetic unit 14
When any of the voltage data (any one of the voltage data of the a-phase, the b-phase, and the c-phase) is detected to be abnormal, the abnormality detection signal is output. As a result, the output circuit 11 causes the coil 12 to
Is excited, the contact 13 is closed, and a trip signal is output.

[0014]

Since the conventional protective relay device is configured as described above, when a failure occurs in the analog input circuit, it is not possible to accurately detect the abnormal voltage data. There is a possibility that a trip signal may be erroneously output, and there is a problem such as lack of reliability.

The present invention has been made to solve the above problems, and it is an object of the present invention to obtain a protective relay device capable of preventing the output of an unnecessary trip signal by detecting an abnormality in an analog input circuit. To aim.

[0016]

According to a first aspect of the present invention, a protective relay device outputs an abnormality detection signal when an abnormality in one of two physical quantities is detected by an arithmetic unit. And a second determiner that outputs an abnormality detection signal when both anomalies of two physical quantities are detected by the arithmetic unit, and the first determiner or the second determiner is provided. When the abnormality detection signal is continuously output from only one of them for a predetermined time or more, the abnormality detection signal indicating the abnormality of the analog input circuit is output, and the abnormality detection signal is output from both the first and second determiners. When is output, a trip signal is output.

Further, in the protective relay device according to the invention of claim 2, when the arithmetic device detects an abnormality of at least one physical quantity, a first judging device which outputs an abnormality detection signal, and the arithmetic operation When a device detects an abnormality of at least two or more physical quantities, a second judging device that outputs an abnormality detection signal is provided, and a predetermined judgment is made from only one of the first judging device and the second judging device. When the abnormality detection signal is continuously output for a time or more, the abnormality detection signal indicating the abnormality of the analog input circuit is output, and when the abnormality detection signal is output from both the first and second determiners, The trip signal is output.

[0018]

In the protective relay device according to the first and second aspects of the present invention, when the abnormality detection signal is continuously output for a predetermined time or more from only one of the first judging device and the second judging device. An output circuit that outputs a trip signal when an abnormality detection signal is output from both the first and second determination devices, while providing a third determination device that outputs an abnormality detection signal indicating an abnormality in the analog input circuit By providing the above, it becomes possible to monitor the state of the analog input circuit, and an unnecessary trip signal based on the failure of the analog input circuit is not output.

[0019]

EXAMPLES Example 1. An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a configuration diagram showing a protective relay device according to an embodiment of the present invention. In the figure, the same reference numerals as those of the conventional one indicate the same or corresponding portions, and therefore the description thereof will be omitted. Reference numeral 21 is an arithmetic unit having two analog input circuits 3a and 3b for sampling a voltage (which may be a current or the like) as a physical quantity of the same transmission and distribution line at the same time, and detecting an abnormality of the two voltages.

Numeral 22 indicates that when the arithmetic unit 21 detects an abnormality in one of the two voltage data,
An OR gate (first judging device) that outputs an abnormality detection signal,
Reference numeral 23 is an AND gate (second determiner) that outputs an abnormality detection signal when the arithmetic unit 21 detects an abnormality in both of the two voltage data.

Reference numeral 24 indicates the analog input circuit 3 when the abnormality detection signal is output from only one of the OR gate 22 and the AND gate 23 continuously for a predetermined time or longer.
a determination circuit (third determination device) that outputs an abnormality detection signal indicating an abnormality of a and 3b, 25 is a mismatch detection circuit that detects a mismatch between the established states of the OR gate 22 and the AND gate 23,
Reference numeral 26 is a timer circuit that outputs an abnormality detection signal when the mismatch detection circuit 25 detects a mismatch for a predetermined time or longer.

27 is an OR gate 22 and an AND gate 2.
Output circuits for outputting trip signals when abnormality detection signals are output from both 3 and 28, 29 are coils, 30,
Reference numeral 31 is a contact point.

Next, the operation will be described. First, the input converter 1 takes in the voltage of the transmission and distribution line and converts it into a value suitable for the calculation of the calculation device 21. Next, the analog input circuit 3
a and 3b sample and hold the voltage of the same transmission and distribution line at the same time. Then, the MPX 15 sequentially takes in each voltage data held by the analog input circuits 3 a and 3 b and outputs it to the A / D converter 6.

Then, the A / D converter 6 performs analog-digital conversion on the voltage data and stores the result in the RAM 7.

On the other hand, the relay operator sets the abnormal voltage in advance by using the settling interface 8. Here, the CPU 9 detects an abnormality in each voltage data by comparing the two voltage data stored in the RAM 7 with the abnormal voltage set by the settling interface 8. If the CPU 9 detects an abnormality in each voltage data, it notifies the OR gate 22 and the AND gate 23 via the D / O circuit 10.

The OR gate 22 is connected to the arithmetic unit 21.
When an abnormality is detected in either of the two voltage data, the abnormality detection signal is output. On the other hand, the AND gate 23 outputs an abnormality detection signal when the arithmetic unit 21 detects an abnormality in both of the two voltage data.

Here, the determination circuit 24 constantly monitors the establishment state of the OR gate 22 and the AND gate 23 by using the inconsistency detection circuit 25, and continuously maintains the establishment state of the OR gate 22 and the AND gate 23 for a predetermined time or longer. Is detected, an abnormality detection signal indicating an abnormality in the analog input circuits 3a and 3b is output.

The output circuit 27 outputs a trip signal when the abnormality detection signal is output from both the OR gate 22 and the AND gate 23.

Example 2. 2 is a block diagram showing a protective relay device according to another embodiment of the present invention. In FIG. 2, reference numeral 32 indicates an abnormality detection when the arithmetic unit 14 detects an abnormality in at least one or more voltage data. An OR gate (first discriminator) for outputting a signal, 33 is an arithmetic unit 14
Is a gate (second determiner) that outputs an abnormality detection signal when at least two or more voltage data abnormalities are detected.

Next, the operation will be described. Arithmetic unit 14
The operation of is the same as the operation of the arithmetic unit 14 of FIG.

The OR gate 32 outputs an abnormality detection signal when the arithmetic unit 14 detects at least one abnormality in the voltage data. On the other hand, the gate 33 outputs an abnormality detection signal when the arithmetic unit 14 detects at least two abnormalities in the voltage data.

Here, the determination circuit 24 constantly monitors the establishment state of the OR gate 32 and the AND gate 33 by using the disagreement detection circuit 25, and continuously maintains the establishment state of the OR gate 32 and the AND gate 33 for a predetermined time or longer. Is detected, an abnormality detection signal indicating an abnormality of the analog input circuits 3a, 3b, 3c is output.

The output circuit 27 also outputs a trip signal when the abnormality detection signal is output from both the OR gate 32 and the AND gate 33.

[0034]

As described above, according to the first aspect of the present invention, when the arithmetic unit detects an abnormality in one of the two physical quantities, the first judging device outputs an abnormality detection signal. And a second determiner that outputs an abnormality detection signal when both abnormalities of two physical quantities are detected by the arithmetic device, and either the first determiner or the second determiner is provided. When the abnormality detection signal is continuously output for a predetermined time or more from only the above, the abnormality detection signal indicating the abnormality of the analog input circuit is output, and the abnormality detection signal is output from both the first and second determiners. Since it is configured to output a trip signal when an alarm occurs, the status of the analog input circuit can be monitored and unnecessary trip signals due to a failure of the analog input circuit are not output, which is a highly reliable protective relay device. Got There is an effect of Runado.

According to the second aspect of the invention, when the arithmetic unit detects an abnormality of at least one physical quantity, the first discriminator outputs an abnormality detection signal, and the arithmetic unit makes at least two. A second determiner that outputs an abnormality detection signal when an abnormality of one or more physical quantities is detected is provided, and is continued for a predetermined time or longer from only one of the first determiner and the second determiner. Outputs an abnormality detection signal indicating an abnormality of the analog input circuit, and outputs a trip signal when the abnormality detection signal is output from both the first and second determiners. As described above, the state of the analog input circuit can be monitored, and an unnecessary trip signal based on a failure of the analog input circuit is not output, which is highly reliable. Such an effect MamoruTsugi collector is obtained.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing a protective relay device according to an embodiment of the present invention.

FIG. 2 is a configuration diagram showing a protective relay device according to another embodiment of the present invention.

FIG. 3 is a configuration diagram showing a conventional protective relay device.

FIG. 4 is a configuration diagram showing a conventional protective relay device.

[Explanation of symbols]

 3a, 3b, 3c Analog input circuit 14, 21 Arithmetic device 22, 32 OR gate (first judgment device) 23, 33 AND gate (second judgment device) 24 Judgment circuit (third judgment device) 27 Output circuit

Claims (2)

[Claims] 1. An arithmetic unit having two analog input circuits for sampling physical quantities of the same transmission / distribution line at the same time, and an arithmetic unit for detecting an abnormality of the two physical quantities, and one of the two physical quantities by the arithmetic unit. A first determiner that outputs an abnormality detection signal when one abnormality is detected, and a second determiner that outputs an abnormality detection signal when both of the two physical quantities are detected by the arithmetic unit And the first
When the abnormality detection signal is continuously output for a predetermined time or more from only one of the above-mentioned judging device or the above-mentioned second judging device,
A third determiner that outputs an abnormality detection signal indicating an abnormality of the analog input circuit and an output circuit that outputs a trip signal when the abnormality detection signals are output from both the first and second determiners. A protective relay device equipped. 2. It has three analog input circuits for sampling the physical quantity of each phase of the three-phase transmission / distribution line at the same time, and 3
An arithmetic unit for detecting an abnormality of one physical quantity, a first judging device that outputs an abnormality detection signal when at least one abnormality of the physical quantity is detected by the arithmetic unit, and at least two or more by the arithmetic unit A second determiner that outputs an abnormality detection signal when an abnormality in the physical quantity of
A third abnormality output signal indicating an abnormality of the analog input circuit is output when an abnormality detection signal is continuously output for a predetermined time or longer from only one of the first determination device and the second determination device. And the output circuit that outputs a trip signal when an abnormality detection signal is output from both the first and second determination devices.