JPH06189262A - Recording device, reproducing device, vtr, and transmitting device for digital video signal - Google Patents

Abstract

PURPOSE:To realize scrambling and descrambling while keeping an increase in cost at 0 substantially. CONSTITUTION:Data supplied to an input terminal 70 is given to a switch 72 through a memory 71, and is separated into a DC component and an AC component. As for the AC component, it is processed in the same way as in the past. The DC component is latched by the flip flops 73a, 73b of 8 bits by selecting properly its timing by a DC controller 74. The latched data is classified into DC, M, AT respectively, and is written in together with an error flag while the address, etc., of a RAM 75 being controlled by a RAM read/write controller 76. At a read-out side, the DC data and the AC data are edited by the switch 78. At that time, a DC error comes to be balanced with an AC error flag by a logic circuit 79. The position of the DC component of the inputted data is shifted intentionally at the time of segmenting.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a recording device, a reproducing device, a VTR, and a transmitting device for a digital image signal, which is used when a video signal is digitized and recorded and reproduced.

[0002]

2. Description of the Related Art Satellite broadcasting or cable TV in which a video signal and an audio signal are scrambled and transmitted by a satellite or a cable.
Has already been put to practical use. Those who do not have a contract with the broadcaster cannot receive or listen to this broadcast due to scrambling. You can enjoy video and audio for the first time by installing a descrambler lent to the contractor in front of the tuner. However, if you cannot completely recognize the video and audio, it may be mistaken for a TV failure, and if you can recognize it a little, you can interest the viewers and you can expect new contractors, Video signals and audio signals are sent so that they can be recognized to some extent. For example, the lines are changed up and down every 1H, left and right halves are changed, this is performed every several H, and the processing is changed every several frames, so that various measures are taken.

FIG. 4 shows the structure of a descrambler, commonly called a cable box, used in the current cable TV. An input terminal 41 shown in FIG. 4 is a scrambled RF signal which is a lead-in wire of a cable to a home.
This is input by the operation key 47 of the cable box or the remote controller 42 is used to indicate the channel of the cable TV, and the tuner 43 receives it. The tuner 43 output, which has become a baseband signal, is supplied to the descrambler circuit 44. The descrambled signal is modulated into, for example, VHF3ch by the 45 modulation circuit and output from the cable box. TV, VTR with this as antenna input
It is supplied to the tuner 46 inside and reproduced as an image and a sound.

FIG. 5 shows the structure of a descrambler used in the current satellite broadcasting. In FIG. 5, the RF signal from the BS / CS antenna 51 is supplied to the BS / CS tuner or the BS / CS tuner 52 in the VTR or TV. Channel selection is performed using the operation keys 58 or the remote controller 57. The detection output signal 53 of the tuner 52 is supplied to the descrambler 54. The descrambled video signal 55 and audio signal 56 are output, for example, in two systems, one of which is a VTR line input, and the other of which is
Connected to the TV line input.

Next, a scramble canceling method and a fee collection will be described. Descrambling, that is, descramble, is performed by a unique ID number possessed by the cable box or the descrambler device itself and a key incorporated in the corresponding broadcast signal. The broadcaster keeps the key while the contract recipient pays the fee. The key and ID number are encrypted.

[0006] The number of pay broadcasters tends to increase more and more, and accordingly, the number of descramblers also increases according to the number of contract broadcasts for users for company A and company B. Therefore, mainly in Europe, an IC telephone card-shaped card called a smart card that can be used in common with any descrambler device has also appeared. This allows users to receive paid broadcasts from any number of companies with a single descrambler.

[0007] On the other hand, there are known digital broadcasting and a TV conference system in which a video signal is digitized and sent using radio waves or a cable, and a digital VTR in which a rotary head records on a magnetic tape. Since digitizing a video signal results in an enormous amount of information, high-efficiency coding is often used to compress it as much as possible. Among various high-efficiency coding, the Discrete Cosin transform
The practical application of e Transform (DCT) is progressing.

[0008] The DCT converts one frame image into, for example, (8
The block structure of (x8) is summarized, the block is subjected to cosine transform which is a kind of orthogonal transform, and then data weighting processing and requantization are performed. By this processing, the energy components in the (8 × 8) block can be concentrated in a certain area, and the data in the other areas can be set to “0” or a value close to it and can be ignored. Therefore, if this data is deleted, a certain amount of data can be compressed.

However, at this level, the amount of data is still too large. Therefore, the coefficient data is further subjected to variable length coding such as Huffman coding for converting the coefficient data into data having different bit lengths according to the probability of signal generation and run length coding focusing on "0". As a result, for example, the amount of data that can be recorded and reproduced by a consumer digital VTR can be finally compressed. At the time of transmission, in order to facilitate data processing on the reproducing side, a code signal, which is an encoded output, is inserted into a data area in a sync block of a certain length, and a parity for synchronizing data, a synchronization signal, and an ID
A signal or the like is added to form a sync block into frames.

Two-dimensional Huffman coding is a type of variable-length coding that is commonly used because of its efficiency. This is also called amplitude run length coding, and one event is defined for each value that encounters a coefficient that is not "0". For example, when a (8 × 8) block is converted into a two-dimensional Huffman pattern, in many cases, after a certain point, all the data is “0”. With this, we will no longer encounter a coefficient whose value is not "0", so the code EOB (End
of Block).

In a digital VTR using a magnetic tape and a disk recording / reproducing apparatus using a disk-shaped storage medium, it is usual that video data of one or more fields or frames is recorded on a plurality of tracks. In this case, if the number of tracks is different for each field or frame, inconvenience may occur in servo or the like, so a fixed number of tracks is often selected. In the method without compression processing, the data amount naturally becomes constant.
When compressed like, the amount of data changes depending on the image,
Furthermore, since variable length coding is performed, the data amount in these predetermined periods constantly fluctuates. In order to record this on a fixed number of tracks, a buffering process is required to reduce the amount of data in a predetermined period to a target value or less.

As an example, one field or a predetermined period shorter than one frame (called a buffering unit)
A buffering process has been proposed in which the data amount is controlled so that the data amount is equal to or less than a target value even in one field or one frame period as a whole. The buffering process is a process of requantizing the coefficient data of the alternating current generated in the DCT with an appropriate quantization step to suppress the amount of transmission data to be equal to or less than the target value. In the transmission data, the code of the quantization step or the quantization number indicating the quantization step is inserted together with the encoded data.

FIG. 6 shows an example of a conventional sync block of component signal transmission data. In this example, one buffering unit is framed into five sync blocks. The block sync signal S is placed at the beginning of the sync block.
YNC is located, followed by the ID signal of the sync block and the quantization number QN selected in the buffering unit.
O and additional information AUX follow. DCT in the data area
Coefficients and the like are arranged, and after that, there is the parity of the error correction code added to each data of the sync block. In this example, a Reed-Solomon code, which is commonly used as an error correction code, is assumed, and variable-length data is organized into, for example, 8 bits (this is called packing) and recorded in a data area. . Normally, QNO is 1
Since each buffering unit has one value, all QNOs in each sync block have the same value.

Next, the data area will be described. For example, in the case of (8 × 8), when the sample data of 8 pixels × 8 lines is subjected to DCT (discrete cosine transform) itself as shown in FIG. 7A, a DC component DC,
It is converted into coefficient data of AC components AC1 to AC63. The arrow in FIG. 7B indicates the state of zigzag scanning that is generally performed. The DC component DC is a DC component that represents the average luminance value of all blocks according to the definition of DCT, and is 64
It is known to have a size twice as large as the average of the absolute value of one pixel. As described above, the DC component DC has the maximum energy of the block, and thus is treated as the most important word during data transmission.

When the data is variable-length coded, the input data must be sequentially cut out depending on how many bits each word has. Therefore, if there is an error even at one place, the break of the word cannot be recognized, and the data after that cannot be cut out, resulting in a propagation error. That is, the variable length coding can gain the data compression efficiency, but is very weak against the error. Therefore, DC component DC
In general, the variable length coding is not performed, but the fixed length is set to, for example, 9 bits, and only the AC components AC1 to AC63 are normally subjected to the variable length coding.

In FIG. 6, the DC component is 9 bits, the motion flag M is 1 bit, and the activity (picture definition) AT
2 bits are regularly arranged as the most important word, and then the AC component of the variable length of the DCT block is changed to AC.
They are packed in order from 1 to AC63. In this example, Y
There is a fixed AC-L area of 12 bytes for C and 6 bytes for C, and packing is performed as described above. At this time, if the EOB of the DCT block is stored in the fixed AC-L area, the fixed AC-L area is stored. -The remaining bits of the L area are newly defined as the variable AC-H area. And this variable A
New AC- by connecting C-H area and fixed AC-H area
The H area is set, and the components that have overflowed from the fixed AC-L area are packed in order. In addition to the regular framing as described above, a method of stuffing the data area with pre-stuffing framing, which stuffs all the data in order, is known.

[0017]

In order to realize the above-mentioned scrambler, an A / D converter for digitizing an analog signal, one or a plurality of frame or field memories and line memories for storing the same. ,
A wide variety of circuits are required, such as a D / A converter for converting a digital signal into an analog signal, filters, and a control circuit for controlling them.

The scrambler prepared by the broadcaster is
Since it is for business use and basically only one TV signal transmission side is required, the circuit scale and cost do not matter so much, but the descrambler of the receiving subscriber also has a similar circuit with a different scale. It is necessary and there is a cost problem.

On the other hand, considering a descrambler in digital TV broadcasting which is sure to be realized in the near future, the above-mentioned current analog type A / D converters, D / A converters, etc. are unnecessary. Furthermore, most digital circuits in the descrambler can be shared with the digital tuner. In other words, it is expected that the current method of antenna → tuner → descrambler → TV will be antenna → digital tuner → TV, and the digital tuner will have a descramble function. In FIG. 5, the tuner 52 and the descrambler 54 are integrated and replaced with a digital tuner. At this time, the key for descrambling is supplied from an IC card prepared by the broadcaster, a card such as a magnetic card, direct key input, or broadcast airwaves.

Further, let us consider a soft tape in a consumer digital VTR which is sure to be realized in the near future. In the case of rental video, not only the conventional billing method per day, but also how many times it can be played back will be possible with digital. For example, a memory IC attached to a tape or a cassette tape,
The number of times of reproduction may be recorded on a tape attached to the outside of the cassette tape, a card such as an IC card or a magnetic card, and scrambled after the number of times of reproduction has passed. Naturally, if the number of times of reproduction is not written, it will be scrambled and cannot be reproduced. In the case of soft tapes for sale, descrambling can be done to make tapes.

From the above point of view, the present invention makes the descrambler circuit for digital TV broadcasting, consumer digital VTR, etc., which is surely realized in the near future, much simpler and more cost-effective than the descrambler circuit in the current analog system. It is to provide a method that does not cost.

[0022]

According to a first aspect of the present invention, there is provided a digital image signal recording apparatus for DCT compression-encoding an input digital image signal and recording the encoded digital image signal. Of the DCT compression-encoded frequency domain data, and means for determining whether to scramble or de-scramble, instead of manipulating the space-time domain data. An apparatus for recording digital image signals, characterized in that the whole or a part of a screen is applied and is executed at one or several frames or fields, or at an arbitrary time interval.

The second means according to the present invention is, in a digital image signal reproducing apparatus for reproducing a recording signal of a DCT compression-encoded digital image signal, rather than operating data in the analog and digital spatio-temporal regions. , DC
It has means for manipulating T-compression-coded frequency domain data and means for deciding whether to scramble or cancel the scramble, and the scramble applied to the whole or part of the screen by these means is one or several frames. Alternatively, it is a reproducing apparatus for a digital image signal, which is released in the field or at an arbitrary time interval.

According to a third means of the present invention, the input digital image signal is DCT compression-encoded, and the encoded digital image signal is recorded and reproduced.
The TR has means for manipulating DCT compression-encoded frequency domain data instead of manipulating analog and digital spatio-temporal domain data, and means for deciding whether to scramble or cancel the data. The above scramble is applied to the whole screen or a part of
Alternatively, it is a VTR of a digital image signal, which is released or released and is executed at one or several frames or fields or at arbitrary time intervals.

According to a fourth aspect of the present invention, in a digital image signal transmitting apparatus for DCT compression-encoding an input digital image signal and transmitting the encoded digital image signal, analog and digital space-time domain data are transmitted. Rather than operating the DCT compression-encoded data, it has means for operating the DCT compression-encoded frequency domain data, and means for deciding whether to scramble or de-scramble. , Or cancels and executes this at one or several frames or fields, or at arbitrary time intervals, is a digital image signal transmission device.

[0026]

According to this, the scrambling effect can be realized with a minimum circuit addition by manipulating the specific coefficient in the state of the compression coding, and the whole screen or a specific or random part of the screen can be realized. It is possible to display freely.

[0027]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. Note that the following description will be made on the video data processing circuit provided on the reproduction side of the digital VTR, but the configuration is the same for other digital image signal recording devices, reproduction devices, and transmission devices.

First, FIG. 2 shows a video data processing circuit provided on the reproducing side of the digital VTR. In FIG.
The digitized video data having the arrangement as shown in FIG. 6 is supplied to the input terminal indicated by 1. This video data is supplied to the ECC circuit 2 of the error detection / correction circuit. ECC circuit 2 detects an error in video data,
For data that can be corrected, error correction is performed. The data obtained as a result and the error that cannot be removed are supplied to the next deframing circuit 4. The deframing circuit 4 performs an operation to restore the configuration of FIG. 6 to its original state, but as described above, the AC component of the DCT coefficient is variable length coded, and if there is an error at one place, the word of that word is changed. The break cannot be seen, and the data after that cannot be cut out, resulting in a propagation error. The output of the deframing circuit 4 becomes an error including the data returned to the original series and the propagation error, and is supplied to the dequantization circuit 5.

The inverse quantization circuit 5 determines whether or not the DCT block having an error including a propagation error is finally reproduced as an image. In other words, the most important word, DC
If there is an error in the component or the low-frequency component of AC close to DC, the block cannot be reproduced anymore, and therefore the process of replacing it with the data of the previous field or frame (this is called concealment) is performed. The dequantization circuit 5 sends the instruction to the deblocking circuit 8 as concealment information. Further, the inverse quantization circuit 5 performs a process opposite to the requantization performed on the recording side, and supplies the data to an inverse transform of DCT and an IDCT (Inverse DCT) circuit.

The IDCT circuit is a simple 6 as shown in FIG. 7B.
The four data strings are restored to the spatiotemporal data as shown in FIG. 7A. The inverse DCT-converted data is supplied to the deshuffling circuit 7. Deshuffling is the reverse process of shuffling. Shuffling is a process in which one buffering unit of data is collected from various parts of an image. This prevents the error from being concentrated due to scratches in the longitudinal direction of the tape, clogs of the head, etc., making it impossible to correct, and the total number of bits of the collected data is averaged, resulting in an image quality improvement. Has the effect of improving. The deshuffling functions to return the collected data to the original position.

The output of the deshuffling circuit 7 is supplied to the deblocking circuit 8. Deblocking circuit 8
Is a circuit for reconstructing (8 pixels × 8 lines) data as shown in FIG. 7A into horizontal and vertical two-dimensional image data. The above-mentioned concealment information is also input here, and the unreproducible blocks are concealed and output from the output terminal 9.

FIG. 3 shows an example of a part of the deframing circuit, which is a circuit for returning the variable-length coded AC component to the original fixed-length code. FIG. 3 shows a VLD (Variable Length Decodin) including reverse packing processing and an unpacking circuit.
g) and the circuit around the RAM. Normally, 8-bit received or reproduced data is latched in 8-bit D flip-flops 60a-60d. The 32 bits of the latched data are selected by the switcher 61 for the maximum number of bits for variable length coding, for example, 19 bits. This selected data is supplied to the address of the VLD ROM 63. The VLDROM 63 cuts out a word and its word length (LENGTH) from this address input and outputs it. At this time, the EOB detection is performed at the same time, and the EOB detection is performed in the RAM.
To the read / write controller 66 of
Update the address of M65. RAM for word data
The data is supplied to the RAM 65, and the RAM read / write controller 66 controls and writes the address of the RAM 65. LENGTH is supplied to the VLD controller 62. Based on the LENGTH data, the VLD controller 62 determines which of the 8-bit D flip-flops 60a to 60d should latch the next data, controls the Clock Enable (CE) of the 60a to 60d, and at the same time, switches the switcher. At 61, it is determined which 19-bit of the 32-bit data is selected.

Next, the operation when an error occurs will be described.
The error signal is supplied to the VLD controller 62.
When data is variable-length coded, the input data must be sequentially cut out depending on how many bits each word has. Therefore, if there is an error even at one place, the break of the word cannot be recognized, and the data after that cannot be cut out, resulting in a propagation error. In this case, since the error continues until the next buffering unit, writing to the RAM 65 by the RAM read / write controller 66 is stopped.

The RAM 65 is divided into an image data storage section and an error flag storage section. And after reading the data, be sure to set an error flag. If the error flag corresponding to the address to be written at the time of writing data is dropped, the place where the error flag is set becomes the address that was not written due to an error. Therefore, when the RAM data is read, the above-mentioned propagation error is reflected.

FIG. 1 shows an example of the entire deframing circuit. The output of the ECC circuit 2 of FIG. 2 is supplied to the input terminal 70. The supplied data is temporarily stored in the memory 71 for ease of later processing. The output of the memory 71 is
It is given to the switch 72 and divided into a DC component and an AC component. Since the AC component is processed by the circuit and the like described in FIG. 3, the processing of the DC component will be described here.

The DC component is latched by controlling the Clock Enable (CE) of the 8-bit D flip-flops 73a and 73b in consideration of the timing by the DC controller 74. The latched data is D
Each is classified into C, M, and AT, and is read by the RAM read / write controller 76 together with the error flag to
The address of the AM 75 is controlled and written. The handling of the error flag is the same as in the case of the AC coefficient in FIG.

On the read side, the switch 78 edits the DC data and the AC data and sends them to the inverse quantization circuit 5 in FIG. M and AT are sent to the inverse quantization circuit 5 as they are,
Regarding the error flag, the error flags of DC and AC are combined by the logical sum circuit 79 and sent to the inverse quantization circuit 5.
At this time, since the DC error is the most important word, it naturally becomes a propagation error, and the logical sum circuit 79 takes a balance with the AC error flag.

Next, the operation when the scramble command comes from the tape or from the broadcast signal will be described. This can be achieved in a really simple way. For example, the position of the DC component of the data input in the format as shown in FIG. 6 is intentionally shifted when cutting out. As described in [0014], the DC component DC is a DC component that represents the average luminance value of all blocks according to the definition of DCT, and is known to have a size that is twice the average of the absolute values of 64 pixels. Has been. Since the DC component DC has the maximum energy of the block in this way, the DCT block cannot be formed as an image unless this data is reproduced. I don't even know if it looks like a mosaic.

Specifically, the DC controller 74 of FIG.
The scramble command information is input to and the DC cutting position is intentionally shifted accordingly. Since not only the DC component but also the AC low-frequency component has a large energy like the DC component, this may be intentionally tampered with.

If this operation is changed to a normal position or a position that is intentionally shifted for every one frame or several buffering units, and also for every several frames, the same effect as the prior art as described in [0002] is obtained. Can be obtained. As a result, it will be possible to support pay broadcasting for digital broadcasting in the near future.

In the embodiment, FIGS. 1, 2 and 3, a digital VTR is used.
The playback side is shown, but it should be added that the circuit of the digital broadcast receiver is basically the same.

The scrambling on the tape is particularly useful for business use, rental systems and the like. For commercial use, there are some that are sold as a set of a combination of a dedicated VTR and a tape that can be played back by itself. For example, a video system for aircraft registration. Although the movie is being shown on the in-flight service, I made it difficult to reverse the azimuth of the video head A and B so that the tape could not be played on other machines.

In the present invention, that is the ID in the dedicated VTR.
If the ID and the ID on the dedicated tape do not match, the DC cut-out position can simply be shifted and scrambled. There is no need to create the special system as described above, and the cost increase is zero.

As for the consumer VTR, if one ID common to all manufacturers is decided, it is impossible to reproduce the copyrighted commercial tape. Therefore, it can be used for both commercial and commercial VTRs. It can be designed with basic mechanics and common basic electric circuits. This merit is very large.

Next, the case of the rental system will be described. In the case of set rental of VTR and tape, the same method as above may be used. For rental of tape only, please tell the customer the ID number of the tape and enter it by key input on the VTR. For example, as mentioned in [0020], for example, memory IC on the tape or outside the cassette tape, outside the cassette tape. Write the ID along with the number of times played on the tape, IC card, magnetic card, etc. attached to the
You can rent it.

As the key ID for descrambling, for example, the arrangement position of DC in FIG. 6 may be encrypted.

As described above, according to the above-mentioned apparatus, by operating the specific coefficient in the compression-encoded state, the scramble and descramble can be realized with substantially no increase in cost.

This apparatus can be applied to all reproducing apparatuses in a system for recording or transmitting by compressing and coding an input digital image signal such as digital TV broadcasting and consumer digital VTR. In addition, since it can be designed with a common basic mechanism and a common basic electric circuit for both consumer and business use, the cost reduction effect by the common design is great.
In addition, it is possible to inexpensively deal with the problem of tape rental that involves copyright.

[0049]

According to the present invention, it is possible to realize scrambling and descrambling at substantially zero cost by manipulating a specific coefficient in the compression-encoded state.

[Brief description of drawings]

FIG. 1 is a block diagram of an example of an entire deframing circuit of a digital VTR to which the present invention is applied.

FIG. 2 is an overall block diagram of a reproduction side data processing circuit.

FIG. 3 is a block diagram of an example of a part of the deframing circuit, which is a circuit for returning the variable-length coded AC component to the original fixed-length code.

FIG. 4 is a schematic diagram of a descrambler system used in a current cable TV that has been previously proposed and already put into practical use.

FIG. 5 is a schematic diagram of a descrambler system used in a current satellite broadcast TV that has been previously proposed and already put into practical use.

FIG. 6 is a schematic diagram of an example of a sync block of previously proposed digital component signal transmission data.

FIG. 7 is a schematic diagram used to describe a DCT.

[Explanation of symbols]

 70 input terminal 71 memory 72, 78 switch 73a, 73b D flip-flop 74 DC controller 75 RAM 76 read / write controller 77 AC coefficient processing circuit 79 logical sum circuit

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Internal reference number FI technical display location H04N 7/167 8943-5C

Claims (4)

[Claims] 1. A digital image signal recording apparatus for DCT compression coding an input digital image signal and recording the coded digital image signal, instead of operating analog and digital spatio-temporal region data. It has means for manipulating DCT compression-encoded frequency domain data and means for deciding whether to scramble or descramble. By these means, the scramble is applied to the whole or a part of the screen, and this is applied to one or several frames. Alternatively, a recording apparatus for a digital image signal, which is executed in a field or at an arbitrary time interval. 2. A digital image signal reproducing apparatus for reproducing a recording signal of a DCT compression-encoded digital image signal, wherein the DCT compression-encoded frequency is used instead of manipulating analog and digital space-time domain data. It has means for manipulating the data in the area and means for deciding whether to scramble or cancel the scramble, and the scramble applied to the whole or part of the screen by these means can be used for one or several frames or fields, or for any A reproduction apparatus for a digital image signal, which is released at time intervals. 3. An input digital image signal is DCT compression encoded, and the encoded digital image signal is recorded and reproduced. In the VTR of the digital image signal, analog and digital spatiotemporal region data is manipulated. Rather, it has means for manipulating DCT compression-encoded frequency domain data and means for deciding whether to scramble or descramble, and these means scramble or cancel the whole screen or part of A VTR of a digital image signal, characterized in that this is executed at one or several frames or fields, or at arbitrary time intervals. 4. A digital image signal transmission apparatus for DCT compression-encoding an input digital image signal and transmitting the encoded digital image signal, rather than operating analog and digital spatio-temporal domain data. It has means for operating the DCT compression-encoded frequency domain data and means for determining whether to scramble or descramble, and by these means, the above-mentioned scramble is applied to or released from the whole screen or a part thereof, and this An apparatus for transmitting a digital image signal, which is executed at one or several frames or fields, or at arbitrary time intervals.