JPH06177409A - Manufacture of thin film solar battery - Google Patents
Manufacture of thin film solar batteryInfo
- Publication number
- JPH06177409A JPH06177409A JP4325865A JP32586592A JPH06177409A JP H06177409 A JPH06177409 A JP H06177409A JP 4325865 A JP4325865 A JP 4325865A JP 32586592 A JP32586592 A JP 32586592A JP H06177409 A JPH06177409 A JP H06177409A
- Authority
- JP
- Japan
- Prior art keywords
- film
- layer
- chamber
- forming
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/548—Amorphous silicon PV cells
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、例えばアモルファスシ
リコン (以下ａ−Siと記す) 系半導体薄膜によって形成
されるｐ−ｉ−ｎ接合を持つ薄膜太陽電池の製造方法に
関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a thin film solar cell having a pin junction formed by, for example, an amorphous silicon (hereinafter referred to as a-Si) semiconductor thin film.
【０００２】[0002]
【従来の技術】半導体薄膜を積層してｐ−ｉ−ｎ接合を
形成する場合、異なる性質の薄膜ごとに成膜室を設けて
望ましくない不純物が室内の雰囲気中に混入するのを防
ぐのが理想的であるが、そのためには一つのｐ−ｉ−ｎ
接合を形成するのに少なくとも３成膜室を必要とするこ
とになり、製造設備が大型になる。そこで、一つの成膜
室で順次反応ガスを入れ換えてｐ−ｉ−ｎ接合を形成す
ることが行われる。そして、複数のｐ−ｉ−ｎ接合をも
つ薄膜太陽電池を製造する場合には、成膜室の数が形成
するｐ−ｉ−ｎ接合の数に等しく、第一の成膜室で第一
のｐ−ｉ−ｎ接合、第二の成膜室で第二のｐ−ｉ−ｎ接
合というように順次形成する装置を用いる。以下図１に
示す製造装置を例にとり、図２に示す断面構造をもつａ
−Si／ａ−Si２段タンデムセルの製造方法について説明
する。まず、ガラス等の透光性絶縁物10上にSnＯ2 、Ｉ
ＴＯ、ZnＯ等の透明導電膜20を形成した成膜基板１を装
着したサセプタ２を搬入室11に導入してバルブ５、真空
計６を介して接続された真空ポンプ７により10-4Torr程
度に真空引きを行う。同時に赤外線ランプ３等の加熱に
よりサセプタ２を150 〜200 ℃程度に加熱する。次に、
サセプタ２を第一成膜室12に搬送し、SiＨ4 またはSi2
Ｈ6 を主ガス、Ｈ2 を希釈ガスをとしてバルブ５を介し
て接続されたガス導入管８より導入し、ＲＦ電極４に電
圧を印加してプラズマＣＶＤ法によりｐ層21、ｐ／ｉ界
面層22、ｉ層23、ｎ層24をそれぞれ５〜30nm、50〜100n
m 、５〜30nmの厚さに成膜する。その際、光入射側の窓
層になるｐ層21の成膜時には、ドーピングガスとしてＢ
2 Ｈ6 を添加し、さらにワイドギャップ化のためにＣＨ
4 等の炭化水素を添加してａ−SiＣ膜とするか、ＣＯ2
等を添加してａ−SiＯ膜としている。また、ｎ層の成膜
時にはドーピングガスとしてＰＨ3 を添加する。このよ
うにして第一ｐ−ｉ−ｎ接合を形成した後に、サセプタ
２を第二成膜室13に搬送し、同様な方法で第二ｐ−ｉ−
ｎ接合を形成する。その際のｐ層25、ｐ／ｉ界面層26、
ｉ層27、ｎ層28の膜厚はそれぞれ５〜30nm、５〜30nm、
200 〜600nm 、５〜30nmである。このあと、サセプタを
取り出し室14に移し、この室を大気圧にしてから取り出
す。2. Description of the Related Art When semiconductor thin films are stacked to form a p-i-n junction, a film forming chamber is provided for each thin film having different properties to prevent unwanted impurities from being mixed into the atmosphere in the chamber. Ideally, but for that, one p-i-n
At least three film forming chambers are required to form the bond, and the manufacturing facility becomes large. Therefore, the reaction gas is sequentially replaced in one film forming chamber to form a pin junction. When manufacturing a thin film solar cell having a plurality of p-i-n junctions, the number of film-forming chambers is equal to the number of p-i-n junctions to be formed, and the first film-forming chamber is used. The p-i-n junction and the second p-i-n junction are sequentially formed in the second film forming chamber. Taking the manufacturing apparatus shown in FIG. 1 as an example, a having a sectional structure shown in FIG.
A method of manufacturing a -Si / a-Si two-stage tandem cell will be described. First, SnO 2, I on the transparent insulator 10 such as glass
The susceptor 2 having the film-forming substrate 1 on which the transparent conductive film 20 such as TO or ZnO is formed is introduced into the carry-in chamber 11 and the vacuum pump 7 connected via the valve 5 and the vacuum gauge 6 causes about 10 −4 Torr. Evacuate. Simultaneously, the infrared lamp 3 and the like heat the susceptor 2 to about 150 to 200 ° C. next,
The susceptor 2 is transferred to the first film forming chamber 12, and SiH 4 or Si 2
H 6 is used as a main gas and H 2 is used as a diluent gas, which is introduced through a gas introduction pipe 8 connected through a valve 5, and a voltage is applied to the RF electrode 4 to form a p-layer 21, p / i interface by a plasma CVD method. Layer 22, i layer 23, and n layer 24 are 5 to 30 nm and 50 to 100 n, respectively.
A film having a thickness of 5 to 30 nm is formed. At that time, when the p-layer 21 that becomes the window layer on the light incident side is formed, B is used as a doping gas.
2 H 6 was added, and CH was added to widen the gap.
A hydrocarbon such as 4 is added to form an a-SiC film, or CO 2
Etc. are added to form an a-SiO film. Further, PH 3 is added as a doping gas when the n layer is formed. After forming the first p-i-n junction in this way, the susceptor 2 is conveyed to the second film-forming chamber 13 and the second p-i-
Form an n-junction. At that time, the p layer 25, the p / i interface layer 26,
The thicknesses of the i layer 27 and the n layer 28 are 5 to 30 nm and 5 to 30 nm, respectively.
200 to 600 nm and 5 to 30 nm. Then, the susceptor is moved to the take-out chamber 14 and the chamber is brought to atmospheric pressure and then taken out.
【０００３】[0003]
【発明が解決しようとする課題】複数のｐ−ｉ−ｎ接合
を持つ薄膜太陽電池では、各接合のｉ層膜厚は一定でな
く、一般に光入射側から順に厚くなっている。二段タン
デムセルの場合の典型的なｉ層膜厚としては、第一ｉ層
23の膜厚が70nm、第二ｉ層27の膜厚が300nm である。こ
の場合の各層成膜時間、すなわち純粋な成膜時間＋ガス
導入時間 (0.５分) ＋成膜後の真空引き時間 (0.５分)
を表１に示す。ここで、ｐ層、ｐ／ｉ界面層、ｉ層およ
びｎ層の成膜速度は、良好な膜特性が得られる妥当な値
として、それぞれ６nm／分、２nm／分、６nm／分、４nm
／分とした。In a thin film solar cell having a plurality of p-i-n junctions, the i-layer film thickness of each junction is not constant and generally increases in order from the light incident side. In the case of a two-stage tandem cell, the typical i-layer thickness is as follows:
The film thickness of 23 is 70 nm, and the film thickness of the second i layer 27 is 300 nm. In this case, the film formation time for each layer, ie, pure film formation time + gas introduction time (0.5 minutes) + vacuum evacuation time after film formation (0.5 minutes)
Is shown in Table 1. Here, the film forming rates of the p layer, the p / i interface layer, the i layer, and the n layer are 6 nm / min, 2 nm / min, 6 nm / min, and 4 nm, which are reasonable values that can obtain good film characteristics.
/ Min.
【０００４】[0004]
【表１】 表からわかるとおり、ｉ層成膜時間の違いによって第一
ｐ−ｉ−ｎ接合形成時間28分と第二ｐ−ｉ−ｎ接合形成
時間66分とは大きく異なり、これがタクトタイムを長く
する原因になっていた。すなわち、インライン型成膜装
置の場合のタクトタイムは、最も長いプロセス時間で決
まり、今回の例の場合は66分となっていた。[Table 1] As can be seen from the table, the first p-i-n junction formation time of 28 minutes and the second p-i-n junction formation time of 66 minutes are significantly different due to the difference in the i-layer film formation time, which is the reason for the longer takt time. It was. That is, the tact time in the case of the in-line type film forming apparatus was determined by the longest process time, which was 66 minutes in the case of this example.
【０００５】本発明の目的は、上述の問題を解決し、イ
ンライン型の複数の成膜室を用いてｐ−ｉ−ｎ接合を形
成する場合にタクトタイムを短くすることのできる薄膜
太陽電池の製造方法を提供することにある。An object of the present invention is to solve the above problems and to provide a thin film solar cell capable of shortening the tact time when forming a pin junction using a plurality of in-line type film forming chambers. It is to provide a manufacturing method.
【０００６】[0006]
【課題を解決するための手段】上記の目的を達成するた
めに、本発明は、複数の成膜室を通じて搬送される基板
上に一つ以上のｐ−ｉ−ｎ接合を形成する薄膜太陽電池
の製造方法において、少なくとも一つのｉ層の成膜を一
つの成膜室に基板が搬入されてから最初に行い、その基
板上へのその成膜室内での成膜をドープ層の成膜で終
え、その基板をその成膜室外へ搬出したのち、その成膜
室のクリーニングを行うものとする。そして、複数のｐ
−ｉ−ｎ接合を形成する際に最も厚いｉ層の成膜を一つ
の成膜室に基板を搬入して最初に行うか、あるいは一つ
の成膜室と隣接した成膜室とに分割して行うことが有効
である。上記のクリーニングを真性半導体膜を成膜する
場合と同一の操作を成膜室内で実施することによって行
うことが有効である。その場合、10nm以上の厚さの真性
半導体膜を成膜する場合と同一の操作を行うことが効果
的である。さらに、成膜される半導体膜がアモルファス
シリコン系膜であることが有効である。In order to achieve the above object, the present invention provides a thin film solar cell in which one or more pin junctions are formed on a substrate transported through a plurality of film forming chambers. In the manufacturing method of 1., at least one i layer is formed first after the substrate is loaded into one film forming chamber, and the film formation in the film forming chamber is performed on the substrate by forming the doped layer. After that, the substrate is carried out of the film forming chamber, and then the film forming chamber is cleaned. And multiple p
When forming the -i-n junction, the thickest i-layer is formed by carrying the substrate into one film forming chamber first, or by dividing the film into one film forming chamber and an adjacent film forming chamber. Is effective. It is effective to carry out the above-mentioned cleaning by performing the same operation as in the case of forming the intrinsic semiconductor film in the film forming chamber. In that case, it is effective to perform the same operation as the case of forming an intrinsic semiconductor film having a thickness of 10 nm or more. Further, it is effective that the formed semiconductor film is an amorphous silicon film.
【０００７】[0007]
【作用】ｉ層成膜の際には成膜室に不純物が残存するこ
とが望ましくない。従ってｉ層単独の成膜室が必要とな
るが、前述のように製造設備の小型化には複数層を一つ
の成膜室で形成することが効果的である。しかし、例え
ば一つの太陽電池のためのｐ−ｉ−ｎ接合のうちのｉ層
と次のｎ層を成膜し、そのあとその室で次の太陽電池製
造のために上面にｐ層がある基板を搬入してｉ層を成膜
しようとすると残存するｎ層のための不純物がｐ−ｉ接
合特性を損なうことになる。ｎ層形成のためにクリーニ
ングを行えば、このような支障が生ずることがなく、良
好な太陽電池特性が得られる。従って、タンデムセル製
造の場合に最も厚いｉ層とその次の層を一つの成膜室で
成膜し、他の層をその前の成膜室で成膜すること、ある
いは最も厚い層を隣接する二つの成膜室で分割して行う
ことが可能となり、成膜室間の成膜時間の差が小さくな
り、特に成膜室を増加することなくタクトタイムを短縮
することができる。また、シングルセルの製造において
も、製造に要する時間短縮のためｉ層以後の各層の形成
をそれ以前の層の形成とを成膜室を別にして行う場合
に、本発明を適用すれば太陽電池特性を維持したまま生
産性を高めることができる。Operation It is not desirable that impurities remain in the film forming chamber when forming the i layer. Therefore, a film forming chamber having only the i layer is required, but as described above, it is effective to form a plurality of layers in one film forming chamber in order to downsize the manufacturing equipment. However, for example, the i-layer and the next n-layer of the p-i-n junction for one solar cell are deposited and then there is a p-layer on top for the next solar cell fabrication in that chamber. When the substrate is loaded and an i-layer is formed, impurities remaining for the n-layer impair the p-i junction characteristics. If cleaning is performed to form the n-layer, such a problem does not occur and good solar cell characteristics can be obtained. Therefore, in the case of tandem cell manufacturing, the thickest i layer and the next layer can be formed in one film forming chamber and the other layers can be formed in the previous film forming chamber, or the thickest i-layer can be formed adjacently. The two film forming chambers can be divided into two parts, the difference in film forming time between the film forming chambers can be reduced, and the tact time can be shortened without increasing the number of film forming chambers. Further, even in the case of manufacturing a single cell, in order to reduce the time required for manufacturing, when the formation of each layer after the i-layer and the formation of the layers before that are performed separately from the film forming chamber, the present invention can be applied. Productivity can be improved while maintaining battery characteristics.
【０００８】[0008]
【実施例】図２に示した構造の２段タンデムセルを図１
に示した装置を用いて製造した本発明の実施例について
述べる。先ず、基板１を装着したサセプタ２を第一成膜
室12に搬送し、第一ｐ−ｉ−ｎ接合のｐ層21、ｐ／ｉ界
面層22、ｉ層23、ｎ層24、および第二ｐ層25、第二ｐ／
ｉ界面層26を順次形成する。つづいて、サセプタ２を第
二成膜室13に搬送し、第二ｉ層27、第二ｎ層28を順次形
成する。そしてサセプタ２を取り出し室14に搬送した後
に、第二成膜室13内のクリーニングを行う。クリーニン
グは、基板の存在しない第二成膜室13にSiＨ4 およびＨ
2 を導入し、プラズマＣＶＤ法により真性ａ−Si膜を成
膜するのと同じ操作を１分間行う。その際の操作条件
は、通常、基板上に25nm／分の成膜速度でｉ−ａ−Si膜
が堆積する条件になっている。次いでこの装置で次のセ
ルの製造を行った。クリーニングは、その際第二成膜室
13で形成される第二ｉ層27へのりんの混入を防ぐ効果が
ある。本発明の実施例の際の各成膜室でのプロセス時間
を示す。EXAMPLE A two-stage tandem cell having the structure shown in FIG. 2 is shown in FIG.
Examples of the present invention manufactured by using the apparatus shown in FIG. First, the susceptor 2 on which the substrate 1 is mounted is transferred to the first film forming chamber 12, and the p layer 21, the p / i interface layer 22, the i layer 23, the n layer 24, and the Second p layer 25, second p /
The i interface layer 26 is sequentially formed. Subsequently, the susceptor 2 is conveyed to the second film forming chamber 13 and the second i layer 27 and the second n layer 28 are sequentially formed. Then, after the susceptor 2 is transferred to the take-out chamber 14, the inside of the second film forming chamber 13 is cleaned. For cleaning, SiH 4 and H were placed in the second film forming chamber 13 where no substrate was present.
2 is introduced, and the same operation as forming an intrinsic a-Si film by the plasma CVD method is performed for 1 minute. The operating conditions at that time are usually such that the ia-Si film is deposited on the substrate at a film forming rate of 25 nm / min. Next, the next cell was manufactured with this apparatus. For cleaning, the second film formation chamber
It has an effect of preventing phosphorus from being mixed into the second i layer 27 formed by 13. The process time in each film-forming chamber in the Example of this invention is shown.
【０００９】[0009]
【表２】 表からわかるように、第二ｐ−ｉ−ｎ接合形成の一部を
第一成膜室12に移したことによりタクトタイムが59分に
短縮された。[Table 2] As can be seen from the table, the tact time was shortened to 59 minutes by transferring a part of the formation of the second pin junction to the first film forming chamber 12.
【００１０】ここで、クリーニングの効果について説明
する。図３にクリーニング時の成膜室において試料基板
上へのａ−Si形成膜厚と、そのあと作製された面積１cm
2 の２段タンデムセルの変換効率の関係を示す。クリー
ニングを全くしない場合、すなわちａ−Si形成膜厚の０
nmのあとのセルの変換効率は8.６％であり、従来のプロ
セスで形成したタンデムセルの変換効率11.8％に比べて
かなり低くなっている。これに対し、厚さ10nm成膜のク
リーニングを行うことで10.9％まで向上しており、厚さ
20nm以上成膜のクリーニングを行えば、従来のプロセス
と同等の11.5％以上の効率が得られることが分かった。
また、実線31で示した成膜速度25nm／分の場合と、点線
32で示した成膜速度５nm／分の場合で、挙動に大きな違
いが見られないことから、クリーニングの効果は処理時
間によらず、その間に形成されるべき真性ａ−Si膜の膜
厚によることがわかった。Here, the effect of cleaning will be described. Fig. 3 shows the film thickness of a-Si formed on the sample substrate in the film forming chamber during cleaning, and the area of 1 cm after that.
Shows the relationship between the conversion efficiency of the two-stage tandem cell. When no cleaning is performed, that is, when the a-Si film thickness is 0
The conversion efficiency of the cell after nm is 8.6%, which is considerably lower than the conversion efficiency of 11.8% of the tandem cell formed by the conventional process. On the other hand, cleaning the film with a thickness of 10 nm has improved it to 10.9%.
It was found that if the film thickness of 20 nm or more is cleaned, the efficiency of 11.5% or more, which is equivalent to that of the conventional process, can be obtained.
In addition, the solid line 31 shows a film forming rate of 25 nm / min and the dotted line
At the film formation rate of 5 nm / min shown in 32, no significant difference in behavior is observed, so the cleaning effect does not depend on the processing time but on the film thickness of the intrinsic a-Si film to be formed during that time. I understood it.
【００１１】本発明の別の実施例の際の成膜では、上記
実施例における第一および第二成膜室12、13でのプロセ
ス時間にまだ22分の差があるのを解消するために、第二
ｉ層27の成膜の一部を第一成膜室12で行うようにした。
これにより、表３に示したとおり、第一、第二成膜室1
2、13でのプロセス時間が等しくなり、プロセス時間が4
8.5に短縮された。この実施例により製造された２段タ
ンデムセルでは12.0％の変換効率が得られており、太陽
電池の特性上も問題がないことがわかった。In the film formation according to another embodiment of the present invention, in order to eliminate the difference of 22 minutes in the process time between the first and second film forming chambers 12 and 13 in the above embodiment. A part of the film formation of the second i layer 27 was performed in the first film formation chamber 12.
As a result, as shown in Table 3, the first and second film forming chambers 1
Process times at 2 and 13 are equal and process time is 4
Shortened to 8.5. The two-stage tandem cell manufactured by this example obtained a conversion efficiency of 12.0%, and it was found that there is no problem in the characteristics of the solar cell.
【００１２】[0012]
【表３】 さらに、本発明の別の実施例として、図４に示すように
金属基板９上に第一ｎ層28、第一ｉ層27、第一ｐ／ｉ界
面層26、第一ｐ層25、第二ｎ層24、第二ｉ層23、第二ｐ
／ｉ界面層22、第二ｐ層21の順にセルを形成した。各層
の膜厚は、図２のセル形成の場合の同一符号を付した層
の膜厚と成膜条件を同じにして全く等しくした。そし
て、第一ｉ層27の成膜を第一、第二成膜室12、13で分割
して行った。この場合のプロセス時間は表４に示すとお
りで、タクトタイムは従来の66分から48.5分に短縮され
た。[Table 3] Further, as another embodiment of the present invention, as shown in FIG. 4, the first n layer 28, the first i layer 27, the first p / i interface layer 26, the first p layer 25, the Second n layer 24, second i layer 23, second p
A cell was formed in the order of the / i interface layer 22 and the second p layer 21. The film thickness of each layer was set to be exactly the same as the film thickness of the layer denoted by the same reference numeral in the case of the cell formation of FIG. Then, the film formation of the first i layer 27 was performed separately in the first and second film forming chambers 12 and 13. The process time in this case is as shown in Table 4, and the takt time was shortened from 66 minutes in the past to 48.5 minutes.
【００１３】[0013]
【表４】 この実施例で上記の実施例と異なるのは、クリーニング
の役割がｉ層へほう素が混入するのを防ぐという点であ
る。クリーニングを行わない場合のセルの変換効率が7.
8 ％と低いのに対し、クリーニングを行った場合のセル
の効率は、11.1％に向上した。従来法により形成したセ
ルの効率が11.2％だったので、クリーニングは、ほう素
に対しても有効であることがわかった。[Table 4] This embodiment is different from the above-mentioned embodiments in that the role of cleaning is to prevent boron from being mixed into the i layer. Cell conversion efficiency without cleaning is 7.
The efficiency of the cell after cleaning was improved to 11.1%, while it was as low as 8%. Cleaning was found to be effective against boron as well, as the efficiency of the cells formed by the conventional method was 11.2%.
【００１４】以上、２段タンデムセルの成膜方法を例に
とって説明したが、本発明は、ａ−SiGe等をボトムセル
にもつ３段タンデムセルにも有効である。また、シング
ルセルの厚いｉ層を二つの成膜室で分割して形成し、実
成膜所要時間の短縮する場合にも有効である。Although the film formation method of the two-stage tandem cell has been described above as an example, the present invention is also effective for a three-stage tandem cell having a bottom cell such as a-SiGe. Further, it is also effective when the thick i layer of a single cell is divided into two film forming chambers to be formed and the actual film forming time is shortened.
【００１５】[0015]
【発明の効果】本発明によれば、ｐ−ｉ−ｎ接合のドー
プ膜成膜に使用した成膜室をそのあと真性半導体膜成膜
と同一の操作を行うなどの方法でクリーニングすること
により、次に搬入される基板上への真性薄膜の形成の際
の不純物混入が防止されるため、タンデムセルの最も厚
いｉ層を一つの成膜室で最初に形成する方法、あるいは
二つの成膜室で分割して形成する方法が実施可能とな
り、薄膜太陽電池の量産に用いるインライン型の成膜装
置における各成膜室のプロセス時間の均一化を図ること
によってタクトタイムが、例えば２段タンデムセルの場
合で73％短縮することができた。またシングルセルにお
いても厚いｉ層の分割形成による実成膜所要時間の短縮
も可能になった。According to the present invention, the film forming chamber used for forming the doped film of the p-i-n junction is then cleaned by the same method as that for forming the intrinsic semiconductor film. In order to prevent impurities from being mixed in when forming an intrinsic thin film on a substrate to be carried in next, a method of first forming the thickest i layer of the tandem cell in one film forming chamber or two film forming processes It becomes possible to implement the method of dividing the film in each chamber, and by making the process time of each film forming chamber in an in-line type film forming apparatus used for mass production of thin film solar cells uniform, the tact time is, for example, a two-stage tandem cell. In the case of, it was possible to reduce by 73%. Further, even in a single cell, the time required for actual film formation can be shortened by forming a thick i layer separately.
【図１】本発明の実施例に用いる成膜装置の断面図FIG. 1 is a sectional view of a film forming apparatus used in an embodiment of the present invention.
【図２】本発明の実施例により製造される薄膜太陽電池
の断面構造図FIG. 2 is a sectional structural view of a thin film solar cell manufactured according to an embodiment of the present invention.
【図３】本発明によるクリーニングの際のａ−Si成膜厚
さと製造された太陽電池の変換効率との関係線図FIG. 3 is a diagram showing the relationship between the a-Si film thickness during cleaning according to the present invention and the conversion efficiency of a manufactured solar cell.
【図４】本発明の別の実施例により製造される薄膜太陽
電池の断面構造図FIG. 4 is a sectional structural view of a thin film solar cell manufactured according to another embodiment of the present invention.
１ 成膜基板 ２ サセプタ ３ 赤外線ランプ ４ ＲＦ電極 ７ 真空ポンプ ８ ガス導入管 ９ 金属基板 １１ 搬入室 １２ 第一成膜室 １３ 第二成膜室 １４ 取り出し室 1 film-forming substrate 2 susceptor 3 infrared lamp 4 RF electrode 7 vacuum pump 8 gas introduction tube 9 metal substrate 11 carry-in chamber 12 first film-forming chamber 13 second film-forming chamber 14 take-out chamber
Claims (6)
一つ以上のｐ−ｉ−ｎ接合を形成する薄膜太陽電池の製
造方法において、少なくとも一つのｉ層の成膜を一つの
成膜室に基板が搬入されてから最初に行い、その基板上
へのその成膜室内での成膜をドープ層の成膜で終え、そ
の基板をその成膜室外へ搬出したのち、その成膜室のク
リーニングを行うことを特徴とする薄膜太陽電池の製造
方法。1. A method of manufacturing a thin-film solar cell in which one or more p-i-n junctions are formed on a substrate transported through a plurality of film-forming chambers, at least one i-layer is formed in one film. It is carried out first after the substrate is loaded into the film chamber, the film formation inside the film formation chamber on the substrate is completed by the film formation of the dope layer, and then the substrate is carried out of the film formation chamber and then the film formation is carried out. A method for manufacturing a thin-film solar cell, which comprises cleaning a chamber.
厚いｉ層の成膜を一つの成膜室に基板を搬入して最初に
行う請求項１記載の薄膜太陽電池の製造方法。2. The manufacturing of a thin film solar cell according to claim 1, wherein when forming a plurality of p-i-n junctions, the thickest i-layer is first formed by loading the substrate into one film forming chamber. Method.
厚いｉ層の成膜を一つの成膜室と隣接した成膜室とに分
割して行う請求項１記載の薄膜太陽電池の製造方法。3. The thin-film sun according to claim 1, wherein when forming a plurality of p-i-n junctions, the thickest i-layer film is formed by dividing it into one film forming chamber and an adjacent film forming chamber. Battery manufacturing method.
合と同一操作を成膜室内で実施することによって行う請
求項１ないし３のいずれかに記載の薄膜太陽電池の製造
方法。4. The method for producing a thin film solar cell according to claim 1, wherein the cleaning is performed by performing the same operation as in the case of forming the intrinsic semiconductor film in the film forming chamber.
場合と同一操作を行う請求項４記載の薄膜太陽電池の製
造方法。5. The method for producing a thin film solar cell according to claim 4, wherein the same operation as in forming an intrinsic semiconductor film having a thickness of 10 nm or more is performed.
ン系膜である請求項１ないし５のいずれかに記載の薄膜
太陽電池の製造方法。6. The method for producing a thin film solar cell according to claim 1, wherein the semiconductor film to be formed is an amorphous silicon film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4325865A JP3070309B2 (en) | 1992-12-07 | 1992-12-07 | Manufacturing method of thin film solar cell |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4325865A JP3070309B2 (en) | 1992-12-07 | 1992-12-07 | Manufacturing method of thin film solar cell |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH06177409A true JPH06177409A (en) | 1994-06-24 |
| JP3070309B2 JP3070309B2 (en) | 2000-07-31 |
Family
ID=18181484
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4325865A Expired - Fee Related JP3070309B2 (en) | 1992-12-07 | 1992-12-07 | Manufacturing method of thin film solar cell |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3070309B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6461444B1 (en) | 1999-08-20 | 2002-10-08 | Kaneka Corporation | Method and apparatus for manufacturing semiconductor device |
| JP2009277757A (en) * | 2008-05-13 | 2009-11-26 | Denso Corp | Method of manufacturing semiconductor device |
| JP2010517271A (en) * | 2007-01-18 | 2010-05-20 | アプライド マテリアルズ インコーポレイテッド | Multijunction solar cell and method and apparatus for forming the same |
| JP2011527826A (en) * | 2008-07-09 | 2011-11-04 | アプライド マテリアルズ インコーポレイテッド | Solar cell and method and apparatus for forming the same |
-
1992
- 1992-12-07 JP JP4325865A patent/JP3070309B2/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6461444B1 (en) | 1999-08-20 | 2002-10-08 | Kaneka Corporation | Method and apparatus for manufacturing semiconductor device |
| JP2010517271A (en) * | 2007-01-18 | 2010-05-20 | アプライド マテリアルズ インコーポレイテッド | Multijunction solar cell and method and apparatus for forming the same |
| JP2009277757A (en) * | 2008-05-13 | 2009-11-26 | Denso Corp | Method of manufacturing semiconductor device |
| JP2011527826A (en) * | 2008-07-09 | 2011-11-04 | アプライド マテリアルズ インコーポレイテッド | Solar cell and method and apparatus for forming the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3070309B2 (en) | 2000-07-31 |
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