JPH06165481A - Dc-to-dc conversion circuit - Google Patents

Abstract

PURPOSE:To provide a DC-to-DC conversion circuit capable of stepping down and stepping up output voltage at multistages with the use of one circuit. CONSTITUTION:Main switch elements SWA, SWB are inserted between a DC power supply DC and load L. A charge and discharge circuit 1 is connected in parallel with the series circuit of the main switch element SWA and the DC power supply DC. The charge and discharge circuit 1 is composed of the series circuit of three capacitor unit circuits 31 to 33 as two terminal circuits. The series circuit of capacitors C1 to C3 and first auxiliary switch elements SW1s to SW3s and second auxiliary switch elements SW1p to SW3p are connected between both terminals in each capacitor unit circuit 31 to 33. The on-off of the main switch elements SWA, SWB, the first auxiliary switch elements SW1s to SW3s and the second auxiliary switch elements SW1p to SW3p are controlled by a control circuit 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention converts an output DC voltage into a voltage different from an input DC voltage by using a plurality of capacitors and changing the connection state when the capacitors are charged and when they are discharged. The present invention relates to a direct current-direct current conversion circuit.

[0002]

2. Description of the Related Art Conventionally, as a DC-DC converter circuit for converting a DC voltage by charging / discharging a capacitor, FIG.
As shown in FIG. 5, a pair of main switch elements SW _A and SW _B are inserted between the DC power source DC and the load L, and a charging / discharging circuit is connected to a series circuit of one main switch element SW _A and the DC power source DC. A configuration in which 1s are connected in parallel is considered. Charging and discharging circuit 1, diode D _11, via a D ₁₂ includes three capacitors C ₁ -C ₃ connected in series, each diode D _11, a main switching element cathode to the cathode of D ₁₂ S
Diodes D ₂₁ and D ₂₂ connected to the connection points of W _A and SW _B
The anodes of are connected to each other, and each diode D ₁₁ , D
The cathodes of the diodes D ₃₁ and D ₃₂ whose anodes are connected to the negative electrodes of the DC power supply DC are connected to the anodes of ₁₂ , respectively.

Therefore, when the main switch element SW _A is turned on and the main switch element SW _B is turned off, the capacitors C ₁ to C ₁ through the diodes D ₁₁ and D ₁₂ are turned on.
C ₃ is connected in series between both ends of the DC power supply DC and is charged. Here, if the capacitors C _{1 to} C ₃ are made equal in capacity and the forward voltage drop of the diodes D ₁₁ and D ₁₂ is ignored, the voltages across the capacitors C _{1 to} C ₃ become equal to each other. That is, if the power source voltage of the DC power source DC is E, the voltage across the capacitors C _{1 to} C ₃ is E / 3.

After the charging of the capacitors C _{1 to} C ₃ by the DC power source DC is completed, the main switch element SW _A
Is turned off and the main switch element SW _B is turned on, the charges accumulated in the capacitors C _{1 to} C ₃ are supplied to the load L through the diodes D ₂₁ , D ₂₂ , D ₃₁ and D ₃₂ . That is, the voltage across the load L becomes E / 3.
In this way, it becomes possible to apply one third of the power supply voltage E to the load L. In this configuration, the capacitor C
According to the number n of _{1 to} C ₃ , it is possible to apply the voltage of 1 / n of the power supply voltage E to the load L.

As a development of this structure, there is a structure described in Japanese Patent Application Laid-Open No. 62-163560. In the invention described in the publication, the connection relationship of the capacitors is set so that the voltage can be stepped down at a preset ratio (rational number). On the other hand, as shown in FIG. 12, there is also known a configuration in which a capacitor C is used in a circuit that suppresses a ripple component of a pulsating current voltage obtained by full-wave rectifying an AC power supply AC by a full-wave rectifier RE including a diode bridge. That is, a series circuit of a diode D and a capacitor C is connected between output terminals of the full-wave rectifier RE, and a switching element Q including a transistor having an emitter and a collector connected in parallel to the diode D is provided, and The control circuit 2 for monitoring the output voltage is used to control ON / OFF of the switch element Q. The control circuit 2 is
When the output voltage of the full-wave rectifier RE is high, the switch element Q is turned off, the load L is fed by the output of the full-wave rectifier RE, and the capacitor C is charged through the diode D to output the output of the full-wave rectifier RE. When the voltage is low, the switch element Q is turned on to supply the charge charged in the capacitor C to the load L. Therefore, by adjusting the ON timing of the switch element Q, the ripple component of the pulsating current voltage output from the full-wave rectifier RE can be suppressed.

[0006]

In the former conventional configuration described above, the input voltage can be stepped down but not stepped up, and the output voltage can be set in multiple stages using the same circuit. There is a problem that you can not. The latter conventional configuration can suppress the ripple component, but has a problem that the input voltage cannot be stepped down or stepped up, and the output voltage cannot be set in multiple steps in the same circuit.

An object of the present invention is to solve the above problems and to provide a DC-DC converter circuit capable of stepping down and boosting the output voltage in multiple stages using one circuit. To do.

[0008]

The invention according to claim 1 is the above-mentioned.
In order to achieve the purpose, between the DC power supply DC and the load L
A pair of main switches that are inserted in series and selectively turned on and off.
Switch SW_A, SW _BAnd one main switch element SW
_AAnd is connected in parallel to the series circuit of DC power supply DC
One main switch element SW_ADC power when is on
The other main switching element SW charged by DC_BIs on
The charging / discharging circuit 1 that supplies power to the load L at the time of
The electric circuit 1 is a unit of a plurality of capacitors which is a two-terminal circuit.
Circuit 3_iAt least (subscript i represents a natural number)
Also partly connected in series, each capacitor unit circuit
Three_iIs the capacitor C_iAnd the first auxiliary switch element SW
_isAnd a series circuit of the second auxiliary switch element SW_ipAnd
Each main switch element S is configured by connecting between both terminals.
W_A, SW_BAnd each first auxiliary switch element SW_isAnd each first
2 auxiliary switch elements SW_ipON / OFF of each
Is provided with a control circuit 2 for controlling the timing of
Is.

According to a second aspect of the present invention, the voltage across the capacitor C _i provided in each capacitor unit circuit 3 _i is set equal to the drive voltage of the second auxiliary switch element SW _ip , and the first voltage is set by the charge of each capacitor C _i . 2 auxiliary switch elements SW _ip
Is held on.

[0010]

In the structure of claim 1, the capacity of the two-terminal circuit is increased.
Shita unit circuit 3_iCharge / discharge circuit 1 is configured by connecting multiple
Therefore, the capacitor unit circuit 3_iThe
Pasita C_iAnd the first auxiliary switch element SW_isSeries times with
Path and second auxiliary switch element SW_ipConnect and between both terminals
Since the configuration is continued, the capacitor unit circuit 3 _iContact
If the connection relationship is set appropriately, charging and discharging of the charging / discharging circuit 1
Each capacitor unit circuit at the time of discharging and discharging 3_iThe first auxiliary of
Switch element SW_isAnd a second auxiliary switch element SW_ip
By specifying the on / off state of the control circuit 2
Thus, the output voltage can be set in multiple stages. You
That is, a plurality of capacitor unit circuits 3_iConnected in series
Capacitor unit circuit 3 that is charged in the state and connected in series_iof
If you discharge the battery with a smaller number than when charging, the output voltage
It can be stepped down with respect to the input voltage. In addition, each
Pashita unit circuit 3_iIt is charged sequentially for each
Pashita unit circuit 3_iIf you connect and discharge in series,
The pressure can be boosted with respect to the input voltage. Moreover,
Capacitor unit circuit 3_iHow to combine
Therefore, it becomes possible to set the output voltage in multiple stages.
Of.

According to the second aspect of the present invention, the second auxiliary switch element SW _ip is controlled by using the electric charge charged in the capacitor C _i in each capacitor unit circuit 3 _i .
It is not necessary to separately provide a power source for controlling the auxiliary switch element SW _ip , which simplifies the circuit configuration and improves the efficiency of the entire circuit.

[0012]

EXAMPLE (Example 1) In this example, as shown in FIG.
A pair of main switches between the positive electrode of the DC power source DC and the load L.
Switch SW_A, SW_BInsert in series by connecting
Switch element SW _A, SW_BOne of the charging / discharging circuit 1 at the connection point of
Connect the ends and connect the other end of the charging / discharging circuit 1 to the DC power supply DC.
It is connected to the connection point between the negative electrode and the load L. Charge / discharge circuit 1
Is three capacitor unit circuits 3₁~ 3₃In the series circuit
It is composed of Each capacitor unit circuit 3₁~ 3₃
Is a two-terminal circuit, and there is a capacity between both terminals.
Ta C₁~ C₃And the first auxiliary switch element SW_1s~ SW_3s
Series circuit with the second auxiliary switch element SW_1p~ S
W_3pAre connected. Here, each capacitor unit circuit 3₁
~ 3₃Capacitor C₁~ C₃Are set to equal capacity
It Also, the main switch element SW_A, SW_B, First aid
Switch element SW_1s~ SW_3s, Second auxiliary switch element
SW_1p~ SW_3pIs turned on by the control circuit 2 separately.
The timing of control is controlled. Control circuit 2 to load L
Set the output voltage, not the applied voltage
This allows the main switch to be operated at the control timing as described later.
Switch SW_A, SW_B, First auxiliary switch element SW
_1s~ SW_3s, Second auxiliary switch element SW_1p~ SW_3pof
Controls the on / off state.

By the way, the main switch element SW_A, S
W_B, First auxiliary switch element SW_1s~ SW_3s, The second
Auxiliary switch element SW_1p~ SW_3pThe control voltage of the
It may be different from the power supply voltage of path 2. In such cases
In the current mirror circuit 4 as shown in FIG._s, 4
_pLevel shift is performed using, for example. In the example shown in FIG.
Is the first auxiliary switch element SW_isA pnp type tran
Dista Q_isAnd diode D _isAnd the second supplement
Auxiliary switch element SW_ipIs an npn-type transistor Q _ipWhen
Diode D_ipIt consists of and. Also, the transition
Star Q_ipCurrent mirror circuit 4_pAnd transformer T
_pA control signal from the control circuit 2 is input through the.

With the above arrangement, the main switch element S
W_A, SW_B, First auxiliary switch element SW_1s~ S
W_3s, Second auxiliary switch element SW_1p~ SW_3pControl times
It is possible to control as shown in FIG.
In each control state, when the input voltage is E,
The output voltages Vz as shown are obtained respectively.
It For example, when the output voltage Vz is E / 3,
Control as follows. First, the main switch SW_AThe
Main switch SW_BTurn off the DC power supply DC
The charge / discharge circuit 1 is charged. At this time, each capacitor unit
Circuit 3₁~ 3₃First auxiliary switch element SW of_1s~ SW
_3sAll on, second auxiliary switch element SW _1p~ SW
_3pAre all turned off (STEP 1). That is, each key
Capacitor unit circuit 3₁~ 3₃Capacitor C₁~ C₃To
Connect in series and connect this series circuit to DC power supply DC
Of. Capacitor C₁~ C₃Are equal volumes,
Each capacitor C₁~ C₃The terminal voltage of each to E / 3
Become.

When the main switch SW _A is turned off and the main switch SW _B is turned on after the capacitors C _{1 to} C ₃ are charged, the charging / discharging circuit 1 is connected to the load L. At this time, for the capacitor unit circuit 3 ₁ , the first auxiliary switch element SW _1s is turned on and the second auxiliary switch element SW _1s is turned on.
_With respect to the remaining capacitor unit circuits 3 ₂ and 3 ₃ , the first auxiliary switch elements SW _2s and SW _3s are turned off, and the second auxiliary switch elements SW _2p and SW _3p are turned on (STEP 2). . With this setting, only the capacitor C ₁ of the capacitor unit circuit 3 ₁ will be is connected to the load L, the other capacitor C _2, C ₃ is disconnected from the load L. Therefore, the applied voltage to the load L is E /
It will be 3.

In the above control example, the case of stepping down the voltage has been described, but as an example of stepping up the output voltage, the case of setting to 5E / 2 will be described. First, the main switch SW _A is turned on, the main switch SW _B is turned off, and the charging / discharging circuit 1 is charged by the DC power supply DC, which is the same as the control example described above. However, in the above control example in which the output voltage is E / 3, the charging process has one step, but when the output voltage is 5E / 2, the charging process has three steps.

That is, in the first stage, the first auxiliary switch element SW _1s of the capacitor unit circuit 3 ₁ is turned off and the second auxiliary switch element SW _1s is turned off.
The auxiliary switch elements SW _1P turn on, another capacitor unit circuit 3 _2, for 3 ₃ The first auxiliary switch elements SW _2s, on the SW _3s, the second auxiliary switching element S
Set W _2p and SW _3p to off. At this time, the terminal voltage of the capacitor C ₁ of the capacitor unit circuit 3 ₁ is 0, and the terminal voltages of the capacitors C ₂ and C ₃ of the capacitor unit circuits 3 ₂ and 3 ₃ are E / 2 (STEP 1).

In the second step, the ON / OFF states of the first auxiliary switch elements SW _{1s to} SW _3s and the second auxiliary switch elements SW _{1p to} SW _3p set in the first step are reversed. That is, for the capacitor unit circuit 3 ₁ , the first auxiliary switch element SW _1s is turned on and the second auxiliary switch element SW _1s is turned on.
_1P is turned off, and for the other capacitor unit circuits 3 ₂ and 3 ₃ , the first auxiliary switch elements SW _2s and SW _3s are turned off,
The second auxiliary switch elements SW _2p and SW _3p are set to ON (STEP 2). At this stage, each capacitor C ₁ , C
The terminal voltages of ₂ and C ₃ are E, E / 2 and E / 2, respectively.

Further, in the third stage, the first auxiliary switch element SW _2s is turned on for the capacitor unit circuit 3 ₂ .
The second auxiliary switch element SW _2p is set to OFF, and for the capacitor unit circuits 3 ₁ and 3 ₃ , the first auxiliary switch elements SW _1s and SW _3s are turned off, and the second auxiliary switch elements SW _1p and SW _3p. Is set to ON (STEP 3). At this time, the terminal voltage of each capacitor C ₁ , C ₂ , C ₃ is
E / 2, E, E respectively.

Therefore, if the terminal voltages of all the capacitors C _{1 to} C ₃ are added and output, it becomes 5E / 2.
That is, by setting the first auxiliary switching element SW _1s to SW _3s of each capacitor unit circuits 3 ₁ to 3 _3-one, the second off the auxiliary switching element SW _1p to SW _3p, all capacitors C ₁ -C ₃ are connected in series, and the voltage across the series circuit becomes 5E / 2 (STEP 4).

As described above, the charging process has one to a plurality of stages, and the first auxiliary switch element SW _1s at the time of discharging is set.
~ SW _3s and second auxiliary switch elements SW _{1p to} SW _3p
If the combination of the on / off states of is set as necessary, the input voltage E is 1/3, 1/2, 2/3, 5
/ 6, 1, 4/3, 3/2, 2, 7/3, 5/2, and triple output voltages can be obtained.

In the present embodiment, an example in which the charge / discharge circuit 1 is configured by connecting three capacitor unit circuits 3 _{1 to} 3 ₃ in series has been described. However, the charge / discharge circuit 1 includes two capacitor unit circuits 3 _{1 to} 3 _3. It is also possible to configure with four or more capacitor unit circuits. In particular, if four or more capacitor unit circuits are used, it is possible to further increase the output voltage setting stage. Further, if the number of capacitor unit circuits increases, it becomes necessary to control a large number of switch elements as the first auxiliary switch element and the second auxiliary switch element in addition to the main switch elements SW _A and SW _B. However, if a microcomputer is used, many switch elements
Even if control is required to combine the OFF states in a complicated manner, it is possible to handle it.

(Embodiment 2) In this embodiment, as shown in FIG. 4, a pulsating current voltage output from a full-wave rectifier RE composed of a diode bridge is used as an input, and a main switch is provided so as to obtain a desired output voltage. Elements SW _A , SW _B , first auxiliary switch elements SW _{1s to} SW _3s , second auxiliary switch element S
It controls the on / off timing of W _{1p to} SW _3p .

The control circuit 2 monitors the fluctuation of the pulsating current voltage by the voltage across the resistor R ₂ of the resistors R ₁ and R ₂ connected in series between the output terminals of the full-wave rectifier RE. Control circuit 2
Since the desired output voltage is set in the same manner as in the first embodiment, the output voltage is substantially constant based on the ratio between the pulsating current voltage monitored by the voltage across the resistor R ₂ and the set output voltage. The ratio of the input voltage to the output voltage of the charging / discharging circuit 1 is controlled in the same manner as in the first embodiment so that

That is, the control circuit 2 is as shown in FIG.
And the resistance R₂Input voltage Vin which is the voltage across
Ratio to the set voltage Vs corresponding to the output voltage (Vin / V
s) is included in the comparison circuit 21, and the comparison circuit 21
The obtained ratio is converted into a digital signal in the A / D conversion circuit 22.
After conversion into the charge / discharge circuit 1 in the magnification setting circuit 23
Set the input / output voltage ratio of. In the magnification setting circuit 23,
Main switch element SW_A, SW_B, 1st auxiliary switch required
Elementary SW_1s~ SW_3s, Second auxiliary switch element SW _1p~ S
W_3pSetting by controlling on / off of
Of the ratio of input / output voltage that can be calculated by the comparison circuit 21
Select a ratio close to the reciprocal of the ratio. For example, the comparison circuit 21
If the ratio obtained in step 1 is 1/2, the magnification setting circuit 23 sets
If the ratio obtained by the comparison circuit 21 is 2
For example, the magnification setting circuit 23 selects 1/2. This way
When the magnification is selected by the switch control unit 24,
Control procedure (program) corresponding to the selected magnification in the memory 2
Read from 5, main switch element SW_A, SW_B, First
Auxiliary switch element SW_1s~ SW_3s, Second auxiliary switch
H element SW_1p~ SW_3pControl on and off.

As described above, the main switch elements SW _A , SW
_B , the output voltage of the charge / discharge circuit 1 is controlled by controlling the on / off timings of the first auxiliary switch elements SW _{1s to} SW _3s and the second auxiliary switch elements SW _{1p to} SW _3p.
Although the output voltage of the charging / discharging circuit 1 is not completely constant because the ratio of the input / output voltage of the charging / discharging circuit 1 is set stepwise, the charging / discharging circuit 1 does not have a constant output voltage. By connecting the smoothing capacitor C ₀ to the output side of 1, the fluctuation of the voltage applied to the load L can be significantly reduced. Even if the capacitor C ₀ is connected between the output terminals of the rectifier circuit RE, the fluctuation of the voltage applied to the load L can be suppressed. However, by providing the capacitor C _{0 in} the subsequent stage of the charging / discharging circuit 1 as in this embodiment. The voltage fluctuation can be further reduced. In addition, if the voltage fluctuation is similar,
The capacitance of the capacitor C ₀ can be significantly reduced as compared with the case where the capacitor C ₀ is connected between the output terminals of the rectifier circuit RE. Other configurations are similar to those of the first embodiment.

(Embodiment 3) In this embodiment, as shown in FIG. 6, a charging / discharging circuit 1 ₁ , connected to the output side of the charging / discharging circuit ₁ ,
1 ₂ by powering the separately to a plurality of loads L _1, L _2, and in which the voltage applied to each load L _1, L ₂ has to be set. In the charging / discharging circuit 1, two capacitor unit circuits 3 ₁ and 3 ₂ are connected in series, and for one capacitor unit circuit 3 ₂ , the first auxiliary switch element SW _2s is connected between the DC power source DC and the load L _2. Have been inserted into. Further, the main switch S is provided between the charging / discharging circuit 1 and the positive electrode of the DC power supply DC.
W _A is inserted. The main switch element S is connected to the capacitors C ₁ and C ₂ of the capacitor unit circuits 3 ₁ and 3 ₂ , respectively.
Charge / discharge circuits 1 ₁ and 1 ₂ are connected via W _1C and SW _2C . Each of the main switch elements SW _1C and SW _2C is a two-pole _single- throw switch, and contacts are inserted between both ends of the capacitors C ₁ and C ₂ and both ends of the charge / discharge circuits 1 ₁ and 1 ₂ . Here, capacitors having the same capacitance are used as the capacitors C ₁ and C ₂ .

Each of the charging / discharging circuits 1 ₁ and 1 ₂ has a structure in which two capacitor unit circuits 3 ₁₁ , 3 ₁₂ , 3 ₂₁ and 3 ₂₂ are connected in series. In addition, each charging / discharging circuit 1 ₁ , 1 ₂
Of the main switch element S between one end of the load and each load L ₁ , L _2.
W _1B and SW _2B are inserted. Capacitors C ₁₁ , C _{12 of} each capacitor unit circuit 3 ₁₁ , 3 ₁₂ , 3 ₂₁ , 3 ₂₂ ,
Of equal capacity is used for the C _21, C _22. Due to the connection relationship as described above, the control circuit 2 includes five main switch elements SW _A , SW _1B , SW _2B , SW _1C , SW _2C , and 6
First auxiliary switch elements SW _1s , SW _2s , S
W _11s , SW _12s , SW _21s , SW _22s and 6 second
Auxiliary switch elements SW _1p , SW _2p , SW _11p , SW ₁₂
The on / off timings of _p , SW _21p , and SW _22p are controlled.

For example, if the output voltage of the DC power supply DC is E
Sometimes, both loads L₁, L₂Applied voltage to E
If you try to, you will be controlled as follows.
First, in the first stage of the charging process, the capacitor unit circuit
Three₁, 3₂Capacitor C₁, C ₂Voltage of both ends of E / 2
To charge. That is, the main switch element SW
_AON, main switch element SW_1C, SW_2COff,
Capacitor unit circuit 3₁, 3₂About the first auxiliary
Switch SW_1s, SW_2sON, second auxiliary switch required
Elementary SW_1p, SW_2pSet to off. Settings like this
In the state, the charging / discharging circuit 1₁, 1₂Disconnect from DC power supply DC
Separated, a capacitor C is placed between both ends of the DC power supply DC.₁, C₂
Will be connected in series. Therefore, each key
Capacitor C₁, C₂Has a terminal voltage of E / 2.

Next, the terminal voltages of the capacitors C ₁₁ , C ₁₂ , C ₂₁ , and C ₂₂ of the charge / discharge circuits 1 ₁ and 1 ₂ are E / 2, respectively.
To charge. That is, the main switch element SW
_1C and SW _2C are turned on, main switch elements SW _1B and SW _2B are turned off, and first switch elements SW _11s and SW
_21s is turned on, the first switch elements SW _12s and SW _22s are turned off, and the second switch elements SW _11p and SW _21p are turned off,
The second switch elements SW _12p and SW _22p are set to ON, respectively. At this time, since the capacitors C ₁₁ and C ₂₁ are connected in parallel to the capacitors C ₁ and C ₂ , respectively, the voltage across the capacitors C ₁₁ and C ₂₁ becomes E / 2. Here, the capacitor C _1, the capacitance of C ₂ is a capacitor C _11,
Main switch element SW if it is sufficiently larger than the capacity of C _21
A can be turned off, but can remain on.

Furthermore, the first auxiliary switch element S
W_11s, SW_12s, SW_21s, SW_22sAnd the second auxiliary
Switch element SW_11p, SW_12p, SW_21p, SW_22p
Reverse the on / off states of and. That is,
First switch element SW_11s, SW _21sOff, first
Switch element SW_12s, SW_22sTurn on the second switch
H element SW_11p, SW_21pOn, second switch element
SW_12p, SW_22pAre set to off respectively. This and
Capacitor C₁₂, C_{twenty two}Is the capacitor C₁, C₂Niso
Since they are connected in parallel respectively, the capacitor C₁₂, C_{twenty two}Edge of
Each child voltage becomes E / 2. In this way,
Pasita C₁₁, C₁₂, C_{twenty one}, C_{twenty two}Terminal voltage is E /
It becomes 2. Where capacitor C₁, C₂The capacity of
Pasita C₁₂, C _{twenty two}If it is sufficiently larger than the capacity of
Switch SW_ACan be turned off, but turned on
It's good.

Since the charging process is completed as described above, next, the main switch elements SW _1C and SW _2C are turned off, and the first first auxiliary switch elements SW _11s , SW _12s , SW _21s and SW.
_22s on, second auxiliary switch element SW _11p , SW
Set _12p , SW _21p , and SW _22p to off. That is, the capacitors C ₁₁ and C ₁₂ are connected in series, and the capacitors C ₂₁ and C ₂₂ are connected in series. When the main switch elements SW _1B and SW _2B are turned on in this state, the applied voltages to the loads L ₁ and L ₂ become E, respectively.

In the above description, the voltages applied to both loads L ₁ and L ₂ are set equal, but if the control procedure of the charging / discharging circuits 1 ₁ and 1 ₂ is changed, each load L ₁ and L ₂ will be applied. It is also possible to apply different voltages. Further, as described above, the terminal voltages of the capacitors C ₁ and C ₂ are respectively set to E / 2.
If only set to the main switch element SW _A , the first
The auxiliary switch elements SW _1s and SW _2s and the second auxiliary switch elements SW _1p and SW _2p are unnecessary. Furthermore, when the applied voltage is set for each of three or more different loads, the number of capacitor unit circuits forming the charge / discharge circuit 1 is increased, and a charge / discharge circuit is provided on the output side for each capacitor unit circuit. It suffices to connect them, and the charge / discharge circuits 1a and 1b may be configured by using three or more capacitor unit circuits. Other configurations are similar to those of the first embodiment.

(Embodiment 4) In this embodiment, as shown in FIG.
Charge / discharge circuit 1 is replaced by 6 capacitor unit circuits 3₁₁, 3_{twenty one}，
Three₃₁, 3₁₂, 3_{twenty two}, 3₃₂Which is configured by
Capacitor unit circuit 3₁₁, 3_{twenty one}, 3₃₁, 3₁₂, 3_{twenty two}, 3
₃₂2 in parallel with each other, 3 parallel circuits in series
And the main switch element SW_ABoth ends of DC power supply DC via
It is connected between them. Further, in this embodiment,
Each capacitor unit circuit 3₁₁, 3_{twenty one}, 3 ₃₁, 3₁₂, 3_{twenty two}，
Three₃₂For the first auxiliary switch element SW_11s, SW
_21s, SW_31s, SW_12s, SW_22s, SW_32sOff
And the second auxiliary switch element SW_11p, SW_21p, S
W_31p, SW_12p, SW_22p, SW_32pTurned on
In the state, each capacitor C₁₁, C_{twenty one}, C₃₁, C_{twenty one}, C_{twenty two}，
C₃₂The second auxiliary switch element SW by the charge of the
_11p, SW_21p, SW_31p, SW_12p, SW_22p, SW
_32pDriving voltage can be obtained. This configuration
In order to be₁₁, C_{twenty one}, C₃₁，
C_{twenty one}, C_{twenty two}, C₃₂The voltage across both ends of the second auxiliary switch
Elementary SW_11p, SW_21p, SW_31p, SW_12p, S
W_22p, SW_32pMust be equal to the drive voltage of
Therefore, capacitor unit circuit 3 connected in series ₁₁, 3
_{twenty one}, 3₃₁, 3₁₂, 3_{twenty two}, 3₃₂The power supply voltage E
2 auxiliary switch elements SW_11p, SW_21p, SW_31p，
SW_12p, SW_22p, SW_32pValue divided by the drive voltage of
Is determined as That is, in the present embodiment, the second supplement
Auxiliary switch element SW_11p, SW_21p, SW_31p, SW
_12p, SW_22p, SW_32pDrive voltage is set to E / 3
There is.

Specifically, as shown in FIG.
Auxiliary switch element SW_isIs a pnp type transistor Q_isWhen
Diode D_isAnd a second auxiliary switch
Elementary SW_ipIs an npn-type transistor Q_ipAnd diode D
_ipIt consists of and. Also, the transistor Q_ipBase of
Pnp type transistor Q_idThe emitter-collector of
Through capacitor C_iI'm trying to give a charge.
That is, the transistor Q_ipThe reference potential of fluctuates
Drive voltage to match the reference potential fluctuation.
However, as described above, the capacitor C_i
Second auxiliary switch element SW using the charge of_ipDrive
Since it obtains a dynamic voltage, it can be used without a transformer.
Auxiliary switch element SW_ipTo be able to control
It Also, the transistor Q_isAnd transistor Q_idIs
Current mirror circuit 4_s, 4 _pThrough control times
It is controlled by the control signal from path 2.

A capacitor unit circuit 3 _{i having the} configuration shown in FIG.
Regarding the above, when the first auxiliary switch element SW _is is turned on to charge the capacitor C _i , the control signal input to each of the current mirror circuits 4 _s and 4 _p is set to the L level, and the transistor Q _is and the transistor Q _is Turn off both Q _id . At this time, since the voltage across the capacitor unit circuit 3 _i is higher than the voltage across the capacitor C _i , the diode D _is turned on and the capacitor C _i is charged. At this time, the diode D _ip is kept off because the reverse voltage is applied.

On the other hand, in order to turn on the first auxiliary switch element SW _is to discharge the charge stored in the capacitor C _i , the control signal to the current mirror circuit 4 _s is set to H level to turn on the transistor Q _is . To Since the diode D _ip is turned off by the reverse bias, the capacitor C
The charge of _i will be supplied to the load L through the transistor Q _is .

In the charging process, the control signal to the current mirror circuit 4 _p is set to the H level so that the first auxiliary switch element SW _is is turned off and the transistor Q _ip is turned on when the capacitor C _i is not charged. To do. At this time, the charge of the capacitor C _i is applied between the base and the emitter of the transistor Q _ip through the transistor Q _id to turn on the transistor Q _ip . At this time diode D
The _is is reverse biased, and transistor Q _is has been held off.

In the discharging process, the second auxiliary switch is required.
Elementary SW_ipTo turn on the capacitor C _iDisconnect from the discharge path
When separating them, each current mirror circuit 4_s, 4
_pBoth control signals input to the
Register Q_is, Q_ipBoth off. Die at this time
Aether D_ipIs a forward bias and the power supply path to the load L
become. Also, the capacitor C_iThe voltage across both ends of the capacitor
Unit circuit 3_iSince it is larger than the voltage across the diode,
D_isIs reverse biased and kept off. That is,
First auxiliary switch element SW_isTurns off.

As described above, in the capacitor unit circuit 3 _i which does not discharge the electric charge in the discharging process, the voltage across the capacitor C _i is set to the second auxiliary switch element SW _ip.
Since it is used as the drive voltage of the second auxiliary switch S
When the level shift of the reference potential is performed to control the second auxiliary switch element SW _ip in which the power consumption required for controlling W _ip is suppressed and the efficiency is improved, and the reference voltage fluctuates. It is not necessary to use a transformer, and a semiconductor circuit can be designed.

In the circuit configuration of FIG. 7, it is possible to set the output voltage in seven stages by controlling the charging process and the discharging process as shown in FIG. In FIG.
→ indicates the charge of the capacitor C _i as the second auxiliary switch element S
It is used as a drive voltage of W _ip , and − indicates that the voltage across the capacitor C _i is indefinite as a result of using the charge of the capacitor C _i as the drive voltage of the second auxiliary switch element SW _ip. Show. Referring to FIG. 9, a case where the voltage applied to the load L is E / 3 will be described as an example of stepping down the input voltage. In the charging process, the main switch element S
On the W _A, it sets off a main switch element SW _B, first the first auxiliary switching element SW _11s, SW _{21 s,} SW
_31s , SW _12s , SW _22s , SW _32s are turned on, and second auxiliary switch elements SW _11p , SW _21p , SW _31p , SW
Set _12p , SW _22p , and SW _32p to off. In this state, capacitors C ₁₁ , C ₂₁ , C ₃₁ , C ₂₁ , C ₂₂ , C ₃₂
2 are connected in parallel, and three parallel circuits are connected in series. All capacitors C ₁₁ ,
Assuming that C ₂₁ , C ₃₁ , C ₂₁ , C ₂₂ , and C _{32 have} the same capacitance, each of the capacitors C ₁₁ , C ₂₁ , C ₃₁ , C ₂₁ , C ₂₂ , and C _32.
The terminal voltage of each becomes E / 3.

Next, the first auxiliary switch element SW _11s ,
_Turn on SW _21s , first auxiliary switch element SW _31s , S
W _12s , SW _22s , SW _32s are turned off, second auxiliary switch elements SW _11p , SW _21p are turned off, second auxiliary switch elements SW _31p , SW _12p , SW _22p , SW _32p are turned on, and the main switch is set. When SW _A is turned off and the main switch SW _B is turned on, the charges of the capacitors C ₁₁ and C ₁₂ connected in parallel feed the load L, and the voltage applied to the load L becomes E / 3. Of.

The control example described above is an example of step-down, but step-up
For example, when the applied voltage to the load L is set to 7E / 3
In that case, the following control may be performed. In this case, charge
The process has three stages. That is, in the first stage, the output power is
The same as when the pressure is E / 3, and the main switch element
SW_AON, main switch element SW_BSet to off,
First, the first auxiliary switch element SW_11s, SW_21s, SW
_31s, SW_12s, SW _22s, SW_32sON, the second supplement
Auxiliary switch element SW_11p, SW_21p, SW_31p, SW
_12p, SW_22p, SW_32pSet to off. This and
All capacitors C₁₁, C_{twenty one}, C₃₁, C_{twenty one}，
C_{twenty two}, C₃₂The terminal voltage of each becomes E / 3.

In the second stage of the charging process, the first auxiliary switch element SW _11s is turned on and the second auxiliary switch element SW _11s is turned on.
_21p , SW _31p are turned on, and other first auxiliary switch elements SW _21s , SW _31s , SW _12s , SW _22s , SW _32s
Off, other second auxiliary switch elements SW _11p , SW
Set _12p , SW _22p , and SW _32p to off. Therefore, only the voltage across the capacitor C ₁₁ becomes E.

In the third stage of the charging process, the first auxiliary switch element SW _21s is turned on and the second auxiliary switch element SW _21s is turned on.
_31p and SW _12p are set to ON, and the remaining first auxiliary switch elements SW _11s , SW _31s , SW _12s , SW _22s and S
W _32s off, remaining second auxiliary switch element S
Turn off W _11p , SW _21p , SW _22p , and SW _32p . That is, the voltage across the capacitor C ₂₁ becomes E.

As described above, the capacitors C ₁₁ , C ₂₁
The voltage across E becomes E and the remaining capacitors C ₃₁ , C ₁₂ ,
In a state where the voltage across C _22, C ₃₂ became E / 3, the first auxiliary switch elements SW _11s, SW _21s, set to On SW _31s, the remaining of the first auxiliary switching element SW _12s, S
W _22s and SW _32s are turned off, and all the second auxiliary switch elements SW _11p , SW _21p , SW _31p , SW _12p and SW
Set _22p and SW _32p to off. At the same time, the main switch element SW _A is turned off and the main switch element SW _B is turned on. At this time, the terminal voltages of the capacitors C ₁₁ , C ₂₁ , and C ₃₁ are added, and the voltage of 7E / 3 becomes the voltage applied to the load L.

As described above, the first auxiliary switch elements SW _11s , SW _21s , SW _31s , SW _12s , SW _22s ,
SW _32s , second auxiliary switch element SW _11p , S
By controlling W _21p , SW _31p , SW _12p , SW _22p , and SW _32p to control the connection procedure in the charging process and the discharging process, the applied voltage to the load L can be set in multiple stages. Of. Other configurations are similar to those of the first embodiment.

(Embodiment 5) In the present embodiment, as shown in FIG. 10, instead of using bipolar transistors as the first auxiliary switch element SW _is and the second auxiliary switch element SW _ip of the capacitor unit circuit 3 _i . To DMOS
Type FET is used. Since the parasitic diode exists in the DMOS type FET, it is not necessary to provide the diode externally, and the circuit configuration is further simplified.

In each of the above embodiments, the current mirror circuit 4
Control unit 2 to capacitor unit circuit 3 using _s and 4 _p
Although the level shift of the control signal to _i is performed, the level shift may be performed using a photo coupler or the like.

[0050]

According to the invention of claim 1, a plurality of capacitor unit circuits, which are two-terminal circuits, are connected to form a charge / discharge circuit. The capacitor unit circuit is composed of a capacitor and a first auxiliary switch. Since the series circuit with the element and the second auxiliary switch element are connected between both terminals, if the connection relation of the capacitor unit circuit is set appropriately, charging and discharging of the charge / discharge circuit can be performed. In this case, the output voltage can be set in multiple stages by designating the ON / OFF states of the first auxiliary switch element and the second auxiliary switch element of each capacitor unit circuit in the control circuit. Have. That is, the output voltage can be stepped down or stepped up with respect to the input voltage using the same circuit configuration, and the number of output voltage setting stages can be arbitrarily set by combining the capacitor unit circuits having the same configuration. It has the advantage that it can be designed.

According to the second aspect of the present invention, since the second auxiliary switch element is controlled by using the electric charge charged in the capacitor in each capacitor unit circuit, it is necessary to separately provide a power source for controlling the second auxiliary switch element. There is an advantage that the circuit configuration is simplified and the efficiency of the entire circuit is improved.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a first embodiment.

FIG. 2 is a circuit diagram showing a capacitor unit circuit used in the first embodiment.

FIG. 3 is an operation explanatory diagram illustrating a control example of the first embodiment.

FIG. 4 is a circuit diagram showing a second embodiment.

FIG. 5 is a block circuit diagram of a control circuit used in the second embodiment.

FIG. 6 is a circuit diagram showing a third embodiment.

FIG. 7 is a circuit diagram showing a fourth embodiment.

FIG. 8 is a circuit diagram showing a capacitor unit circuit used in a fourth embodiment.

FIG. 9 is an operation explanatory diagram illustrating a control example of the fourth embodiment.

FIG. 10 is a circuit diagram showing a capacitor unit circuit used in Example 5;

FIG. 11 is a circuit diagram showing a conventional example.

FIG. 12 is a circuit diagram showing another conventional example.

[Explanation of symbols]

1 charge / discharge circuit 2 control circuit 3 _i capacitor unit circuit C _i capacitor DC DC power supply L load SW _A main switch element SW _B main switch element SW _is first auxiliary switch element SW _ip second auxiliary switch element

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[Procedure amendment]

[Submission date] November 5, 1993

[Procedure Amendment 1]

[Document name to be corrected] Drawing

[Name of item to be corrected] Figure 5

[Correction method] Change

[Correction content]

[Figure 5]

Claims (2)

[Claims] 1. A pair of main switch elements which are inserted in series between a DC power source and a load and which are selectively turned on / off, and are connected in parallel to a series circuit of one main switch element and a DC power source. And a charging / discharging circuit that charges the load with a DC power source when one of the main switching elements is on and supplies power to a load when the other main switching element is on, and the charging / discharging circuit is a plurality of two-terminal circuits. Of the capacitor unit circuit are connected in series, and each capacitor unit circuit connects a series circuit of the capacitor and the first auxiliary switch element and the second auxiliary switch element between both terminals. And a control circuit for controlling the on / off timings of each main switch element, each first auxiliary switch element, and each second auxiliary switch element. Flow-to-DC converter circuit. 2. The voltage across a capacitor provided in each capacitor unit circuit is set equal to the drive voltage of the second auxiliary switch element, and the charge of each capacitor holds the second auxiliary switch element on. The DC-DC converter circuit according to claim 1, which is characterized in that.