JPH06164676A - Network system - Google Patents

Abstract

PURPOSE:To provide a network system which can improve the install work efficiency and can support a communication protocol. CONSTITUTION:When the address information of a network interface device 100 and an intelligent device is not stored, a control means 110C of the network interface device 100 sends the setting request of the respective kinds of address information to a non-intelligent device 150 while referring to an address storage means 110B. The non-intelligent device sets the address information of the transmission source and the transmission destination by using a setting means 151D and the control means 110C establishes connection and transfers data based on the respective kinds of set address information, information corresponding to the communication protocol stored in a main storage means 110A and information for exchanging data with the intelligent device.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a network system in which an intelligent device and a network interface device to which a non-intelligent device is connected are connected via a network.

[0002]

2. Description of the Related Art Conventionally, as a non-intelligent type terminal device, there is an input / output dedicated terminal connected to a computer, such as a field terminal equipped with a display and a touch switch. This input / output dedicated terminal may be used by being connected to a network constructed in a premises such as a factory. This network is Ethernet (the data transfer rate is 10 Mbps as standard and about 1 Mbps in production)
ps), a network interface (network interface device) for Ethernet is required to connect the input / output dedicated terminal to this Ethernet. However, RS232C port (serial port) is used for the input / output terminal.
However, it does not have an Ethernet network interface, so an input / output terminal cannot be directly connected to Ethernet.

Therefore, conventionally, a personal computer (hereinafter referred to as a personal computer) has been used as an Ethernet network interface. That is, the dedicated input / output terminal and the personal computer are connected by the RS232C interface (the data transfer rate is a maximum of 20 Kbps in standard), and the personal computer is further connected to the Ethernet to which the host computer is connected. Of course, as a substitute for the personal computer, it is possible to use a dedicated connection device that is different from the personal computer and is connected to the Ethernet.

Here, the Ethernet defines the physical layer and a part of the data link layer of the OSI (Open System Interconnection) 7-layer model, and here, the coaxial cable and the connector shape, A signal collision detection method is specified. MAC (Medium Access Controller) is used for hardware (computer etc.) connected to Ethernet.
ol) Addresses (48 bits) are individually assigned. This MAC address is usually written in the product in a form that cannot be rewritten by the user (EPROM or mask ROM), and is connected to a dedicated connection device as a network interface device (which is different from the above personal computer and connected to Ethernet). It is a value assigned by the management organization of the address to the manufacturer (which is a device) and is not changed.

There are several types of networks using Ethernet, and the network called the Internet is widely known. This Internet uses TCP (Transmisstion Control Protocol)
/ IP (Internet Protocol) protocol is adopted, and the IP address (32 bits) is used for management. Here, TCP / IP is a protocol composed of a transmission control protocol (TCP) and an internet protocol (IP). The IP address is obtained by the user (manufacturer) of the connected device applying for and being assigned to the address management organization. The assigned address can be freely associated with the connected device by the user. A user (manufacturer) who is troublesome to apply for address allocation can use the address allocated by the user only in the area managed by the user. The UNI that uses the TCP / IP protocol is connected to the Internet.
There are X machines and general-purpose personal computers.

Other examples of the non-intelligent type terminal device include, for example, a host terminal having only an RS232C port and a printer having only an RS232C port or a parallel port. Since these devices also do not have the Ethernet network interface as described above, they require the connection device described above. A terminal server or a print server is used as this connection device. The terminal server is a device that connects the host terminal to the Ethernet, and the print server is a device that connects the printer to the Ethernet.

Both the connecting device such as the terminal server and the print server and the connecting device for connecting the input / output terminal to the Ethernet have to set the IP address when they are first used by connecting to the Ethernet. . Therefore, conventionally, a user who purchases the connection device must install the own IP address assigned to him and the IP address of the other party to the connection device. At this time, if the RS232C is connected to a connection device such as a terminal server or a print server,
In many cases, a terminal (for example, a personal computer) for performing the installation is connected through the port, and this terminal is operated to perform the installation work. When a personal computer is used as a network interface device, the installation operation will be performed by the Pancon.

[0008]

As described above, since the conventional connecting device as a network interface device is not provided with a function of installing an IP address, the connecting device is equipped with, for example, a personal computer used for installation. An RS232C interface for connection must be provided. That is, in the connected device,
An RS232C port must be provided for the installation of the IP address, and therefore, the RS232C port, the peripheral circuit for the serial drive, for example, the drive I
Since C is required, the restrictions on the design of the hardware that configures the connected device (device size, shape, and complication of the electronic circuit) are increased, and the manufacturing cost is increased due to the relationship between development man-hours and parts. Was invited.

A user who uses the connection device as described above may install a terminal (for example, a personal computer) for installation.
Had to be prepared, which was inconvenient. This terminal is
It is necessary only for installation, and is unnecessary for normal use of connected devices. In particular, with regard to the above-mentioned connected devices installed on the factory floor, terminals for installation are rarely placed in the surroundings, so the purpose of carrying the terminals for installation from a computer room, office, etc. It had to come out, and the installation work was troublesome.

It is an object of the present invention to provide a network system capable of improving the work efficiency of installation by performing an installation operation by a non-intelligent device and supporting a communication protocol by a network interface device. And

[0011]

To achieve the above object, the first invention is a network system in which an intelligent device and a network interface device to which a non-intelligent device is connected are connected via a network. The non-intelligent device includes setting means for setting source address information indicating the network interface device and destination address information indicating the intelligent device, and the network interface device is configured to perform predetermined communication. Main storage means for storing information corresponding to a protocol and information for enabling transmission / reception of data to / from the intelligent type device, and address storage means for storing the source address information and the destination address information When,
If the address information is not stored in the address storage means, a request for setting the address information is sent to the non-intelligent device and the non-intelligent device that responds to the request sends the request for setting the address information. And a control means for establishing a connection with the intelligent device and transmitting / receiving data based on the address information set by the setting means and the stored information in the main storage means.

In a second aspect based on the first aspect, the predetermined communication protocol is a transmission control protocol and an internet protocol, and the source address information and the destination address information are defined by the internet protocol. It is characterized in that it conforms to the Internet protocol address.

[0013]

According to the present invention, the processing means of the network interface device refers to the address storage means, and as a result of this reference, the address information of the transmission source of its own device (network interface device) and the transmission destination of the intelligent type device are obtained. If the address information is not stored in the address storage means, a request for setting each address information is sent to the non-intelligent device. In the non-intelligent device responding to this request, the setting means sets the source address information indicating the network interface device and the destination address information indicating the intelligent device. The control means of the network interface device enables transmission and reception of the address information set by the setting means, information corresponding to a predetermined communication protocol stored in the main storage means, and data with the intelligent device. It establishes a connection with an intelligent device and sends / receives data based on the information of.

[0014]

Embodiments of the present invention will be described below with reference to the accompanying drawings.

FIG. 2 shows a network interface device according to the present invention (hereinafter referred to as a network I / F device).
2 is a diagram showing an example of a network system configured to have.

In FIG. 1, a local area network (hereinafter, referred to as LAN) 210 includes a network I /
F devices 220 and 230, and host computer 240
Are connected to the network I / F devices, and non-intelligent devices 250 and 26 are connected to the respective network I / F devices.
0 is connected. These non-intelligent type end devices are compatible with the corresponding network I / F device, LAN21.
Data can be transmitted / received to / from the host computer 240 via 0. In addition, the above-mentioned input / output dedicated terminal (panel) is adopted as a non-intelligent type device.

FIG. 1 is a functional block diagram showing an embodiment of a network I / F device and a non-intelligent device in a network system according to the present invention. In the figure, the network I / F device 100
Is the hardware 110 and the real-time kernel unit 1
20, communication protocol unit 130, application unit 1
40 and software.

The real-time kernel unit 120 provides a kernel (performs multi-task processing in real time) function.

The communication protocol unit 130 provides TCP / IP, which is one of the communication protocols, and has four hierarchical names (application layer, transport layer, internet layer, network layer) in the hierarchical structure of the network. ) Corresponding to each function is provided. The application layer of this protocol has an automatic boot function.

The application section 140 includes a system program for supporting the user to program or directly press the keyboard to operate the system, and a man-machine interface program originally developed by the user. It is configured to have a user program unique to the user in consideration of control of the controller and the like. The user program of the application unit 140 also includes a connection process including an IP address setting process, a network OS (kernel) automatic startup process, and a process of connecting a link on the network without user intervention. .

This connection processing is information (program) for enabling data transmission / reception with an intelligent type device (for example, a host computer) connected to a network (for example, Ethernet), more specifically, a virtual circuit with the intelligent type device ( Virtual line)
Is described as a program for establishing a connection, and this is described as a bootstrap program.

The hardware 110 is a main storage unit 110A in which the above-mentioned software is stored, and an address storage unit in which address information of a transmission source indicating a network interface device and address information of a transmission destination indicating an intelligent device are stored. 110B and a control unit 110C for executing a predetermined process by reading and executing the software described above. In addition, the hardware 110 includes a non-intelligent device 150.
And an Ethernet as the LAN 160 is connected. The hardware configuration will be described later (described in detail with reference to FIG. 3). A host computer 170 as an intelligent device is connected to the LAN 160.

The non-intelligent device 150 comprises hardware 151 and an application section 152 having various application programs.
The hardware 151 is a storage unit 1 that stores an application unit 152 (that is, an application program).
A control unit 15 that controls the entire device and the data transmission / reception with the network I / F device 100.
1B, a display unit 151C that displays information for setting an IP address (address information of a transmission source and address information of a transmission destination), and a setting unit 151D for setting an IP address and other data. have.

In this embodiment, a bus, parallel (Centronics), SCSI, or dual port RAM is adopted as an interface for connecting the hardware 110 and the hardware 151. However, due to processing speed, serial (RS2
32C) is not adopted.

FIG. 3 shows the network I / F shown in FIG.
1 shows a block diagram of hardware 110 of device 100. FIG. Here, a configuration in which the LAN 160 shown in FIG. 1 is an Ethernet will be described.

The network I / F device 100 shown in FIG.
, CPU301, ROM302, RAM30
3, EEPROM304, dual port (DUAL PORT
) RAM 305 and LANCE (Local Area Network)
Controller for Ethernet) 306 is connected to the address bus ABUS and the data bus DBUS, respectively. Further, the CPU 301 is provided with a power-on reset (POWE) via an address bus ABUS and a data bus DBUS.
R ON RESET) circuit 307 and watchdog (WATCH DO
G) circuit 308 is connected, and further LANCE3
06 includes an encoder (ENCODER) and a decoder (DE
CODER) 309 is connected.

The ROM 302 includes a kernel (which executes multitask processing in real time), drivers for various peripheral devices, and a communication protocol (TCP / I).
P), programs such as application programs, and MAC addresses are stored. The RAM 303 is used as a work area for calculation. EEPROM
The 304 stores an IP address and other information that may be rewritten (for example, information about a host computer that needs to be added or modified, such as a host name). The dual port RAM 305 is connected to, for example, the non-intelligent type device 150 via an interface, and reads / writes data exchanged with the non-intelligent type device 150. The MAC address can be recorded in the EEPROM 304 by limiting the area of the writing program of the EEPROM 304.

The LANCE 306 is composed of an LSI, and is Ethernet (IEEE8080) excluding the protocol.
It performs processing of 2.3 or Ethernet type 2). The encoder / decoder 309 connected to the LANCE 306 is an interface (transceiver cable)
Is connected to the transceiver 310 for Ethernet via the transceiver 310, and a special code input / output via the transceiver 310, that is, a special code (Manchester code) used in the Ethernet 160 is encoded and decoded. The Ethernet 160 is connected to the host computer 170 via the Ethernet transceiver 320.
Are connected.

The CPU 301 has an address bus ABUS and a data bus DBUS based on a control signal (selection signal).
Control each component connected to. CPU301
Performs the IP address setting process, the kernel automatic startup process, and the connection automatic startup process by reading and executing the program stored in the ROM 302.

The power-on reset circuit 307 is for surely resetting the CPU 301 when the power supply voltage drops. As a result, C
It is possible to prevent malfunction of the PU 301. The watchdog circuit 308 is for stopping the operation of the CPU 301 when a certain period of time elapses when the program goes out of control for some reason or enters an infinite loop.

FIG. 4 shows the network I / F shown in FIG.
3 shows a software configuration of the apparatus 100. In the figure, the ROM 3 of the network I / F device 100
02 (see FIG. 3), the application task 40
1, socket library (7-10 functions) 402,
TCP / IP program 403, command groups (5-1
0 commands) 404, 405 and kernel 406 are stored respectively. The kernel 406 includes a memory driver 407, a LANCE driver 408, and a system call 409.

The application task 401 includes an apparatus automatic start-up (connection automatic start-up) program, that is, a program for establishing a virtual circuit connection with the host computer, and a program for communication with the host computer. A program for setting an IP address and contents such as how to exchange data with the non-intelligent device are described. By executing the automatic connection startup program, the network I / F device 10
0 and a virtual circuit connection between the host computer 170 and the host computer 170 is executed. Further, by executing the program for setting the IP address, the IP address can be set by the installation operation from the non-intelligent device 150.

The socket library 402 is a TCP / I
This is a utility for making P easy to use, and it is supported by UNIX machines and personal computers. The socket library 402 is provided in the form of a C language function. By using this library, it is possible to establish a virtual transmission line (virtual circuit) with the host computer, send and receive data, and disconnect the line (virtual transmission line) without knowing the contents of TCP / IP. Can be executed.

The TCP / IP program 403 provides a protocol including a transmission control protocol (TCP) and an internet protocol (IP). Since TCP is a protocol for exchanging stream type data, the order and reliability of data are guaranteed. On the other hand, the reliability of IP is not guaranteed because IP is a protocol located below it. TC
P / IP usually means ICM in addition to TCP and IP.
In many cases, the peripheral protocol such as P, UDP, telnet, and ftp is included, but in this embodiment, only TCP and IP are supported due to the capacity limitation of the ROM 302. Of course, another protocol may be added to support this protocol. It should be noted that TCP / IP is currently standard equipment of UNIX and is an industry standard protocol of LAN. The command group 404 serves as an interface between the application task 401, the TCP / IP program 403, and the memory driver 407, and the command group 405 is the TCP / IP program 403.
And the role of the LANCE driver 408. That is, each command group causes a corresponding driver to start a predetermined process in accordance with a command from a task requesting the process.

The kernel 406 executes multitask processing in real time. Ie kernel 4
06 performs processing in response to a request from the application task 701. At this time, processing is also performed according to the request input via the system call 409.

The memory driver 407 has a command group 40.
When activated by the command in 4, the dual port RAM 305 is driven.

When the LANCE driver 408 is activated by the command in the command group 405, the LANCE driver 408
Drive 306.

In this embodiment, the network I /
Information transmission / reception between the F device 100 and the non-intelligent device 150 is performed via the dual port RAM 305.

Next, an example of the memory mapping of the dual port RAM 305 is shown in FIG. In FIG. 5, the panel indicates a non-intelligent device and the Ethernet indicates a network I / F device.

An unused (reserved) area is mapped in the 896-byte memory space of addresses 0B (B = Byte, the same applies hereinafter) to 895B.

An area for writing data (transmission data to the host computer) from the non-intelligent device 150 to the network I / F device 100 is mapped in the 512-byte (maximum) memory space of addresses 896B to 1407B. ing. Transmission data is described here by the non-intelligent device 150.

512 of addresses 1408B to 1919B
Network I / F in the byte (maximum) memory space
An area for writing data (received data from the host computer) from the device 100 to the non-intelligent device 150 is mapped. Data for reception is described here by the network I / F device 100.

An area for writing source address information (IP address = 32 bits) is mapped in the 4-byte memory space of addresses 1920B to 1923B. Non-intelligent device 15
The address information of the transmission source is described by 0. In the following description, the source address information is defined as the own node address.

In the 4-byte memory space of addresses 1924B to 1927B, the destination address for transmission, that is, the address information of the destination (IP address = 32
The area for writing (bit) is mapped. Here, address information of the destination is described by the non-intelligent device 150. In the following description, the address information of the destination will be defined as the destination address.

An area for writing a reception source address (IP address = 32 bits) is mapped in the 4-byte memory space of addresses 1928B to 1931B. Here, addresses 1924B to 1927
When the network I / F device 100 receives the data from the host computer corresponding to the destination address described in the 4-byte memory space of B, the network I / F device 100
The / F device 100 describes its own node address corresponding to the host computer (it becomes the destination address when seen from the network I / F device). Further, even when data is received from a host computer other than the above-mentioned host computer, the own node address corresponding to the host computer (it becomes the destination address when seen from the network I / F device) is described.

An area for writing the interrupt factor status from the non-intelligent device 150 to the network I / F device 100 is mapped in the 1-byte memory space of the address 2043B. Here, the interrupt factor status is described by the non-intelligent device 150.

An area for writing the interrupt factor status from the network I / F device 100 to the non-intelligent device 150 is mapped in the 1-byte memory space of the address 2045B. Here, the interrupt factor status is described by the network I / F device 100.

An area for writing an interrupt request mode flag from the non-intelligent device 150 to the network I / F device 100 is mapped in the 1-byte memory space of the address 2046B. Here, the interrupt request mode flag is described by the non-intelligent device 150.

An area for writing an interrupt request mode flag from the network I / F device 100 to the non-intelligent device 150 is mapped in the 1-byte memory space of the address 2047B. Here, the interrupt request mode flag is described by the network I / F device 100.

It should be noted that one of the addresses 2032B to 2042B
Both the 11-byte memory space and the 1-byte memory space at address 2044B are unused areas.

Next, the interrupt factor status and interrupt request mode flag contents written in the dual port RAM 305 will be described.

Interrupt address from non-intelligent device 150 to network I / F device 100 Description content 2046B Interrupt request generation 2043B Interrupt factor status bit 0 Request bit 1 Line disconnection request bit 2 Panel startup OK bit 3 IP address setting complete Bit 4 Transmission error Bit 5-(No setting) Bit 6-(No setting) Bit 7 Acknoledge ◇ Interrupt address from network I / F device 100 to non-intelligent device 150 Description 2047B Interrupt request generation 2045B Interrupt factor status bit 0 Request Bit 1- (No setting) Bit 2- (No setting) Bit 3 Receive error Bit 4 Connection error Bit 5 IP address setting request Bit 6- (No setting) ) Bit 7 Acknoledge The interrupt factor status and interrupt request mode flag as described above are set as necessary. Next, the processing operation of the network I / F device 100 and the non-intelligent device 150 will be described with reference to FIG.

FIG. 6A shows the network I / F device 10.
7 is a flowchart showing a schematic processing operation of 0.
(B) is a flowchart showing a schematic processing operation of the non-intelligent device 150.

First, the processing operation of the network I / F device 100 will be described with reference to FIGS. 3 and 6A. When the power is turned on (step 601), the CPU 30
First, the firmware (or bootstrap program) for booting the real-time kernel is read from the ROM 302 and executed (booted up) (step 602) to read the real-time kernel into the RAM 303 and boot the real-time kernel. (Step 603) Further, the TCP / IP information is read (downloaded) from the ROM 302 to the RAM 303 (step 604). The TCP / IP information does not necessarily have to be expanded from the ROM 302 to the RAM 303.

Next, the CPU 301 determines that the dual port RA
Based on the contents stored in the memory space of the addresses 1920B to 19270B of M305, it is determined whether or not the IP address (own node address and destination address) is set (step 605).

In step 605, if the IP address is set, the connection process is executed (step 606). On the other hand, if the IP address is not set, the non-intelligent device 150 receives the I
A P address setting request is sent (step 60
6) Receive the IP address from the non-intelligent device 150 responding to this request (step 60).
7) After that, it progresses to step 606. The above steps 607 and 608 are processes performed at the time of installation.

When step 606 is completed, the CPU 30
1 judges whether the writing of the IP address to the dual port RAM 305 or the connection is normal (step 609) and issues an error message in the case of an error (step 610). Sends and receives data to and from the computer (step 61)
1).

Next, the non-intelligent type device 150.
The process will be described with reference to FIGS. 1 and 6B. When the power is turned on (step 621), the control unit 15
1B boots up (step 622) and then
It is determined whether or not there is an IP address setting request from the network I / F device 100 (step 623). If there is an IP address setting request in step 623, the setting means 151D sets the IP address (step 624). Then, the control unit 151B causes the I
The P address is transmitted to the network I / F device 100 (actually, the IP address is written in a predetermined area of the dual port RAM 305 of the network I / F device 100) (step 625). Note that steps 624 and 6 above
25 is a process performed at the time of installation.

Control unit 151B that has completed step 625
Determines whether an error message has been received from the network I / F device 100 (step 626).
If not received in step 626, the system is started because it is normal (step 627). On the other hand, if received, the error message is displayed on the display unit 15.
It is displayed on 1C (step 628).

Next, the non-intelligent type device 150
The detailed processing of the above will be described with reference to FIGS. 1, 7, and 8.

7 and 8 are flowcharts showing the detailed processing operation of the non-intelligent device 150. In these figures, the panel shows a non-intelligent device, Ethernet shows a network I / F device, INT shows an interrupt, DPM shows a dual port RAM, and HALT shows a stop.

When the power is turned on (step 70)
1), the control unit 15 of the non-intelligent device 150
1B boots up (step 702) and further displays a normal screen on the display unit 151C.

The controller 151B is a dual port RAM.
305 is checked (step 703), and it is determined whether the memory is normal (step 704).

In step 704, in the case of abnormality, an error message is displayed on the display section 151C (step 705) and the processing is stopped. Set 2 to 1 (ON) and (Step 7
06), address 204 of dual port RAM 305
The non-intelligent device 150 is stored in the 6B storage area.
From the network to the network I / F device 100 is described (step 707), and the network I / F device 100 is described.
/ Generates an interrupt to the F device 100.

Thereafter, the control unit 151B determines whether or not there is an interrupt from the network I / F device 100 based on the stored contents of the storage area of the address 2047B of the dual port RAM 305 (step 708).
Here, if there is no interrupt, it is determined whether or not a timeout has occurred (here, it is set to 3 seconds) (step 709). In step 709, if it is not time-out, the process returns to step 708. On the other hand, if it is time-out, an error message such as "Etherboard error" is displayed on the display unit 151C (step 710).

If there is an interrupt in step 708, the control unit 151B has a "hidden switch" (not shown) provided in the non-intelligent device 150.
It is determined whether or not is pressed (step 71).
1).

This "hidden switch" is one of the touch switches on the panel, and is normally hidden so as not to be easily operated, and is operated by a predetermined operation at the time of installation.

When the "hidden switch" is pressed in step 711, the control section 151B executes a system setting sequence including an IP address setting process and a current IP address display process (step 712).

When the system setting sequence is executed in this way, the system setting content 900A as shown in FIG. 9A is displayed on the display section 151C. From this display state, "IP address setting" is performed by the setting means 151D.
When "," and "RET" Key are selected, the display state of the display unit 151C is changed to the IP address setting content 900B shown in FIG. 9B. "RET" Ke
When y is instructed, the normal menu contents are displayed again.

In this IP address setting content 900B, when the setting means 151D selects either "own node address setting" or "destination address setting", the corresponding address can be set. If the "own node address setting" is selected here, the own node address setting content 900C as shown in FIG. 9C is displayed on the display unit 151C. If "confirm current address" is selected in the IP address setting content 900B shown in FIG. 9B, the display section 151C displays
Current address confirmation content 900D as shown in FIG. 9 (d)
Is displayed. When "RET" Key is instructed in the IP address setting content 900B shown in FIG. 9B, the system setting content 900A (previous screen) is returned to. This is used when the address setting is completed.

In the own node address setting content 900C shown in FIG. 9 (c), one digit is three digits as shown by the dotted line in the figure.
Four addresses are set as one address unit, and 0 to 255 are set as these address values.
Values up to can be set. To do this, select the position of the digit you want to set, and then add each of the "+" and "-" Ke.
By selecting y, the value of the corresponding digit is set.
Here, the "+" key is incremented by 1 each time it is designated, and the "-" key is incremented by 1 each time it is designated. "CAN"
The address being set can be cleared by instructing the key, and when "RET" Key is instructed when the address setting is completed, the previous screen I
It returns to the P address setting content 900B.
The decimal point in the address displayed in the own node address setting content 900C is set and displayed in advance and cannot be set by the user.

When setting the destination address for the destination address setting contents, the same processing as above can be performed.

Current address confirmation content 9 shown in FIG. 9 (d)
In 00D, the currently set own node address and destination address are displayed. This allows the user to confirm these addresses. When "RET" Key is instructed, the previous screen I
It returns to the P address setting contents.

When the IP address setting or changing operation or the reference operation is completed in this manner, the control unit 151B
Determines whether the IP address is set or changed as shown in FIG. 7 (step 71).
3). If so, the own node address is written in the storage areas of the addresses 1920B to 1923B of the dual port RAM 305, and the addresses 1924B to 1924
The destination address is written in the storage area of 27B. Also, the value of bit 3 of the storage area of the address 2043B is set to 1 (step 714). After that, the data indicating the interrupt is written in the storage area of the address 2046B to generate the interrupt to the network I / F device 100 (step 715).

If the "hiding switch" is not pressed in step 711, the process proceeds to step 715. Therefore, under the premise that the IP address once set is not reset (changed), steps 712 to 714 described above are processing operations at the time of installing the IP address.

Upon completion of step 715, the control section 151B, as shown in FIG.
Based on the value of the storage area of address 2047B of M305, it is determined whether or not there is an interrupt from the network I / F device 100 (step 716). Here, if there is no interrupt, it is determined whether or not a timeout has occurred (here, it is set to 3 seconds) (step 71).
7). In step 717, if it is not time out, the process returns to step 716. On the other hand, if it is time out, an error message such as "IP address write error" is displayed on the display unit 151C (step 718).

If there is an interrupt in step 716, the controller 151B determines that the dual port RAM 30
It is determined whether or not bit 5 of the storage area of the address 2045B of 5 has a value of 0 (step 719).

If it is not the IP address write request in step 719, that is, if the value of bit 5 in the storage area of address 2045B is 0, the above step 714
It is recognized that the IP address written in is normal, and then the address 20 of the dual port RAM 305
It is determined whether bit 4 in the storage area of 45B has a value of 0 (step 720).

Address 2045 in step 720
If bit 4 in the storage area of B is 0, it means that the connection processing by the network I / F device 100 has been normally performed, and the system is activated (step 721). By starting this system, the data for transmission to the host computer is sent to the network I.
/ F device 100 can be transmitted.

Note that the control unit 151B sets the bit 5 in the storage area of the address 2045B to 1 in step 719.
If it is, an error message "IP address unset" is displayed on the display unit 151C (step 722). If bit 4 in the storage area of the address 2045B is 1 in step 720, a "connection error" error is displayed. The message is displayed on the display unit 151C (step 723).

Next, detailed processing of the network I / F device 100 will be described with reference to FIGS. 3, 10 and 11.

10 and 11 are flowcharts showing the detailed processing operation of the network I / F device. In these figures, the panel indicates a non-intelligent device, the Ethernet indicates a network I / F device, the IN
T indicates interrupt, DPM indicates dual port RAM, and HALT indicates stop.

Now, when the power is turned on (step 100
1) The CPU 301 reads the firmware (or bootstrap program) for booting the real-time kernel from the ROM 302 and executes it (boots up) (step 100).
2) Read the real-time kernel into the RAM 303 and launch the real-time kernel (step 100
3), and further TCP / IP information from ROM 302 to RAM
Read (download) to 303 (Step 10)
04). Note that the TCP / IP information is not necessarily ROM30.
It is not necessary to expand from 2 to the RAM 303.

The CPU 301 is the dual port RAM 3
An interrupt from the non-intelligent device 150 based on the contents in the storage area of address 2046B of 05 (this is the interrupt in step 707 of FIG. 7 above).
It is determined whether there is any (step 1005). If the content in the storage area at the address 2046B is not data indicating an interrupt in step 1005, it is recognized that there is no interrupt and the process waits until an interrupt occurs.
If the data indicates an interrupt, it is recognized as an interrupt, and the address 20 of the dual port RAM 305 is next detected.
It is determined whether or not bit 2 in the storage area of 43B is 1 (whether or not panel startup is OK) (step 1).
006).

In step 1006, if the value of bit 2 is 0, the processing is stopped (step 1007), while if the value of bit 2 is 1, the dual port RAM 3
05 is checked (step 1008), and then it is determined whether or not the memory is normal (step 100).
9). Here, in the case of abnormality, the processing is stopped (step 1010), while in the case of normality, the dual port RAM
The contents of the storage area of the address 2046B of 305 are reset (step 1011).

Next, the CPU 301 makes the EEPROM 304
Stored information is read (step 1012) and it is determined whether the IP address has been set (step 101).
3). In this determination, when the own node address and the destination address are stored, it is determined that the IP address is set.

When the IP address is set in step 1013, the CPU 301 writes the own node address in the storage area of the addresses 1920B to 1923B of the dual port RAM 305 and the destination address in the storage area of the addresses 1924B to 1927B. Is written (step 1014). Then address 2
047B storage area, the network I / F device 100
From the non-intelligent device 150 is written (step 1015) to generate an interrupt to the non-intelligent device 150. This interrupt is the interrupt in step 708 of FIG.

If the IP address is not set in step 1013, the CPU 301 sets bit 7 of the storage area of the address 2045B of the dual port RAM 305 to the value 1 (step 1016).
Proceed to step 1015. Address 2045
When bit 7 of the storage area of B has a value of 1 and an interrupt to the non-intelligent device 150 occurs, steps 708 and 711 of FIG. 7 described above are executed,
Further, steps 712 to 715 are executed. That is,
This processing is processing at the time of installing the IP address.

Now, the CPU 3 which has completed the step 1015
01 is the address 204 of the dual port RAM 305
Based on the value of the storage area of 6B, it is determined whether or not there is an interrupt from the non-intelligent device 150 (this is the interrupt in step 715 of FIG. 7) (step 1017).

In step 1017, if there is no interrupt, the process waits until there is an interrupt. On the other hand, if there is an interrupt, the data indicating the interrupt is written in the storage area of the address 2046B of the dual port RAM 305, and the address 2043B of the address 2043B is written. It is determined whether or not the value 1 is written in bit 3 of the storage area (whether or not the setting of the IP address is completed) (step 101).
8).

If the setting of the IP address is completed in step 1018, the CPU 301 reads its own node address from the storage areas of the addresses 1920B to 1923B, and the addresses 1924B to 1927B.
The other party's address is read from the storage area of (step 1019), and these addresses (IP addresses) are EE
Write to the PROM 304 (step 1020).

Thereafter, the CPU 301 sends the address 204
The contents in the storage area of 6B are reset (step 1021), and bit 5 of the storage area of address 2045B is reset.
Is set to 0 to cancel the IP address write request (step 1022). After that, the connection connection sequence is executed (step 1023).

If the setting of the IP address is not completed in step 1018, the CPU 301 sets the IP address.
It is determined whether the address has been set (step 102).
4), if the setting has already been made, the above step 102
3, the value 1 is written in bit 5 of the storage area of the address 2045B of the dual port RAM 305 to set the IP address write request (step 1025). Then address 20
INT1 is written in the storage area of 47B to generate an interrupt to the non-intelligent device 150 (step 1026), and then the process is stopped (step 10).
27). The interrupt generated in step 1026 is determined as an interrupt in step 716 of FIG. As a result, an error message "IP address not set" is displayed (step 72 in FIG. 8).
2).

By the way, the CP that has completed step 1023
The U301 determines whether or not the connection is normal (step 1028), and if normal, the dual port RAM3
The data indicating the interrupt is written in the storage area of the address 2047B of No. 05, and the non-intelligent device 15
An interrupt is generated to 0 (step 1029). After finishing this step 1029, the sequence of data transmission / reception starts. The interrupt generated in step 1029 is determined as an interrupt in step 716 of FIG. As a result, the system of the non-intelligent device 150 is activated (step 721 in FIG. 8).

If the connection is in error in step 1028, the CPU 301 determines whether or not it has timed out (here, it is set to 3 seconds) (step 1030). If it has not timed out, the process returns to step 1028, On the other hand, in the case of a time-out, the value 1 is written in bit 4 of the storage area of the address 2045B of the dual port RAM 305, and at the same time (step 103
1) Write data indicating an interrupt in the storage area of address 2047B, and
An interrupt is generated to 0 (step 1032) and then stopped (step 1033). Note that step 10
The interrupt generated at 32 is step 71 in FIG.
At 6, it is determined as an interrupt. As a result, an error message "connection error" is displayed (step 723 in FIG. 8).

As described above, according to the present embodiment, the network I / F device can perform the automatic startup processing of the kernel and the automatic startup processing of the connection of the virtual circuit with the host computer.

Since the non-intelligent type device is also used as the input device for installation, a terminal (for example, a personal computer) for installation and a cable for RS232C are not required at the time of installation.

Further, the user or service person can easily perform the installation work by using the non-intelligent type device.

Also, RS232 is used as a network I / F device.
Since it is not necessary to provide the C port, for example, peripheral circuits for serial drive, connectors, and soatware for serial drive can be omitted, so that the cost can be reduced.

Further, RS232 is added to the network I / F device.
Since it is not necessary to provide the C port, the device can be downsized, and design restrictions are reduced.

[0101]

As described above, according to the present invention, when the setting information of the non-intelligent device sets the source address information indicating the network interface device and the destination address information indicating the intelligent device, The control means of the network interface device enables transmission and reception of each address information set by the setting means, information corresponding to a predetermined communication protocol stored in the main storage means, and data with the intelligent device. The network interface device supports the communication protocol, that is, the virtual network with the host computer connected to the network, by establishing the connection with the intelligent device and transmitting / receiving the data based on the information. It is possible to establish the bets connection, by non-intelligent devices, I
It is possible to provide a network system capable of performing a P address setting operation.

[Brief description of drawings]

FIG. 1 is a functional block diagram showing an embodiment of a network interface device and a non-intelligent device in a network system according to the present invention.

FIG. 2 is a block diagram showing an outline of an embodiment of a network system according to the present invention.

FIG. 3 is a block diagram showing a hardware configuration for realizing the network interface device shown in FIG.

FIG. 4 is a block diagram showing a software configuration for implementing the network interface device shown in FIG.

FIG. 5 is a diagram showing a memory mapping state of a dual port RAM of the network interface device.

FIG. 6 is a flowchart showing a schematic processing operation of a network interface device and a non-intelligent device.

FIG. 7 is a flowchart showing detailed processing operations of the non-intelligent device.

FIG. 8 is a flowchart showing detailed processing operations of the non-intelligent device.

FIG. 9 is a diagram showing an example of a screen for setting an IP address displayed on the non-intelligent device side.

FIG. 10 is a flowchart showing a detailed processing operation of the network interface device.

FIG. 11 is a flowchart showing a detailed processing operation of the network interface device.

[Explanation of symbols]

100, 220, 230 ... Network interface device 110, 151 ... Hardware 110A ... Main storage means 110B ... Address storage means 110C ... Control means 120 ... Real-time kernel section 130 ... Communication protocol section 140 ... Application section 150, 250, 260 ... Non Intelligent type device 151A ... Storage unit 151B ... Control unit 151C ... Display unit 151D ... Setting means 160, 210 ... Local area network 240 ... Host computer 301 ... CPU 302 ... ROM 303 ... RAM 304 ... EEPROM 305 ... Dual port RAM 306 ... LANCE 309 ... Encoder / decoder 310, 320 ... Transceiver

Continuation of the front page (51) Int.Cl. ⁵ Identification number Office reference number FI technical display location H04L 13/08 8220-5K

Claims (2)

[Claims] 1. A network system in which an intelligent device and a network interface device to which a non-intelligent device is connected are connected via a network, wherein the non-intelligent device is a transmission source indicating the network interface device. The network interface device is provided with setting means for setting address information and destination address information indicating the intelligent device, and the network interface device transmits / receives information corresponding to a predetermined communication protocol and data to / from the intelligent device. Main storage means for storing information for enabling, address storage means for storing the source address information and destination address information, and the case where each address information is not stored in this address storage means Is before A request for setting each address information is sent to the non-intelligent device, and the intelligent type is sent based on the address information set by the setting means from the non-intelligent device in response to the request. A network system comprising a control means for establishing a connection with a device and transmitting and receiving data. 2. The predetermined communication protocol is a transmission control protocol C and an internet protocol, and the source address information and the destination address information are compatible with an internet protocol address defined by the internet protocol. A network system characterized by being.