JPH06164424A - Successive decoding device - Google Patents

Successive decoding device

Info

Publication number
JPH06164424A
JPH06164424A JP33960292A JP33960292A JPH06164424A JP H06164424 A JPH06164424 A JP H06164424A JP 33960292 A JP33960292 A JP 33960292A JP 33960292 A JP33960292 A JP 33960292A JP H06164424 A JPH06164424 A JP H06164424A
Authority
JP
Japan
Prior art keywords
pointer
error correction
pointers
delay buffer
maximum likelihood
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP33960292A
Other languages
Japanese (ja)
Other versions
JP2921540B2 (en
Inventor
Toshinori Suzuki
利則 鈴木
Masayoshi Ohashi
正良 大橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
KDDI Corp
Original Assignee
Kokusai Denshin Denwa KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kokusai Denshin Denwa KK filed Critical Kokusai Denshin Denwa KK
Priority to JP4339602A priority Critical patent/JP2921540B2/en
Publication of JPH06164424A publication Critical patent/JPH06164424A/en
Application granted granted Critical
Publication of JP2921540B2 publication Critical patent/JP2921540B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Error Detection And Correction (AREA)

Abstract

PURPOSE:To effectively prevent erroneous correction, which concentratedly occurs before and after overflow, of a sequence encoded to a convolutional code by controlling operation and stop of error correction in accordance with positional relations between the pointer of a delay buffer and that of a trace buffer. CONSTITUTION:A decoder is provided with an erroneous correction preventing circuit 105 which compares a pointer 1 of the delay buffer where a reception sequence is stored with a pointer 2 of the trace buffer where the results of maximum likelihood path search are stored in the time series order. The pointer 1 points the address of the oldest data in the reception sequence stored in the delay buffer, and the pointer 2 points the front end node of the searched maximum likelihood path. When the difference between pointers 1 and 2 is equal to or smaller than a certain value, the error correcting operation is stopped by a control signal 5 from the error correction preventing circuit 105. When the difference between pointers 1 and 2 is larger than the certain value, the error correcting operation is started by the control signal from the erroneous correction preventing circuit 105.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、連続モードで動作する
逐次復号誤り訂正装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a successive decoding error correction device which operates in a continuous mode.

【0002】[0002]

【従来の技術】高品質な放送、通信回線もしくは記録装
置を提供するため、誤り訂正技術が広く用いられてい
る。この中でディジタル通信回線を例にとると、送るべ
き情報系列に冗長性を持たせる符号化を行った後に送信
し、情報系列に誤りが生じたとき受信側ではその冗長性
を用いてある程度の誤りまで訂正することができる。符
号化する方法および復号法は数多くあるが、その中に畳
込み符号化/逐次復号法が存在する。逐次復号法とは、
畳込み符号の持つ木構造を利用し、その時点で最も確か
らしい枝(最尤パスと呼ぶ)を探索することによって、
送られた情報系列を判断する一つの復号手段である。
2. Description of the Related Art Error correction techniques are widely used in order to provide high quality broadcasting, communication lines or recording devices. Taking a digital communication line as an example, the information sequence to be sent is coded so that it has redundancy and then transmitted. When an error occurs in the information sequence, the receiving side uses the redundancy to some extent. You can correct even errors. There are many encoding and decoding methods, among which is the convolutional coding / sequential decoding method. What is the sequential decoding method?
By using the tree structure of the convolutional code and searching for the most probable branch (called the maximum likelihood path) at that time,
It is one decoding means for judging the transmitted information sequence.

【0003】逐次復号法は、復号に要する時間が変動す
る特徴を有する。すなわち、最尤パスを探索するのに要
する計算回数は常に一定ではなく、平均値として与えら
れる。連続モードで動作する逐次復号装置において、復
号に要する時間変動は遅延バッファによって吸収される
が、遅延バッファのサイズによって計算回数が限定され
る。その限られた計算回数内に最尤パスを探索できない
ときには、逐次復号装置は誤り訂正が行なえない。この
事象をオーバフローと呼び、ある確率で発生する。
The successive decoding method has a feature that the time required for decoding varies. That is, the number of calculations required to search the maximum likelihood path is not always constant but given as an average value. In the successive decoding device that operates in the continuous mode, the time required for decoding is absorbed by the delay buffer, but the number of calculations is limited by the size of the delay buffer. When the maximum likelihood path cannot be searched within the limited number of calculations, the sequential decoding device cannot perform error correction. This event is called overflow and occurs with a certain probability.

【0004】従来の逐次復号装置における動作の概略を
説明する。図2は逐次復号装置の構成を表すブロック図
である。入出力部102は、符号化された信号が受信系
列14として入力され、これをアドレス線10及びデー
タ線12を通して遅延バッファ100に格納するととも
に、誤り推定部103の要求に応じ遅延バッファ100
に格納された特定の時刻の受信データを受信信号17に
より誤り推定部103に転送する。誤り推定部103
は、入出力部102より受け取った受信データから最尤
パスの探索を行い、その結果をアドレス線11及びデー
タ線13を通してトレースバッファ101に格納する。
An outline of the operation of the conventional successive decoding apparatus will be described. FIG. 2 is a block diagram showing the configuration of the successive decoding apparatus. The input / output unit 102 receives the encoded signal as the reception sequence 14, stores the received signal in the delay buffer 100 through the address line 10 and the data line 12, and also receives the delay buffer 100 in response to the request from the error estimation unit 103.
The received data at the specific time stored in the above is transferred to the error estimation unit 103 by the received signal 17. Error estimation unit 103
Searches the maximum likelihood path from the received data received from the input / output unit 102, and stores the result in the trace buffer 101 through the address line 11 and the data line 13.

【0005】遅延バッファ100において最も古い時刻
の受信データが格納されているアドレスは、ポインタ1
として入出力部102内で管理されている。新たな受信
系列14の入力要求が来たとき入出力部102は、ポイ
ンタ1のアドレスにある受信データを遅延バッファ10
0より取りだし、ポインタ1に対応した訂正信号16を
誤り推定部103に要求し、訂正を行った後に出力信号
15に出力する。次に入出力部102に入力される受信
系列14は、遅延バッファ100のポインタ1のアドレ
スに格納され、ポインタ1は増分一の更新がなされる。
The address at which the oldest received data is stored in the delay buffer 100 is the pointer 1
Are managed in the input / output unit 102. When an input request for a new reception sequence 14 arrives, the input / output unit 102 transfers the reception data at the address of the pointer 1 to the delay buffer 10.
The correction signal 16 corresponding to the pointer 1 is fetched from 0, the error estimation unit 103 is requested to perform the correction signal 16 and the corrected signal 16 is output to the output signal 15. Next, the reception sequence 14 input to the input / output unit 102 is stored at the address of the pointer 1 of the delay buffer 100, and the pointer 1 is updated by increment of 1.

【0006】一方トレースバッファ101には、その時
点の最尤パスが格納されている。このパスを構成する各
ノードのうち先端にあるノードの深さをポインタ2とし
て、誤り推定部103で管理する。通信路上で生じる誤
りが少ないときには、最尤パスを探索するのに要する計
算回数が少なく済むので、ポインタ2は受信系列14が
入力される毎に増分一の更新がなされ、ポインタ1に比
べて遅延バッファ100のサイズ程度離れていることが
多い。
On the other hand, the trace buffer 101 stores the maximum likelihood path at that time. The error estimation unit 103 manages the depth of the node at the tip of the nodes forming this path as the pointer 2. When the number of errors occurring on the communication path is small, the number of calculations required to search the maximum likelihood path is small. Therefore, the pointer 2 is updated by increment of 1 each time the reception sequence 14 is input, and the pointer 2 is delayed as compared with the pointer 1. In many cases, they are separated by the size of the buffer 100.

【0007】しかし高雑音下になると最尤パスを探索す
る計算回数が指数関数的に増大するため、ポインタ2は
正しいパスを見いだすのが困難になり、停滞する。その
結果、ポインタ1がポインタ2に追い付いてしまうこと
がある。制御部104はこれをオーバフローと判断し、
制御信号4を通して誤り推定部103に初期化命令を発
し、その間の誤り訂正は行わない。初期化動作が完了し
た後に誤り訂正動作はただちに再開される。
However, under high noise, the number of calculations for searching the maximum likelihood path increases exponentially, so that it becomes difficult for the pointer 2 to find a correct path, and the pointer 2 becomes stagnant. As a result, the pointer 1 may catch up with the pointer 2. The control unit 104 determines that this is an overflow,
An initialization command is issued to the error estimation unit 103 through the control signal 4, and error correction is not performed during that time. The error correction operation is restarted immediately after the initialization operation is completed.

【0008】[0008]

【発明が解決しようとする課題】オーバフローが発生す
るような高雑音下の通信路においては、定められた計算
回数以内で、ある時点の最尤パスを探索することができ
ても信頼度の低い間違ったパスであることが多い。その
結果誤った訂正(誤訂正と呼ぶ)によって、復号後の誤
り率が悪化する。このような現象はオーバフローが発生
する前後に集中して起こる。従来の技術では、オーバフ
ローが発生する直前まで誤り訂正動作を続け、またオー
バフロー時の後処理が終了し、誤り訂正動作が再開可能
となった時点でただちに誤り訂正動作を開始する。
In a channel with high noise such as overflow, the maximum likelihood path at a certain point can be searched within a predetermined number of calculations, but the reliability is low. Often the wrong path. As a result, erroneous correction (called erroneous correction) deteriorates the error rate after decoding. Such phenomena occur intensively before and after the overflow occurs. In the conventional technique, the error correction operation is continued until immediately before the overflow occurs, and the error correction operation is started immediately when the post-processing at the time of overflow is completed and the error correction operation can be restarted.

【0009】本発明は、畳込み符号化された系列に対し
てオーバフローの前後に集中して発生する誤った訂正を
効果的に防止することができる逐次復号装置を提供する
ものである。
The present invention provides a sequential decoding device capable of effectively preventing erroneous corrections that occur concentratedly before and after an overflow in a convolutionally encoded sequence.

【0010】[0010]

【課題を解決するための手段】この目的を達成するため
に、連続モードで動作する逐次復号装置において、受信
系列を格納する遅延バッファのポインタと探索した最尤
パスを格納するトレースバッファのポインタを比較する
回路と、誤り訂正動作の作動/停止を切り替えることが
できるスイッチとを具備し、該両ポインタの位置関係に
よって誤り訂正動作の作動と停止が制御できるように構
成されている。
In order to achieve this object, in a sequential decoding device operating in a continuous mode, a pointer of a delay buffer for storing a received sequence and a pointer of a trace buffer for storing a searched maximum likelihood path are provided. It is provided with a circuit for comparison and a switch capable of switching the operation / stop of the error correction operation, and the operation and stop of the error correction operation can be controlled by the positional relationship between the pointers.

【0011】[0011]

【作用】復号器において、受信系列を格納する遅延バッ
ファのポインタ1と、最尤パスを探索した結果を時系列
順に格納するトレースバッファのポインタ2を比較する
誤訂正防止回路を具備する。ポインタ1は、遅延バッフ
ァに格納された受信系列のうち最も古いデータのアドレ
スを示し、ポインタ2は探索された最尤パスの先端ノー
ドを指している。ポインタ1とポインタ2の差がある値
A以内になったとき、誤訂正防止回路からの制御信号5
により誤り訂正動作を停止する。また、ポインタ1とポ
インタ2の差がある値B以上離れたとき、誤訂正防止回
路からの制御信号5により誤り訂正動作を始める。これ
により、逐次復号装置特有のオーバーフローの前後に多
く発生する誤った訂正を防止し、復号後の誤り率特性を
改善する。
The decoder is provided with an erroneous correction prevention circuit for comparing the pointer 1 of the delay buffer for storing the reception sequence with the pointer 2 of the trace buffer for storing the result of searching the maximum likelihood path in chronological order. The pointer 1 indicates the address of the oldest data in the reception sequence stored in the delay buffer, and the pointer 2 indicates the leading node of the searched maximum likelihood path. When the difference between the pointer 1 and the pointer 2 is within a certain value A, the control signal 5 from the error correction prevention circuit
Stops the error correction operation. When the difference between the pointer 1 and the pointer 2 is more than a certain value B, the error correction operation is started by the control signal 5 from the error correction prevention circuit. This prevents erroneous corrections that often occur before and after the overflow peculiar to the sequential decoding device, and improves the error rate characteristic after decoding.

【0012】[0012]

【実施例】図1は本発明の装置構成である。しきい値A
としきい値Bが設定されている誤訂正防止回路105に
おいて、ポインタ1の値とポインタ2の値が入力され、
それらの差(両ポインタの差と呼ぶ)からポインタ1が
ポインタ2にどのくらい接近しているかを判断する。誤
り訂正動作が作動しているときに、両ポインタの差がし
きい値Aより小さくなった場合、誤訂正防止回路105
は誤り訂正動作の停止を命令し、制御信号5によりスイ
ッチ106に伝えられる。スイッチ106には制御信号
5が入力され、これによって誤り訂正動作の作動/停止
を制御する機能を持つ。すなわち誤り訂正動作を停止す
るときは訂正信号18としてグランド19を出力し、誤
り訂正動作を作動するときは訂正信号16を出力する。
また誤り訂正動作が停止している状態において、両ポイ
ンタの差がしきい値Bを越えた場合、誤訂正防止回路は
誤り訂正動作の作動を命令し、制御信号5を通してスイ
ッチ106に伝えられる。このときスイッチ106は訂
正信号18として訂正信号16を出力する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows the device configuration of the present invention. Threshold A
In the erroneous correction prevention circuit 105 in which the threshold value B and the value of the pointer 2 are input,
How close pointer 1 is to pointer 2 is determined from the difference (called the difference between the two pointers). If the difference between both pointers becomes smaller than the threshold value A while the error correction operation is operating, the error correction prevention circuit 105
Command the stop of the error correction operation, which is transmitted to the switch 106 by the control signal 5. The control signal 5 is input to the switch 106, which has a function of controlling the operation / stop of the error correction operation. That is, the ground 19 is output as the correction signal 18 when the error correction operation is stopped, and the correction signal 16 is output when the error correction operation is activated.
Further, when the difference between the two pointers exceeds the threshold value B while the error correction operation is stopped, the error correction prevention circuit commands the operation of the error correction operation and is transmitted to the switch 106 through the control signal 5. At this time, the switch 106 outputs the correction signal 16 as the correction signal 18.

【0013】ここでしきい値Aとしきい値Bはそれぞれ
符号器における符号化率や拘束長、および通信路の状態
等によって最適な値は異なる。一般にしきい値Aまたは
しきい値Bを大きくとり過ぎることは逐次復号装置の誤
り訂正能力を減ずることとなり、逆に小さくとり過ぎれ
ばオーバフロー前後に発生する誤訂正を減らせないこと
になる。しきい値Aおよびしきい値Bを、用いられる符
号器や想定される通信路の状態に応じて適切に設定する
ことにより、特にオーバフローが頻繁に発生するような
高雑音通信路において、復号後のビット誤り率特性が大
きく改善される。
Here, the optimum values of the threshold value A and the threshold value B differ depending on the coding rate in the encoder, the constraint length, the state of the communication path, and the like. In general, if the threshold value A or the threshold value B is set too large, the error correction capability of the iterative decoding apparatus will be reduced. By properly setting the threshold value A and the threshold value B according to the encoder used and the state of the assumed communication channel, after decoding, especially in a high noise communication channel in which overflow frequently occurs. The bit error rate characteristic of is greatly improved.

【0014】[0014]

【発明の効果】以上述べたように、本発明を用いれば、
無限に続く畳込み符号化された系列に対して誤り訂正を
行え、従来の逐次復号装置にみられるオーバフローの前
後に集中して発生する誤った訂正を効果的に防止するこ
とができ、復号後の誤り率特性を改善することができ
る。
As described above, according to the present invention,
Error correction can be performed on convolutionally coded sequences that continue infinitely, and it is possible to effectively prevent erroneous corrections that are concentrated before and after the overflow that occurs in conventional sequential decoding devices. The error rate performance of can be improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例を示すブロック図である。FIG. 1 is a block diagram showing an embodiment of the present invention.

【図2】従来技術で構成された逐次復号装置例を示すブ
ロック図である。
FIG. 2 is a block diagram showing an example of a sequential decoding device configured by a conventional technique.

【符号の説明】[Explanation of symbols]

1 ポインタ1 2 ポインタ2 3 制御信号3 4 制御信号4 5 制御信号5 10 アドレス線 11 アドレス線 12 データ線 13 データ線 14 受信系列 15 出力信号 16 訂正信号 17 受信信号 18 訂正信号 19 グランド 100 遅延バッファ 101 トレースバッファ 102 入出力部 103 誤り推定部 104 制御部 105 誤訂正防止回路 106 スイッチ 1 pointer 1 2 pointer 2 3 control signal 3 4 control signal 4 5 control signal 5 10 address line 11 address line 12 data line 13 data line 14 reception sequence 15 output signal 16 correction signal 17 reception signal 18 correction signal 19 ground 100 delay buffer 101 trace buffer 102 input / output unit 103 error estimation unit 104 control unit 105 erroneous correction prevention circuit 106 switch

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 連続モードで動作する逐次復号装置にお
いて、 受信系列を格納する遅延バッファのポインタと探索した
最尤パスを格納するトレースバッファのポインタを比較
する回路と、 誤り訂正動作の作動/停止を切り替えることができるス
イッチとを具備し、 該両ポインタの位置関係によって誤り訂正動作の作動と
停止が制御できるように構成されたことを特徴とする逐
次復号装置。
1. A circuit for comparing a pointer of a delay buffer storing a received sequence with a pointer of a trace buffer storing a searched maximum likelihood path in a successive decoding apparatus operating in a continuous mode, and activation / stopping of an error correction operation. And a switch capable of switching between the two pointers, and the successive decoding apparatus is configured to control the operation and stop of the error correction operation according to the positional relationship between the pointers.
【請求項2】 前記両ポインタの差がしきい値A以内に
なったときに誤り訂正動作を停止し、しきい値B以上離
れたときに誤り訂正動作を行い、しきい値A, BがA≦
Bであることを特徴とする請求項1に記載の逐次復号装
置。
2. The error correction operation is stopped when the difference between the two pointers is within a threshold value A, and the error correction operation is performed when the difference between the pointers is more than a threshold value B, and the threshold values A and B are A ≦
It is B, The sequential decoding apparatus of Claim 1 characterized by the above-mentioned.
JP4339602A 1992-11-26 1992-11-26 Successive decoding device Expired - Lifetime JP2921540B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4339602A JP2921540B2 (en) 1992-11-26 1992-11-26 Successive decoding device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4339602A JP2921540B2 (en) 1992-11-26 1992-11-26 Successive decoding device

Publications (2)

Publication Number Publication Date
JPH06164424A true JPH06164424A (en) 1994-06-10
JP2921540B2 JP2921540B2 (en) 1999-07-19

Family

ID=18329042

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4339602A Expired - Lifetime JP2921540B2 (en) 1992-11-26 1992-11-26 Successive decoding device

Country Status (1)

Country Link
JP (1) JP2921540B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6381723B1 (en) 1999-04-30 2002-04-30 Mitsubishi Denki Kabushiki Kaisha Error correction device for correcting error in input symbol string

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62274819A (en) * 1986-05-22 1987-11-28 Kokusai Denshin Denwa Co Ltd <Kdd> Stack algorithm type sequential decoding system
JPH0345582A (en) * 1989-07-12 1991-02-27 Ibiden Co Ltd Formation of coating film on ceramic substrate

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62274819A (en) * 1986-05-22 1987-11-28 Kokusai Denshin Denwa Co Ltd <Kdd> Stack algorithm type sequential decoding system
JPH0345582A (en) * 1989-07-12 1991-02-27 Ibiden Co Ltd Formation of coating film on ceramic substrate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6381723B1 (en) 1999-04-30 2002-04-30 Mitsubishi Denki Kabushiki Kaisha Error correction device for correcting error in input symbol string

Also Published As

Publication number Publication date
JP2921540B2 (en) 1999-07-19

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