JPH0616083B2 - Transponder device - Google Patents

Transponder device

Info

Publication number
JPH0616083B2
JPH0616083B2 JP58052478A JP5247883A JPH0616083B2 JP H0616083 B2 JPH0616083 B2 JP H0616083B2 JP 58052478 A JP58052478 A JP 58052478A JP 5247883 A JP5247883 A JP 5247883A JP H0616083 B2 JPH0616083 B2 JP H0616083B2
Authority
JP
Japan
Prior art keywords
pulse
output
encoder
pulses
receiver
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58052478A
Other languages
Japanese (ja)
Other versions
JPS59178381A (en
Inventor
正康 西崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP58052478A priority Critical patent/JPH0616083B2/en
Publication of JPS59178381A publication Critical patent/JPS59178381A/en
Publication of JPH0616083B2 publication Critical patent/JPH0616083B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S13/00Systems using the reflection or reradiation of radio waves, e.g. radar systems; Analogous systems using reflection or reradiation of waves whose nature or wavelength is irrelevant or unspecified
    • G01S13/74Systems using reradiation of radio waves, e.g. secondary radar systems; Analogous systems
    • G01S13/76Systems using reradiation of radio waves, e.g. secondary radar systems; Analogous systems wherein pulse-type signals are transmitted
    • G01S13/767Responders; Transponders

Landscapes

  • Engineering & Computer Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Radar Systems Or Details Thereof (AREA)

Description

【発明の詳細な説明】 本発明は、DME装置及びタカン装置に関し、特に、地上
局であるトランスポンダに関する。
The present invention relates to a DME device and a tacan device, and more particularly to a transponder which is a ground station.

航法援助施設として用いられるDME装置は航空機に対し
て地上トランスポンダまでの傾斜距離を与えるものであ
る。距離測定は、航空機の送信機から符号化した質問パ
ルスをランダムに放射し、これを地上トランスポンダが
受信解号後に再符号化し、特定の遅延時間(50μs)を
与えて応答パルスとして送信する。
A DME device used as a navigation aid facility gives an aircraft a tilt distance to a ground transponder. The distance measurement randomly emits a coded interrogation pulse from an aircraft transmitter, which the ground transponder recodes after reception and gives a specific delay time (50 μs) for transmission as a response pulse.

従つて、航空機は、自己の発射した質問パルスから同期
して受信される応答パルスまでの時間を測定し、地上ト
ランスポンダの遅延時間(50μs)をあらかじめ補正す
ることにより距離を求めている。
Therefore, the aircraft obtains the distance by measuring the time from the interrogation pulse emitted by itself to the response pulse received in synchronization, and correcting the delay time (50 μs) of the ground transponder in advance.

従来、この種のトランスポンダ装置は、第1図に示すよ
うに、受信機5、解号器6、AGC(Automatic Gain Contr
ol)10で構成される閉ループにより解号器6のパルス出
力を最大2700パルスペア/秒に制御している。この2700
パルスペア/秒は航空機約100機に距離情報を与えられ
るパルス数である。このように、トランスポンダは多数
の航空機からランダムに質問パルスを受信すること、質
問パルスの搬送波の洩れにより質問パルス近傍の解号率
が高まる等に起因して、解号器6のパルス出力が集中す
ることがまれに生じる。しかしながら、AGC10はこのパ
ルス出力に対して急速な応答が出来ない為(応答を速く
するとパルス数の変動率が大きくなり不安定となる)
に、トランスポンダ装置の送信機9は過負荷状態とな
り、高電力増幅トランジスタの許容デユーテイを越えて
これを破損せしめ、信頼性の低下並びに保守費用を増大
させる等の欠点があつた。
Conventionally, as shown in FIG. 1, a transponder device of this type has a receiver 5, a decoding device 6, and an AGC (Automatic Gain Contr.
The pulse output of the decoder 6 is controlled at a maximum of 2700 pulse pairs / second by the closed loop composed of ol) 10. This 2700
The pulse pair / second is the number of pulses that can give range information to about 100 aircraft. As described above, the transponder receives the interrogation pulse from a large number of aircraft at random, and the pulse output of the interrogator 6 is concentrated due to the fact that the interrogation pulse carrier leakage causes the interrogation pulse to have a higher resolution rate. It happens rarely. However, the AGC10 cannot make a rapid response to this pulse output (if the response is fast, the fluctuation rate of the pulse number becomes large and it becomes unstable).
In addition, the transmitter 9 of the transponder device has an overload condition, which exceeds the allowable duty of the high power amplification transistor and damages it, resulting in a decrease in reliability and an increase in maintenance cost.

本発明は従来の技術に内在する上記欠点を解消する為に
なされたものであり、従つて本発明の目的は、トランス
ポンダ装置にパルス数制御回路を追加して集中したパル
ス出力の一部を除去することにより、送信パルスのデユ
ーテイの平均化を計り、固体化送信機の高電力増幅トラ
ンジスタの破損原因を解決した高信頼度の新規なトラン
スポンダ装置を提供することにある。
The present invention has been made to solve the above-mentioned drawbacks inherent in the prior art. Therefore, an object of the present invention is to add a pulse number control circuit to a transponder device to remove a part of concentrated pulse output. By doing so, it is intended to provide a highly reliable novel transponder device in which the duty of the transmission pulse is averaged and the cause of damage to the high power amplification transistor of the solid-state transmitter is solved.

上記目的を達成する為に、本発明によえば、航空機から
の質問パルスを受ける受信機と、受信機出力を受ける解
号器と、解号器出力を受けこの中に含まれる出力パルス
数が毎秒所定の最大送信トリガパルス数となるように受
信機を制御するAGC部と、解号器出力のトリガパルス
を符号化する符号器と、符号器の出力を送信する送信機
と、解号器とAGC部との間あるいは解号器と符号器と
の間に挿入され、送信パルスが瞬時に集中して送信機が
過負荷となるのを防ぐため送信パルス数を制限するパル
ス数制御回路とを具備し、前記パルス数制御回路が、瞬
時のパルスの集中を計る期間として毎秒の最大送信トリ
ガパルス数の平均周期より拡い周期を有するパルスを発
生する発振器と、発振器からのパルス周期毎に解号器か
らの出力パルスを計数し、計数値あらかじめ定めた数と
なったとき禁止信号を出す計数回路と、計数回路からの
禁止信号により制御され解号器からの出力パルスを禁止
して瞬時の最大トリガパルス数を制限するゲート回路と
を具備することを特徴とするDME装置やタカン装置の
トランスポンダ装置が得られる。
In order to achieve the above object, according to the present invention, a receiver for receiving an interrogation pulse from an aircraft, a decoder for receiving a receiver output, and a number of output pulses included in the receiver for receiving a decoder output are An AGC unit that controls the receiver so that the maximum number of transmission trigger pulses is a predetermined number per second, an encoder that encodes the trigger pulse of the output of the encoder, a transmitter that transmits the output of the encoder, and an encoder. A pulse number control circuit for limiting the number of transmission pulses in order to prevent the transmission pulses from being instantaneously concentrated and the transmitter from being overloaded. Wherein the pulse number control circuit generates a pulse having a period wider than the average period of the maximum number of transmission trigger pulses per second as a period for measuring the concentration of instantaneous pulses, and for each pulse period from the oscillator. Output pulse from the solver The counting circuit outputs a prohibition signal when it reaches a predetermined number, and the output pulse from the decoder is controlled by the prohibition signal from the counting circuit to limit the maximum number of instantaneous trigger pulses. A transponder device for a DME device or a tacan device, which is characterized by including a gate circuit.

次に本発明をその好ましい一実施例について図面を参照
しながら具体的に説明する。
Next, the present invention will be specifically described with reference to the drawings for a preferred embodiment thereof.

第2図(A)、(B)は本発明の一実施例を示すブロツク構成
図である。図において、参照番号11は本発明に係るパル
ス数制御回路を示し、該パルス数制御回路11は本実施例
においては遅延器7と符号化器8との間に接続されてい
る。パルス数制御回路11は、第1図の遅延器7と符号化
器8との間に挿入する方法と、閉ループ(受信機5、解
号器6、パルス数制御回路11及びAGC10)とする方法の
いずれでもよい。パルス数制御回路11は、第2図(B)に
見られる如く、発振器12、計数回路13、ゲート回路14、
単安定マルチバイブレータ15とインバータ回路16から構
成される。計数回路13はカウンタ131、132及びNORゲー
ト133、134により構成されている。カウンタ131、132
出力A、B、C、Dは1、2、4、8に対応している。
2 (A) and 2 (B) are block configuration diagrams showing an embodiment of the present invention. In the figure, reference numeral 11 indicates a pulse number control circuit according to the present invention, and the pulse number control circuit 11 is connected between the delay device 7 and the encoder 8 in this embodiment. The pulse number control circuit 11 is inserted between the delay unit 7 and the encoder 8 shown in FIG. 1 and is a closed loop (receiver 5, interpreter 6, pulse number control circuit 11 and AGC 10). Any of As shown in FIG. 2B, the pulse number control circuit 11 includes an oscillator 12, a counting circuit 13, a gate circuit 14,
It is composed of a monostable multivibrator 15 and an inverter circuit 16. The counting circuit 13 is composed of counters 13 1 and 13 2 and NOR gates 13 3 and 13 4 . The outputs A, B, C and D of the counters 13 1 and 13 2 correspond to 1, 2, 4 and 8, respectively.

第3図(A)、(B)はパルス数制御回路11の各部波形及び時
間関係を示す図であり、そのうち(A)は通常の場合を、
(B)はパルス出力が集中した場合をそれぞれ示す。
FIGS. 3 (A) and 3 (B) are diagrams showing waveforms of respective parts of the pulse number control circuit 11 and time relationships, of which (A) shows a normal case,
(B) shows the case where the pulse outputs are concentrated.

発振器12は送信パルス2700パルスペア/秒との関係より
約675Hzに設定され、発振器12の出力は第3図のc及び
dに示される。発振器12の出力c及びdにより制御され
る計数回路13は、例えば、発振器12の出力c及びdが論
理レベル“Low”のときに計数を行い、論理レベル
“High”のときに計数回路13の出力f、gは論理レベル
“High”である。
Oscillator 12 is set at about 675 Hz in relation to the transmitted pulses of 2700 pulse pairs / sec, and the output of oscillator 12 is shown at c and d in FIG. The counting circuit 13 controlled by the outputs c and d of the oscillator 12 performs counting when the outputs c and d of the oscillator 12 are at the logic level "Low", and when the outputs c and d of the oscillator 12 are at the logic level "High". The outputs f and g are at the logic level "High".

従つて、計数回路13の出力f、gは、発振器12の出力
c、dが論理レベル“Low”で、かつ単安定マルチバイ
ブレータ15の出力bが4パルス(設定値4パルス:送信
パルス数5400パルスペア/秒に相当)以上のときに、論
理レベル“Low”となり、ゲート回路14に対して禁止ゲ
ートとなるように作動する。
Therefore, the outputs f and g of the counting circuit 13 are such that the outputs c and d of the oscillator 12 are at the logic level "Low", and the output b of the monostable multivibrator 15 is 4 pulses (set value 4 pulses: number of transmitted pulses 5400). (Corresponding to pulse pairs / second) or more), the logic level becomes “Low”, and the gate circuit 14 operates as an inhibition gate.

このようにして、通常の場合(第3図(A))にはパルス
数制御回路11の出力hは入力aと同一となるが、パルス
が集中した場合(第3図(B))には入力aの5パルス以
降が禁止されることにより、第3図(B)のhに示すよう
にデユーテイの平均化が計られる。
Thus, in the normal case (FIG. 3 (A)), the output h of the pulse number control circuit 11 is the same as the input a, but when the pulses are concentrated (FIG. 3 (B)). By inhibiting the input a pulse from the 5th pulse onward, the duty is averaged as shown by h in FIG. 3 (B).

次に、第4図に本発明の応用例としてパルス出力を最大
2700パルスペア/秒に制御する回路を示す。構成は前記
回路に同様の回路を接続したものであり、計数回路13a
の設定値が32パルスであること、発振器12の出力周波数
675Hzを分周器17で1/16分周(約42Hz)することが前記
回路と相違しているのであつて、回路作動は全く同じで
ある。
Next, FIG. 4 shows the maximum pulse output as an application example of the present invention.
A circuit for controlling 2700 pulse pairs / second is shown. The configuration is such that a circuit similar to the above circuit is connected to the counting circuit 13a.
The setting value of is 32 pulses, the output frequency of the oscillator 12
The circuit operation is exactly the same as the above-mentioned circuit in that 675 Hz is divided by 1/16 by the frequency divider 17 (about 42 Hz).

従つてゲート回路14aの出力は32×2×675/16=2700パ
ルス/秒に制御される。
Therefore, the output of the gate circuit 14a is controlled to 32 × 2 × 675/16 = 2700 pulses / sec.

本発明は、以上説明したように、まれに生じる集中パル
ス出力に対して発振器と、発振器出力によつて制御され
る計数回路と、ゲート回路とを具備することによつてパ
ルス数の平均化が出来、結果としてトランスポンダ装置
の送信機を保護し、信頼性を向上させること、保守費用
を低減される効果がある。
As described above, the present invention includes an oscillator, a counting circuit controlled by the oscillator output, and a gate circuit for a concentrated pulse output that occurs infrequently. As a result, the transmitter of the transponder device is protected, the reliability is improved, and the maintenance cost is reduced.

【図面の簡単な説明】[Brief description of drawings]

第1図は従来におけるこの種の装置のブロツク図、第2
図(A)、(B)は本発明の一実施例を示すブロツク構成図、
第3図(A)、(B)は本発明の各部波形及び時間関係を示す
タイミング図、第4図は本発明の応用例を示すブロツク
図である。 1……トランスポンダ装置、2……空中線、3……送受
切換器、4……受信機入力回路、5……受信機、6……
解号器、7……遅延器、8……符号化器、9……送信
機、10……AGC、11……パルス数制御回路、12……発振
器、13、13a……計数回路、14、14a……ゲート回路、1
5、15a……単安定マルチバイブレータ、16、16a……イ
ンバータ回路、17……分周器
FIG. 1 is a block diagram of a conventional device of this type, and FIG.
(A), (B) is a block diagram showing an embodiment of the present invention,
3 (A) and 3 (B) are timing charts showing waveforms and time relationships of each part of the present invention, and FIG. 4 is a block diagram showing an application example of the present invention. 1 ... Transponder device, 2 ... Antenna, 3 ... Transmission / reception switcher, 4 ... Receiver input circuit, 5 ... Receiver, 6 ...
Decoder, 7 ... Delay device, 8 ... Encoder, 9 ... Transmitter, 10 ... AGC, 11 ... Pulse number control circuit, 12 ... Oscillator, 13, 13a ... Counting circuit, 14 , 14a …… Gate circuit, 1
5, 15a: Monostable multivibrator, 16, 16a: Inverter circuit, 17: Divider

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】航空機からの質問パルスを受ける受信機
と、受信機出力を受ける解号器と、解号器出力を受けこ
の中に含まれる出力パルス数が毎秒所定の最大送信トリ
ガパルス数となるように受信機を制御するAGC部と、
解号器出力のトリガパルスを符号化する符号器と、符号
器の出力を送信する送信機と、解号器とAGC部との間
あるいは解号器と符号器との間に挿入され、送信パルス
が瞬時に集中して送信機が過負荷となるのを防ぐため送
信パルス数を制限するパルス数制御回路とを具備し、 前記パルス数制御回路が、瞬時のパルスの集中を計る期
間として毎秒の最大送信トリガパルス数の平均周期より
拡い周期を有するパルスを発生する発振器と、発振器か
らのパルス周期毎に解号器からの出力パルスを計数し、
計数値があらかじめ定めた数となったとき禁止信号を出
す計数回路と、計数回路からの禁止信号により制御され
解号器からの出力パルスを禁止して瞬時の最大トリガパ
ルス数を制限するゲート回路とを具備することを特徴と
するDME装置やタカン装置のトランスポンダ装置。
1. A receiver for receiving an interrogation pulse from an aircraft, a decoder for receiving an output of the receiver, and an output pulse number included in the receiver for receiving an output of the decoder is a predetermined maximum transmission trigger pulse number per second. To control the receiver so that
An encoder that encodes the trigger pulse of the output of the encoder, a transmitter that transmits the output of the encoder, and a transmitter that is inserted between the encoder and the AGC section or between the encoder and the encoder. And a pulse number control circuit for limiting the number of transmission pulses to prevent the transmitter from being overloaded by instantaneously concentrating pulses, the pulse number control circuit, as a period for measuring the instantaneous pulse concentration every second An oscillator that generates a pulse having a period wider than the average period of the maximum number of transmission trigger pulses of, and counts the output pulse from the decoder for each pulse period from the oscillator,
A counting circuit that outputs an inhibit signal when the count value reaches a predetermined number, and a gate circuit that is controlled by the inhibit signal from the counting circuit to inhibit the output pulse from the decoder to limit the maximum number of instantaneous trigger pulses And a transponder device for a DME device or a tacan device.
JP58052478A 1983-03-30 1983-03-30 Transponder device Expired - Lifetime JPH0616083B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58052478A JPH0616083B2 (en) 1983-03-30 1983-03-30 Transponder device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58052478A JPH0616083B2 (en) 1983-03-30 1983-03-30 Transponder device

Publications (2)

Publication Number Publication Date
JPS59178381A JPS59178381A (en) 1984-10-09
JPH0616083B2 true JPH0616083B2 (en) 1994-03-02

Family

ID=12915827

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58052478A Expired - Lifetime JPH0616083B2 (en) 1983-03-30 1983-03-30 Transponder device

Country Status (1)

Country Link
JP (1) JPH0616083B2 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2395266A1 (en) * 1977-06-23 1979-01-19 Suffren Ste Parti Brevets -LACTONE MONOMERS AND THEIR POLYMERS, SALTS AND DERIVATIVES, USED IN PARTICULAR AS COLORS, TANNING ADDICTS AND MEDICINAL PRODUCTS
JPS5412797A (en) * 1977-06-30 1979-01-30 Takamisawa Cybernetics Safe for receiving paper money

Also Published As

Publication number Publication date
JPS59178381A (en) 1984-10-09

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