JPH06149395A - Semiconductor device - Google Patents

Abstract

PURPOSE:To realize a high speed and stable operation even at the time of using any external power supply voltage either of 5V and 3.3V by integrating those power supply voltages in a semiconductor device. CONSTITUTION:This device is constituted of a power supply voltage detecting circuit M, voltage dropping circuit K, and switching circuit L. The power supply voltage detecting circuit M detects the magnitude of the external power supply voltage, and transmits a signal for controlling the switching circuit L as an output. When the external power supply voltage is 5V, the switching circuit L supplies the internal power supply voltage which is dropped to 3.3V by the voltage dropping circuit K to an internal circuit 3, and when the external power supply voltage is 3.3V, the switching circuit L supplies the external power supply voltage to the inside circuit 3 as it is.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and particularly to 3.3V or 3.0V even when the external power supply voltage is 5V.
The present invention relates to a semiconductor device whose main constituent element is a MOSFET that can operate at high speed and stably even in the case of V.

[0002]

2. Description of the Related Art In recent years, in order to meet the demands for higher capacity and higher speed of semiconductor devices, miniaturization of device elements, that is, M
The gate length of the OSFET is being reduced and the gate oxide film is becoming thinner. For example, in a DRAM (Dynamic Random Access Memory) which has the highest capacity at present, the gate length is reduced to 0.5 to 0.6 μm and the gate oxide film thickness is reduced to about 150 A. In this way, as the miniaturization of the MOSFET progresses, the hot carrier breakdown voltage and the source drain breakdown voltage decrease, so that it is difficult to secure the reliability of the semiconductor device in the conventional method using 5 V as the power supply voltage. For example, Reference: Nikkei Microdevices April 1991 issue (P.52-61), Reference: Nikkei Electronics May 1991 issue (P.1).
43).

Therefore, in recent years, a method of reducing the power supply voltage used for the semiconductor device from 5 V to 3.3 V has been considered. By lowering the power supply voltage, the strength of the electric field applied to the channel region is relaxed, so that deterioration of the device element is suppressed. Therefore, the reliability of the semiconductor device will be ensured even if the capacity is increased.

However, the problem of selecting the external power supply voltage is not self-reliant on the side of designing a semiconductor device. Considering that the power supply voltage provided by the external device mounting the semiconductor device may be sufficiently mixed with the semiconductor device according to the conventional power supply voltage method, 3.3 is easily achieved.
Will not switch to V. Therefore, in the transitional period when the power supply voltage shifts from 5 V to 3.3 V, it is necessary to add to the semiconductor device itself such that it operates with either power supply voltage method.

Therefore, the external power supply voltage Vcc (ext)
First, a step-down circuit provided in the semiconductor device receives the voltage, converts it into an internal power supply voltage Vcc (int) = 3.3V, and then supplies it to the internal circuit. This is a system in which the internal power supply voltage Vcc (int) is supplied by the step-down circuit and then supplied to the internal circuit regardless of whether the external power supply voltage is 5V or 3.3V. For example, Reference: Nikkei Microdevice February 1990 issue (p. 11)
5-122).

FIG. 8 is a partial block diagram of a general semiconductor memory device using a conventional step-down circuit. Figure 8
, A step-down circuit (K) configured inside the semiconductor device
To the external power supply voltage V from the node CC connected to the external terminal 1.
cc (ext) is input, the step-down circuit (K) converts it into the internal power supply voltage Vcc (int), outputs it to the output node CCi, and through the internal circuit power supply line 2, this Vcc (int).
Is supplied to each internal circuit 3 (for example, the decoder circuit 5, the sense amplifier circuit 6, the control circuit 7, etc.).

FIG. 9 is a characteristic diagram showing the external power supply voltage Vcc (ext) dependency of the voltage appearing at the input node CC and the output node CCi of the conventional step-down circuit. The output node CCi has a reduced internal power supply voltage Vcc (in
t) appears. In the conventional step-down circuit, the external power supply voltage Vc
When c (ext) = 5V, Vcc (int) = 3.3V
Must be optimized so that is output to CCi. Therefore, when the external power supply voltage Vcc (ext) = 3.3V is used, the internal power supply voltage Vcc (int) drops to about 3.0V. Therefore, there is a drawback that the external power supply voltage applied to the semiconductor device is not output to the output node CCi of the step-down circuit as it is, especially when the low power supply voltage of 3.3 V is used.

FIG. 10 is a characteristic diagram showing a voltage change at the output node CCi of the conventional step-down circuit when the internal circuit in the semiconductor device is switched under the external power supply voltage 3.3V usage environment. The waveform indicated by K2 is a general switching waveform at an arbitrary node in the internal circuit. Generally, when the internal circuit is switched, a through current flows from Vcc to GND. At this time, the output node CCi is limited because the current driving capability of the step-down circuit that supplies Vcc (int) to the internal circuit is limited.
The voltage Vcc (int) at is temporarily greatly reduced, and then returns to the original set voltage. Although it depends on the usage conditions, in our experiments, a drop of about 0.7V was seen, and when the conventional step-down circuit is used, it is considered as a standard for the allowable range of fluctuations in the power supply voltage used ± 10%. Is over. Therefore, there is a drawback that the internal circuit 3 such as the sense amplifier circuit 6 and the input buffer circuit, which is sensitive to the fluctuation of the power supply voltage, easily malfunctions.

[0009]

As described above, in the semiconductor device having the step-down circuit K according to the prior art, the step-down circuit K is used especially in the use environment with the external power supply voltage Vcc (ext) = 3.3V. Since the power supply voltage Vcc (int) supplied to the internal circuit 3 via the power supply has decreased, the semiconductor device does not operate at high speed. See also MOSFE
When a large through current flows in the internal circuit 3 due to the limitation of the current drive capacity of T, the power supply voltage Vcc supplied to the inside is increased.
There is a problem that (int) largely fluctuates, and the semiconductor device easily causes unstable operation.

Therefore, in the case of the conventional structure of only the step-down circuit, there is a drawback that a semiconductor device which operates stably and at high speed cannot be provided especially when the external power supply voltage is 3.3V.

An object of the present invention is to solve the above-mentioned drawbacks and to provide a semiconductor device which operates at high speed and stably.

[0012]

According to the structure of a semiconductor device of the present invention, an input is connected to an external power supply terminal, and an internal power supply voltage lower than an external power supply voltage applied from the external power supply terminal is converted and output. A step-down circuit and an input are connected to the external power supply terminal, and when the external power supply voltage is higher than a set circuit threshold value, a logic 1 or a logic 0 is output, and a logic level when it is a low level. A power supply voltage detection circuit that outputs 0 or a logic 1, a first input end, a second input end, a control end, and an output end, and the external power supply terminal is connected to the first input end, The output of the step-down circuit is connected to the second input terminal, the output of the power supply voltage detection circuit is connected to the control terminal, the output terminal is connected to the power supply line of the internal circuit, and is applied to the control terminal. A logic value signal to the output terminal Characterized by comprising a switching circuit that functions as either the output voltage or the external power supply voltage is applied.

[0013]

1 is a block diagram showing an internal voltage down converting circuit according to a first embodiment of the present invention, and is a partial block diagram showing an example applied to a general semiconductor memory device.

In FIG. 1, in this embodiment, the step-down circuit K and the internal circuit 3 (decoder circuit 5, sense amplifier circuit 6, control circuit 7, etc.) have the same functions as those described in FIG. Therefore, the description is omitted. The power supply voltage detection circuit M has a function of detecting the magnitude of the external power supply voltage Vcc (ext) and sending a signal for controlling the switching circuit L from the output nodes M01 and M02.

FIG. 2 is a circuit diagram showing an example of a circuit design that achieves the function of the power supply voltage detection circuit M in FIG. In FIG. 2, this circuit is basically composed of three inverters, and transistors Q21 and Q2
2, Q24, Q26 are enhancement p-type MOSF
ET (hereinafter abbreviated as EPM) and transistor Q2
Reference numerals 5 and Q27 are enhancement n-type MOSFETs (hereinafter abbreviated as ENM). The transistor Q23 is a depletion n-type MOSFET (hereinafter abbreviated as DNM).

The substrate potentials of the EPMs Q21 and Q22 are the same as the source potential, and the gate potential is given from the drain potential. The substrate potential and gate voltage of DNMQ23 are GND
I will keep it. When the external power supply voltage of 5 V is used, the power supply voltage detection circuit M sends "H" to the output node M01 and sets the output node M02 to "L". If 3.3V is used as the external power supply voltage, set M01 to "L"
To realize "H" in M02.

FIG. 3 is a circuit diagram showing an example of a circuit design for achieving the function of the switching circuit L in FIG. Figure 3
First, consisting of EPMQ31 and ENMQ32
Transfer gate and EPMQ33, ENMQ34
And a transfer gate consisting of a transistor Q31 and a transistor Q33, both of which are an EPM and a transistor Q32.
Q34 is both ENM, and these EPMQ31, Q
33, ENMQ32, Q34 are designed so that the W / L (gate width / gate length) of each transistor is sufficiently large in order to sufficiently increase the current driving capability. The switching circuit L includes an external power supply voltage Vcc (ext), a voltage K01 stepped down by the step-down circuit K, and a power supply voltage detection circuit M.
Two control signals that are more input are input. Depending on the logic of the control signal, either Vcc (ext) or K01 selects one and outputs it to the output node CCi, and the internal circuit 3
Has a function of supplying to.

FIG. 4 shows the dependency of the voltages appearing at the nodes CC, MA1, MB1, MC1 of the power supply voltage detection circuit M shown in FIG. 2 on the external power supply voltage Vcc (ext). This operation will be described with reference to FIG.

First, during a period (a) where the external power supply voltage Vcc (ext) satisfies the condition of the following equation (1), E in FIG.
Since PMQ21 and Q22 are non-conductive, the voltage at the node MA1 is 0V, and the voltages at the node MB1 and the node MC1 are Vcc (ext) and 0V, respectively. Here, VTP is E
This is the threshold voltage of PMQ21 and Q22.

Vcc (ext) ≦ 2 | VTP | (1) Next, as the external power supply voltage Vcc (ext) rises, the EPMQ21 and Q22 become conductive, so the node MA1
Voltage also rises from 0V, and when Vcc (ext) reaches the value expressed by the following equation (2), EPMQ24 and ENM
The inverter composed of Q25 is inverted.

The voltage at the node MA1 at this time corresponding to the period (b) in FIG. 4 is Vcc (ext) -2 | VTP |, and the voltages at the nodes MB1 and MC1 are 0 respectively.
Switching to V, Vcc (ext). here,
VI is a logical threshold of the inverter composed of the EPMQ 24 and the ENMQ 25.

Vcc (ext) = 2 | VTP | + VI (2) Further, in the period of (c) represented by the following equation (3), the external power supply voltage Vcc (ext) is sufficiently high, so that the EPM
Q21 and Q22 become conductive, and the voltage of the node MA1 is Vcc.
(Ext) -2 | VTP |, and nodes MB1 and MC1
Voltage of Vcc (ext) and 0V, respectively.

Vcc (ext) ≧ 2 | VTP | + VI (3) Therefore, in the power supply voltage detection circuit M, the input node CC
Depending on the magnitude of the external power supply voltage Vcc (ext) applied to the output nodes, Vcc (ext) and 0V are sent out to the output nodes M01 and M02, respectively, and 0V and Vcc (ext) are sent out to 3.3V, respectively. You can

Further, Vcc (ex
If the value of t) is VINTV1, the value of VINTV1 is set between 3.3V and 5V. For example, VTP =
When it is designed to be −1.4V and VI = 1.0V, VINTV1 = 3.8V. Furthermore, DNMQ23
Is designed to have a very low current driving capability with respect to EPMQ21 and Q22 in order to have a high resistance.

FIG. 5 shows the output node CCi of the switching circuit L.
Shows the dependence of the voltage appearing on the external power supply voltage Vcc (ext). Here, as described above, VINTV1 is the value of Vcc (ext) that satisfies the expression (2), which is a voltage value that can be regarded as the operation determination point of the power supply voltage detection circuit M.

When Vcc (ext) ≤VINTV1 Output node M01 = 0V, M02 = of the power supply voltage detection circuit M
Since it becomes Vcc (ext), EPMQ31 and ENMQ3
2 is conductive, EPMQ33 and ENMQ34 are non-conductive, and the voltage V applied from the outside is applied to the output node CCi.
cc (ext) is applied as it is, and the voltage of the output node CCi, that is, the voltage Vcc (in
t) is expressed by the following equation (3 ').

Vcc (int) = Vcc (ext) (3 ′) When Vcc> VINTV1 Since node M01 = Vcc (ext) and M02 = 0V, EPMQ31 and ENMQ32 in the switching circuit L are non-conductive, The EPMQ33 and the ENMQ34 become conductive, the output voltage VK01 of the step-down circuit K is applied to the output node CCi, and the voltage Vcc (int) appearing at the output node CCi.
Is expressed by the following equation (4).

Vcc (int) = VK01 (4) Therefore, when 5 V is used as the external power supply voltage Vcc (ext) of the semiconductor device (region in FIG. 5), the internal power supply supplied to each internal circuit 3 The voltage Vcc (int) is
The voltage VK01 is stepped down by the step-down circuit K. On the other hand, when 3.3V is used as the external power supply voltage (see FIG.
The internal power supply voltage Vcc (ext) is supplied as it is to the internal circuit 3 in the semiconductor device as Vcc (int). Therefore, in this embodiment, the internal power supply voltage is equal to the external power supply voltage even when the external power supply voltage is 3.3V. Therefore, unlike the case of the conventional example, the voltage supplied to the internal circuit does not decrease, and the operation speed of the semiconductor device does not slow down (effect).

FIG. 6 shows the output node CCi of the internal step-down circuit when the internal circuit 3 is switched when the present embodiment is incorporated in a semiconductor device and 3.3 V is used as the external power supply voltage. The change in voltage, that is, the internal power supply voltage Vcc (int) is shown with time dependency.

In this embodiment, when the external power supply voltage of 3.3V is used, as described above, the internal power supply voltage Vc is
Since c (int) supplies the external power supply voltage Vcc (ext) to the internal circuit 3 via the transfer gate having a large current driving capability without passing through the step-down circuit K, compared with the case of the conventional example, The fluctuation of the internal power supply voltage Vcc (int) at CCi when the internal circuit 3 is switched is small, so that it is well within ± 10% (0.33V) which is a standard of the allowable fluctuation of the power supply voltage. . Therefore, malfunctions of the internal circuit 3, particularly the sense amplifier circuit 6, the input buffer, and the like, which are sensitive to fluctuations in the power supply voltage, are less likely to occur (effect) than the conventional example.

FIG. 7 is a block diagram showing a second embodiment of the present invention. In FIG. 7, the power supply voltage detection circuit M in the case where the internal voltage down converter of this embodiment is provided in the semiconductor device.
2 shows the second embodiment. In FIG. 7, the present embodiment differs from the power supply voltage detection circuit M in the first embodiment in the configuration of the first stage inverter connected to the input node CC. It is composed of ENMQ31 and DNMQ23, and the gate voltage of ENMQ31 is given from the potential of the drain. Since the other MOSFETs have the same configurations as those of the first embodiment, their description will be omitted. The threshold voltage of the ENMQ31 is designed so that the voltage change at the node MA2 is the same as the voltage change at MA1 in the first embodiment.

For example, the threshold voltage VT of ENMQ31
When N is set to VTN = 2.8V, the voltage VINTV2 that can be detected by the power supply voltage detection circuit M in FIG. 7 becomes equal to VINTV1 in the power supply voltage detection circuit (FIG. 2) described in the first embodiment, In the operation of the second embodiment below, the nodes MA1, MB1 and MC1 are MA2 and MA2, respectively.
The description will be omitted because it is the same as the replacement with MB2 and MC2.

[0033]

As described above, according to the present invention, when the value of the external power supply voltage is, for example, 5V, the output voltage VK01 of the step-down circuit is applied to the output node CCi, while the value of the external power supply voltage is, for example, 3V. When the voltage is 0.3 V, the voltage applied to the node CCi is directly applied to the node CCi by the switching circuit, so that the external power supply Vcc (ex
When t) = 3.3V is used, the operation of the semiconductor device is not delayed because the voltage supplied to the internal circuit does not decrease unlike the conventional example, and the current driving capability is particularly large. When the external power supply voltage is supplied to the internal circuit via the transfer gate composed of the EPM and ENM, the fluctuation of the internal power supply voltage caused by the flow of the through current when the internal circuit is switched is proportional to the conventional example. Since it is sufficiently small, the malfunction of the circuit sensitive to the fluctuation of the power supply voltage is less likely to occur than in the conventional example.

Due to the effects described above, it is possible to provide a semiconductor device which operates stably and at high speed regardless of whether the external power supply voltage Vcc (ext) used is 3.3V or 5V.

In this embodiment, the power supply voltage detection circuit has the configuration shown in FIGS. 2 and 7 and the switching circuit has the configuration shown in FIG. 3, but the configuration is not limited to these circuit configurations. Instead, it is sufficient if they have the same function.

Further, in this embodiment, the external power supply voltage Vcc
Although (ext) = 3.3V has been described, the external power supply voltage Vcc (ext) = 3.0V may be used, or the value of the external power supply voltage Vcc (ext) may be less than that. . At this time, the value of VI is the external power supply voltage Vc.
Of course, it is set according to the value of c (ext).

[Brief description of drawings]

FIG. 1 is a block diagram of an internal step-down circuit according to a semiconductor device of a first example of the present invention.

FIG. 2 is a circuit diagram showing an example of a power supply voltage detection circuit in FIG.

FIG. 3 is a circuit diagram showing an example of a switching circuit in FIG.

FIG. 4 is a characteristic diagram showing Vcc (ext) dependency of a voltage change appearing at an input node or a node in the power supply voltage detection circuit of FIG. 1.

5 is a characteristic diagram showing Vcc (ext) dependence of a voltage change at an output node in the switching circuit of FIG.

FIG. 6 is a characteristic diagram showing how a voltage waveform appears at an output node when the internal circuit is switched in the semiconductor device having the internal voltage down converter of FIG. 1.

FIG. 7 is a circuit diagram showing an example of a power supply voltage circuit that realizes an internal voltage down converter according to a second embodiment of the present invention.

FIG. 8 is a block diagram showing an internal voltage down converter according to a conventional technique.

FIG. 9 is a characteristic diagram showing external power supply voltage dependency in an internal voltage down converter according to a conventional technique.

FIG. 10 is a characteristic diagram showing a state of voltage change at a node when an internal circuit of a semiconductor device having an internal step-down circuit according to a conventional technique is switched.

[Explanation of symbols]

K step-down circuit M external power supply voltage detection circuit L switching circuit K1 voltage waveform at any two nodes of the internal circuit that best shows the switching state K2 waveform that shows the switching state of the internal circuit 1 external power supply terminal 2 internal circuit Power line 3 Internal circuit 5 Decoder circuit 6 Sense amplifier circuit 7 Control circuit

Claims (3)

[Claims] 1. A step-down circuit having an input connected to an external power supply terminal and converting to an internal power supply voltage lower than an external power supply voltage applied from the external power supply terminal for output, and an input connected to the external power supply terminal. , If the external power supply voltage is higher than the set circuit threshold value, a logic 1 is output.
Or a logic 0, and a power supply voltage detection circuit that outputs a logic 0 or a logic 1 in the case of a low level, a first input end, a second input end, a control end, and an output end, and the first The external power supply terminal is connected to the input end, the output of the step-down circuit is connected to the second input end, the output of the power supply voltage detection circuit is connected to the control end, and the output end is the power supply of the internal circuit. A switching circuit connected to a line and functioning so that either the output voltage of the step-down circuit or the external power supply voltage is applied to the output end by a logic value signal applied to the control end. Characteristic semiconductor device. 2. The semiconductor device according to claim 1, wherein the power supply voltage detection circuit has a determination voltage value for determining the magnitude of the external power supply voltage set between 3.3V and 5.0V. 3. The semiconductor device according to claim 1, wherein the power supply voltage detection circuit is set such that the value of the determination voltage for determining the magnitude of the external power supply voltage is set between 2V and 3V.