JPH06149321A - Sequence program execution system - Google Patents

Abstract

PURPOSE:To easily read and write the specific data by the optional timing in a sequence program execution system that is carried out by a programmable controller PC. CONSTITUTION:A reading function instruction 32 is inserted to a place of the timing when the tool data are rewritten for exchange of tools. Then the instruction 32 is read, the tool data on a designated file name are read out of an IC card serving as an external storage and stored in a designated address of a RAM. Meanwhile a writing function instruction 42 is inserted to a place of the necessary timing when the debugging is desired for a specific machine and its related machine out of many machines. When the instruction 42 is read, the state of the debugging data designated in a writing address column 32c at that relevant point of time is written into the IC card from the RAM.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a PC (programmable
The present invention relates to an execution method of a sequence program by a controller, and particularly to an execution method of a sequence program using an external storage device.

[0002]

2. Description of the Related Art In recent years, in a PC connected to a numerical control device, an external storage device such as an IC memory card or a magnetic disk device is connected, and for example, tool data stored therein is supplied to the PC side, or The execution data of the sequence program is stored and saved for debugging.

[0003]

However, the conventional PC cannot read / write data at arbitrary timing. For this reason, when updating static data such as tool data, it is necessary to interrupt the operation and have a person operate to read new data from the external storage device into the PC. Therefore, it took a lot of time and effort.

Further, in the case of dynamically storing data such as execution data for debugging, it is necessary to store the entire signal data even when debugging some signals. Therefore, a large memory capacity inside the PC is required.

On the other hand, in order to be able to store data at such arbitrary timing by the instruction of the conventional sequence program, it is necessary to add a complicated program and a large memory capacity is required.

Further, it is conceivable that a means for reading and writing data at such an arbitrary timing by communication with a host computer or the like can be considered, but for that purpose, an operation and a device of the kind required for communication are required.

The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide a sequence program execution method capable of easily reading and writing specific data at an arbitrary timing.

[0008]

According to the present invention, in order to solve the above problems, a PC (programmable controller) is used.
In the execution method of a sequence program according to the above, a function command included in the sequence program for instructing writing or reading of specific data, an external storage unit connected to the PC for storing the specific data, and the sequence A sequence comprising: a functional instruction executing means for reading or writing the specific data to or from the external storage means according to the content of the functional instruction when the functional instruction is read during execution of the program. A program execution method is provided.

[0009]

When the functional instruction is read during execution of the sequence program, the functional instruction executing means writes or reads the specific data in the external storage means according to the content of the functional instruction.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 2 is a block diagram of hardware of a PC (programmable controller) for implementing the present invention. The CPU 11 is a processor that controls the entire PC (programmable controller) 10. Input circuit 1
2 receives a signal from the outside, converts the signal level and transfers it to the bus. The output circuit 13 outputs the output signal from the bus 14 to the outside.

The ROM 15 stores a management program 15a for managing the overall operation of the PC 10 and a ladder program 15b which is a kind of sequence program created in a ladder format for controlling a machine tool or the like. This sequence program may be written in a high-level language such as C language or Pascal.

The RAM 16 stores input data and output data from the machine that change during execution of the sequence program. The data stored in the RAM 16 is not only input data and output data to and from the machine, but also tool data 16a and debug data 16b that are read from and written to the IC card 22 at arbitrary timings.

Further, the bus 14 has an interface 17
The program creation device 20 is connected via the. The program creating device 20 is a device for creating or debugging the ladder program 15b, and has a liquid crystal display device 20a and a keyboard 20b.

Further, the bus 14 has an interface 1
The adapter 21 is connected via 8. The IC card 22 storing the tool data 16a is inserted into the adapter 21. The tool data 16a read from the IC card 22 is stored in the RAM 16.

Further, debug data 16b in the RAM 16 is written in the IC card 22. IC card 22
The debug data 16b written in the
The program creation device 2 via the interface 18, the bus 14, and the interface 17 while being inserted into the
0 and is displayed on the display device 20a. The debug data 16b can also be displayed on another display device such as a personal computer through an adapter.

Next, a concrete example of the execution method of the sequence program of this embodiment will be shown. 1A and 1B are diagrams showing a functional instruction by a ladder program, FIG. 1A is a diagram showing a functional instruction for a read command, and FIG. 1B is a diagram showing a functional instruction for a write command. First, in FIG. 1 (A), the contact (A
When the CT) 31 is turned on, the read function instruction 32 is executed.

The read function command 32 includes an MREAD column 32a indicating a read command and a file name column 32b indicating a file name of a file to be read on the IC card 22.
And a read address column 32c indicating a read address to be stored in the RAM 16.

The read function instruction 32 is inserted, for example, at the timing of rewriting the tool data 16a for tool replacement. When the processor 11 reads the read function instruction 32, the processor 11 reads the tool data 16a with the specified file name from the IC card 22 and stores it in the specified address of the RAM 16. When this operation ends, the processor 11 turns on the coil 33.

As a result, the entire work is interrupted, and the labor and time for rewriting the tool data 16a by the operation of the operator is eliminated. Next, in FIG. 1B, when the contact (ACT) 41 is turned on, the write function command 42
Is executed.

The write function command 42 includes an MWRITE column 42a indicating a write command, a file name column 42b for giving a file name to data to be written, a write address for designating a start address and a width of the address on the RAM 16 of the data to be written. It is composed of a column 42c.

The write function command 42 is inserted at a necessary timing place, for example, when it is desired to debug a specific machine and a machine related to the machine among a large number of machine points. Upon reading the write function instruction 42, the processor 11 writes the state of the debug data 16b specified in the write address column 42c at this point in time from the RAM 16 to the IC card 22.

On the IC card 22, the file name column 42
This debug data 16b is stored together with the file name designated by b. When this operation is completed, the processor 11 turns on the coil 43.

The operator can confirm the debug data 16b stored in the IC card 22 on the display device 20a of the program creating device 20 or the display device of another microcomputer.

FIG. 3 is a diagram showing a display example of the debug data 16b. A file name column 51 and a data display column 52 are displayed on the screen of the display device 20a. Here, the file name of the debug data 16b is debugF1, the leading byte address is X0, and the byte address width is 12.
Assume that 8 is specified.

For example, when the operator wants to know the state of the signal 53 of the bit address X1.1, the byte address X0 including the signals 54 and 55 related to it.
By specifying ~ X127, these can be easily confirmed on the same screen.

As described above, by writing only the data related to the signal that the operator wants to confirm from a large number of machine points into individual files, the memory capacity can be reduced and the confirmation on the screen can be facilitated. Become.

In this embodiment, the IC card is shown as the external storage device, but a hard disk, floppy disk or the like may be used. Further, in the present embodiment, an example of a stand-alone PC is shown, but a PC incorporated in the numerical controller may be used. In this case, the debug data can be displayed on the display device integrated with the numerical controller.

[0028]

As described above, according to the present invention, when a functional instruction is read during execution of a sequence program, writing or reading of specific data to / from external storage means is executed according to the content of the functional instruction. Therefore, it is possible to easily read or write the specific data at an arbitrary timing only by inserting the functional instruction at a desired position in the sequence program.

[Brief description of drawings]

FIG. 1 is a diagram showing a functional instruction by a ladder program, FIG. 1A is a diagram showing a functional instruction for a read command,
(B) is a diagram showing a functional command for a write command.

FIG. 2 is a block diagram of hardware of a PC (programmable controller) for implementing the present invention.

FIG. 3 is a diagram showing a display example of debug data.

[Explanation of symbols]

 10 PC (Programmable Controller) 11 Processor (CPU) 12 Input Circuit 13 Output Circuit 14 Bus 15 ROM 15b Ladder Program 16 RAM 16a Tool Data 16b Debug Data 20 Program Creation Device 22 IC Card 32 Read Function Command 42 Write Function Command

Claims (2)

[Claims] 1. A PC (programmable controller)
In the execution method of the sequence program according to the above, a function command included in the sequence program for instructing writing or reading of specific data; an external storage unit connected to the PC for storing the specific data; A sequence comprising: a functional instruction executing unit that, when the functional instruction is read during execution of a program, writes or reads the specific data to or from the external storage unit according to the content of the functional instruction. Program execution method. 2. The sequence program execution method according to claim 1, wherein the external storage means is an IC card.