JPH0614713B2 - AFC circuit - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an AFC (automatic frequency control) circuit that can be used in a satellite broadcast receiver or the like.

2. Description of the Related Art In a receiver having a frequency synthesizer system tuning circuit, the frequency accuracy of the local oscillator is equal to the accuracy of the reference oscillator of the frequency synthesizer circuit, and a crystal oscillator is usually used as the reference oscillator. If the frequency accuracy of 1 is good, the frequency accuracy of the intermediate frequency signal is sufficiently high and the AFC circuit is unnecessary. However, in the satellite broadcast receiving system, after the frequency conversion of the received signal in the microwave band to the first intermediate frequency signal in the outdoor down converter, it is guided indoors by a cable, and the first intermediate frequency signal is received by the indoor receiver. In the second frequency conversion in
It is common to obtain an intermediate frequency signal. Frequency conversion to the second intermediate frequency signal is usually performed for channel selection, and only the signal of the desired channel is selected. In such a tuning system configuration, no matter how high the frequency accuracy of the local oscillator for tuning the indoor receiver can be achieved by the frequency synthesizer method, etc., if the frequency accuracy of the local oscillator of the outdoor down converter is not so good, the second intermediate frequency The frequency accuracy of does not improve. In fact, the oscillation frequency of the local oscillator of an outdoor down converter generally has a temperature drift of several MHz. On the other hand, the frequency accuracy of the second intermediate frequency should be within several hundreds KHz at worst, and even if the tuning circuit of the receiver has a frequency synthesizer system, the AFC is used to keep the frequency accuracy of the second intermediate frequency high. Circuits are essential.

AFC to the frequency synthesizer system tuning circuit as described above
A conventional example having a circuit is disclosed in Japanese Patent Laid-Open No. 55-23674. FIG. 5 is a block diagram showing the configuration of this conventional example. A conventional example will be described below with reference to the drawings.

In FIG. 5, 1 is a received signal input terminal, 2 is a high frequency amplifier, 3 is a frequency mixer, 4 is a voltage controlled local oscillator, 5 is a PLL synthesizer section, 6 is an intermediate frequency amplifier,
Reference numeral 7 is an FM demodulator, 8 is a demodulation signal output terminal of the FM demodulator 7, 9 is a low-pass filter, and 10 is an intermediate frequency shift detector.

FIG. 6 is a block diagram of the frequency shift detector 10. The demodulated output of the FM demodulator 7 is smoothed by a low pass filter (hereinafter referred to as LPF) 9 to extract a DC voltage component from the demodulated signal, and then a voltage is obtained. The comparators 10a and 10b compare with the constant threshold voltages V _r1 and V _r2 . When the DC voltage component is extracted from the demodulated output of the FM signal through the LPF 9, the average voltage value of the demodulated signal is obtained, which corresponds to the average frequency of the FM signal. Therefore, by configuring as shown in FIG. 6 and comparing the preset threshold voltages V _r1 and V _r2 with the average voltage value of the demodulation output, the deviation from the center frequency of the intermediate frequency signal falls within a predetermined range. It is possible to detect whether or not it is within the range and whether it is higher or lower than the center frequency if the deviation is outside the predetermined range. This is the sixth
This can be understood by examining the output terminals 10e and 10f in the figure.
These outputs are input to the PLL synthesizer unit 5 and the oscillation frequency of the local oscillator 4 is finely adjusted so that the intermediate frequency is controlled to be smaller than the center frequency if the intermediate frequency is deviated.

However, in the above-mentioned configuration, the frequency reference of the AFC circuit is the FM demodulator 7 itself, and the FM demodulator used for a satellite broadcast receiver or the like usually has a high frequency and wide band signal. Therefore, the temperature stability of its input frequency vs. output voltage is not very good. Therefore, it is difficult to realize an AFC circuit having high frequency accuracy. Especially when the signal to be demodulated is a video signal requiring high linearity, it is important to prevent amplitude and phase distortion from occurring when passing through the intermediate frequency band pass filter due to the shift of the intermediate frequency. is there.

An object of the present invention is to enable the intermediate frequency to be kept constant with high accuracy by an AFC circuit with high frequency accuracy.

Means for Solving the Problems To achieve this object, the AFC circuit of the present invention uses a reference signal having high frequency accuracy as a frequency reference, divides an intermediate frequency signal into two, and divides them by a predetermined frequency division. When the center frequency of the intermediate frequency signal is slightly higher than the normal intermediate frequency, one of the frequency divider output frequencies matches the reference signal frequency, and when the center frequency of the intermediate frequency signal is slightly lower, the other frequency divider The frequency division ratio and the reference signal frequency are set so that the frequency divider output frequency matches the reference signal frequency, and the reference signal is set to 2 in order to frequency compare each frequency-divided intermediate frequency signal with the reference signal. The frequency-divided intermediate frequency signal and the reference signal are frequency-compared by respective frequency comparators, and their outputs are respectively fed through the respective integrators to the reference signal of the intermediate frequency signal. frequency Obtaining the comparison signal, it is detected whether the frequency error of the intermediate frequency signal with respect to the regular intermediate frequency is more than a predetermined value, and if it is more than the predetermined value, it is detected whether the frequency is high or low, and these frequencies are detected. In the synthesizer circuit of the tuning voltage using the comparison signal, the frequency control voltage of the voltage controlled local oscillator is finely adjusted to obtain the AFC function.

Operation According to the present invention, the intermediate frequency signal is divided into two by the above-described configuration, frequency-divided by the frequency divider having two different frequency division ratios, and then frequency-compared with the reference signal. The reference frequency
_s , the normal intermediate frequency is _o The detection limits of the higher and lower frequency deviation of the center frequency of the intermediate frequency signal, respectively
_H and _L , and the division ratios are N _H and N _L , respectively,
Set them to have the following relationships: _H = N _H · _s (1) _L = N _L · _s (2) _L < _o < _H (3) That is, when the center frequency of the intermediate frequency signal is higher than the detection limit _{H, the} minute A frequency divider output frequency having a frequency ratio N _H is _{H 2} / N
Since it becomes higher than _H , it becomes higher than the reference signal frequency _s from the equation (1), and it is possible to detect that the center frequency of the intermediate frequency signal is higher than the detection limit _H by the frequency comparator using these as inputs. Because when the center frequency of the intermediate frequency signal is lower than the detection limit _L has divider output frequency having a frequency division ratio N _L is lower than _{L /} N _L in the same manner as (2) than the reference signal frequency _s from the equation The center frequency of the intermediate frequency signal is detected by the frequency comparator using these as input.
_It can be detected that it is lower than _L.

A phase frequency comparator using a digital circuit can be used as the frequency comparator, but when the intermediate frequency signal to be handled is a wide band FM signal such as a satellite broadcast signal,
Since the FM modulation index is considerably large, the frequency division ratios N _L , N _H
Must be made sufficiently large to lower the FM modulation index so that the frequency comparator does not malfunction due to modulation.

The output signal of the frequency comparator can be used as a frequency comparison signal because the AC component contained in it can be removed by extracting it through a simple integration circuit.One of the frequency comparison signals can detect the frequency deviation of the center frequency of the intermediate frequency. When the limit is _H , the other changes the output logical value when it is the detection limit _L. Therefore, by using these in combination, when the center frequency of the intermediate frequency signal is < _L , _L <<
It can be determined in the case when _H and _{H <a.} Therefore, whether or not the frequency control voltage of the voltage-controlled local oscillator should be finely adjusted in the synthesizer circuit of the tuning voltage using these frequency comparison signals, and if it is finely adjusted, the direction can be determined.

Embodiment One embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of an AFC circuit according to an embodiment of the present invention.

In FIG. 1, the received signal is input to the input terminal 1, passes through the high frequency amplifier 2, the frequency mixer 3, and the intermediate frequency amplifier 6 and is input to the FM demodulator 7, and a demodulated output is obtained at the output terminal 8. The oscillation frequency of the voltage-controlled local oscillator 4 is controlled by the synthesizer circuit 5 which emits the control voltage. The synthesizer circuit 5 for generating the control voltage can be based on the PLL frequency synthesizer system as in FIG. 5 of the conventional example, or the voltage synthesizer system using a D / A converter or the like is also possible.

The intermediate frequency signal passes through frequency dividers 9 and 10 having frequency division ratios of N _H and N _L , respectively, and then frequency comparators 12 and 13 respectively.
Entered in. The output signals of the reference signal oscillator 11 having a frequency of _s are input to the other inputs of the frequency comparators 12 and 13. As the reference signal oscillator 11, a crystal oscillation output with high frequency accuracy may be divided and used. As the frequency comparators 12 and 13, digital type phase / frequency comparators as shown in FIG. 3 can be used. The relationship between the phase difference (frequency difference) between the inputs and the output is as shown in FIG. If the center frequency of the divided intermediate frequency signal is higher than the reference frequency, the output of the phase / frequency comparator becomes high level (hereinafter referred to as "H"), and if it is low, the output becomes low level (hereinafter referred to as "low level"). "L"), so LPF1
The relationship between the respective frequency comparison signals extracted from Nos. 4 and 15 and the intermediate frequency can be expressed as shown in FIGS. 4 (a) and 4 (b).
That is, it is necessary to determine _s , N _H , and N _{L so} that the following equation holds when the normal intermediate frequency is _o . _s × _NL < _o < _s × N _{H As} can be seen from FIG. 4, if the first frequency comparison signal output from the LPF 14 is “H”, the center frequency of the intermediate frequency signal is equal to or more than a predetermined error. Since it is higher than the intermediate frequency, it is necessary to finely adjust the control voltage of the local oscillator 4 in the synthesizer circuit 5 so as to compensate for it. Similarly, the second frequency comparison signal output from the LPF 15 is "L".
If so, the center frequency of the intermediate frequency signal is lower than the normal intermediate frequency by a predetermined error or more, so the synthesizer circuit 5
It is necessary to make up for this in. Further, when the first frequency comparison signal is "L" and the second frequency comparison signal is "H", the frequency error is less than a predetermined value, so it is not necessary to finely adjust the local oscillation frequency. AF in satellite receivers
Since the frequency accuracy of C needs to be about ± 300 KHz or less, _s × _NH − _o and _o − _s × _NL are set to ± 300 KHz.
You can choose less than this.

For example, if _o = 510 MHz and _s = 10 kHz, then N _H
= 51030 and N _L = 50970, the above conditions are satisfied.

As described above, according to the present invention, the center frequency of the intermediate frequency signal is normalized by dividing the intermediate frequency signal by two frequency dividers having different frequency division ratios and comparing the frequency with the high precision reference signal. It is possible to detect it with high accuracy when it changes more than a predetermined error from the intermediate frequency of, and its stability depends on the reference signal, so it is possible to use a highly stable and highly accurate one such as a crystal oscillator as the reference signal. AFC with frequency accuracy
Circuit can be realized

[Brief description of drawings]

FIG. 1 is a block diagram of an AFC circuit in one embodiment of the present invention, FIG. 2 is an input / output characteristic diagram of a phase / frequency detector, and FIG. 3 is a digital type phase / frequency comparator in this embodiment. A circuit block diagram showing the configuration, FIGS. 4 (a) and 4 (b) are output characteristic diagrams of the frequency comparison signal in the present embodiment, and FIG.
FIG. 6 is a block diagram of an AFC circuit in a conventional example, and FIG. 6 is a circuit block diagram showing a configuration of a frequency shift detector in the conventional example. 9, 10 ... Frequency divider, 11 ... Reference signal oscillator, 12,
13 ... Frequency comparator, 14, 15 ... LPF.

Claims (1)

[Claims] 1. A first frequency comparator for inputting a signal obtained by frequency-dividing an intermediate frequency signal by a first frequency divider having a predetermined frequency division ratio and a reference signal, and an output of the first frequency comparator. A first integrator for integrating the signal to obtain a first frequency comparison signal for the reference signal of the intermediate frequency signal, and a signal obtained by dividing the intermediate frequency signal by a second frequency divider having a predetermined frequency division ratio. And a second frequency comparator for inputting the reference signal, and a second integrator for integrating the output signal of the second frequency comparator to obtain a second frequency comparison signal with respect to the reference signal of the intermediate frequency signal. Equipped with
The frequency division ratios of the first and second frequency dividers and the reference signal frequency are
When the center frequency of the intermediate frequency signal is slightly higher than the normal intermediate frequency, the first frequency divider output frequency matches the reference signal frequency, and when it is slightly lower, the second frequency divider output frequency becomes the reference signal frequency. The AFC circuit is set so that the frequency control voltage in the synthesizer circuit of the tuning voltage for performing frequency control of the voltage controlled local oscillator is finely adjusted by using at least the two frequency comparison signals. .