JPH06141538A - Voltage inverter circuit fitted with high-efficiency driver - Google Patents

Abstract

PURPOSE:To suppress power consumption due to the loss of gate capacity storage charges and increase power inverter efficiency of a voltage inverter circuit by connecting the grounding side of a predriver in the voltage inverter circuit to the input power source, not to the ground potential, thus converting the circuit into a power recovery circuit. CONSTITUTION:Gate elements 10 and 11 (group No. 1) are connected in series to an input power source line 1 and grounding line 3 in No. 1 booster circuit 19, and gate elements 8 and 9 (group No. 2) are connected in series to the input power source line 1 and a power source output line 14. A voltage booster capacitor 12 is connected to the gate elements 10 and 11 (group No. 1), and between the gate elements 8 and 9 (group No. 2). An output capacitor 13 is connected to a power source output line 14 and grounding line 3. The gate elements 8, 9, 10, and 11 are controlled through a control circuit 16 according to a clock signal 18. Pre-drivers 4 and 5 control the gate elements 8 and 9, being connected so that they operate between the output line 2 and input power source line 1 of No. 2 booster circuit 17.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a voltage conversion circuit used as a power supply circuit, and more particularly to a voltage conversion circuit having a high efficiency driver capable of driving a gate element with relatively low power consumption.

[0002]

2. Description of the Related Art Electronic devices,
In particular, many power circuits used in consumer appliances use batteries as a power supply source. The voltage supplied by the battery and the voltage required in the electronic device do not necessarily match, so there is a need to convert the supply voltage, that is, boost the voltage and supply it to the electronic device. As such a booster circuit, a booster circuit called an up converter has been conventionally used. In order to satisfy the low loss performance required for the power supply circuit, a pre-driver for supplying a voltage higher than the output voltage is prepared inside the up-converter in order to increase the gate voltage of the NMOS transistor and lower the ON resistance value.

However, in the NMOS transistor, the amount of charges accumulated in the gate at the time of turn-on and discharged to the ground side at the time of turn-off and lost increases as the gate voltage increases. Therefore, the power consumption in the pre-driver circuit increases as the voltage increases, and as a result, the overall power conversion efficiency deteriorates.

Therefore, an object of the present invention is to improve the conventional problems and to provide a voltage conversion circuit which can satisfy the low loss performance without increasing the power consumption in the circuit.

[0005]

In order to achieve the above object, the voltage conversion circuit according to the present invention is conventionally operated by connecting the ground side of the pre-driver to an input power source to form a power recovery path. It is characterized by suppressing the power consumption due to the current flowing to the ground side and improving the overall power conversion efficiency.

[0006]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a voltage conversion circuit 20 according to an embodiment of the present invention. Although the conventional pre-driver is connected between the output power supply line 2 of the booster circuit 17 and the ground potential, the pre-drivers 4 and 5 of the present invention are connected to the booster circuit 17.
The output power supply line 2 and the input power supply line 1 are connected to operate. The pre-drivers 4, 5 are also connected to control the gates of the NMOS transistors 8, 9. The control signal from the control circuit 16 is N
The gates of the MOS transistors 10 and 11 and the pre-drivers 4 and 5 are connected. A capacitor 1 is provided at the connection point between the NMOS transistor 8 and the NMOS transistor 9.
The positive electrode of 2 is connected to the NMOS transistor 10 and N
The negative electrode of the capacitor 12 is connected to the connection point with the MOS transistor 11. NMOS transistor 9 and NMO
The input power supply line 1 is connected to the connection point with the S transistor 10. The source of the NMOS transistor 11 is ground 3, and the drain of the NMOS transistor 8 is the capacitor 1.
3 is connected to the positive electrode and the output power supply line 14. A clock 18 is connected to the control circuit 16 to turn on / off the NMOS transistors 8-11.

When the NMOS transistors 8 and 9 are turned off, their gate voltage is not the ground potential but the input power supply voltage. Therefore, the charge accumulated in the gate capacitance is not lost to the ground side and passes through the input power supply line 1. Can be collected.

FIG. 2 shows another embodiment for obtaining a high efficiency driver. The pre-drivers 4, 5 and 6 are connected to the output power line 2 of the booster circuit 17 and the NMOS transistors 8 and 9, respectively.
Operatively connected to 10 sources. NM
The positive electrode of the capacitor 12 is connected to the connection point between the OS transistor 8 and the NMOS transistor 9, and the negative electrode of the capacitor 12 is connected to the connection point between the NMOS transistor 10 and the NMOS transistor 11. Since the transistors 8 and 10 are connected in this manner, the gate and the source are short-circuited when the transistors 8 and 10 are turned off, so that there is an effect that parasitic oscillation on the source side, which conventionally occurs at the time of turn-off, can be prevented.

The input power supply line 1 is connected to a connection point between the NMOS transistor 9 and the NMOS transistor 10. The source of the NMOS transistor 11 is ground 3, NM
The drain of the OS transistor 8 is connected to the positive electrode of the capacitor 13 and the output power supply line 14.

The control circuit 16 turns on / off the NMOS transistors 8 to 11 according to the clock signal 18. The NMOS transistors 8 and 9 are turned off when their gates are connected to their sources, and at the same time, the charges accumulated in the gate capacitances of the NMOS transistors 8 and 9 are recovered through the input power supply line 1 without being lost to the ground side.

As described above, according to the embodiment of the present invention, the charges accumulated in the gate capacitances of the NMOS transistors 8 and 9 can be recovered, and the power consumption in the pre-driver circuit can be increased. Without it, the low loss performance of the power supply circuit can be satisfied.

[Brief description of drawings]

FIG. 1 is a schematic diagram of a voltage conversion circuit according to an embodiment of the present invention.

FIG. 2 is a schematic diagram of a voltage conversion circuit according to another embodiment of the present invention.

[Explanation of symbols]

 1 Input Power Supply Line 2 Output Line of Second Booster Circuit 3 Ground Line 4-7 Pre-driver 8-11 NMOS Transistor 12-13 Capacitor 14 Power Supply Output Line 16 Control Circuit 17 Booster Circuit 18 Clock

Claims (2)

[Claims] 1. A first booster circuit (1) for boosting a power supply voltage to several times and outputting the same in synchronization with a clock signal (18).
9), and a second voltage which is higher than the output voltage (14) of the first booster circuit and is supplied to the first booster circuit.
A voltage conversion circuit (20) comprising a booster circuit (17), wherein: a first booster circuit (19) of a first group connected in series between a power supply voltage (1) and a ground potential (3). Two gate elements (10, 11), two gate elements (8, 9) of the second group connected in series between the power supply voltage (1) and the output voltage (4), and the gate of the first group A voltage boosting capacitor (12) connected between the elements and between the gate elements of the second group, and an output capacitor connected between the output voltage (14) and the ground potential (3). (13) and the gate elements (8, 9, 10,
11) is connected so as to operate between a control circuit (16) for controlling the output voltage (2) of the second boosting circuit and a power supply voltage (1), and the control circuit (16) controls the first voltage depending on the control circuit (16). A voltage conversion circuit (20) having a high-efficiency driver, characterized in that it comprises a driver (4, 5) for driving two groups of gate elements (8, 9). 2. A first booster circuit (1) for boosting a power supply voltage to several times and outputting the same in synchronization with a clock signal (18).
9), and a second voltage which is higher than the output voltage (14) of the first booster circuit and is supplied to the first booster circuit.
A voltage conversion circuit (20) comprising a booster circuit (17), wherein: a first booster circuit (19) of a first group connected in series between a power supply voltage (1) and a ground potential (3). Two gate elements (10, 11), two gate elements (8, 9) of the second group connected in series between the power supply voltage (1) and the output voltage (4), and the gate of the first group A voltage boosting capacitor (12) connected between the elements and between the second group gate elements, and an output capacitor connected between the output voltage (14) and the ground potential (3). (13) and all the gate elements (8,
9) is connected to operate between a control circuit (16) for controlling the output voltage (2) of the second booster circuit and a power supply voltage (1). A driver (5) for driving a gate element (9) on the power supply side of the second group, and a driver (5) connected to operate between the output voltage (2) of the second booster circuit and the voltage between the gate elements of the second group. A driver (4) for driving the output side gate element (8) of the second group according to a control circuit (16), and a voltage conversion circuit having a high efficiency driver ( 20).