JPH06132970A - Transmission quality monitoring system - Google Patents

Abstract

PURPOSE:To suppress the increase of traffic caused by insertion of a monitoring use cell at the time of the normal state and at the same time to secure the monitoring ability at the time of the deterioration state. CONSTITUTION:A 1st BIP computing part 111 calculates the bit interleave parities at every virtual path or channel and for every certain number of cells and outputs the calculated parities as the 1st computing results. A monitoring cell inserting part 115 inserts the monitoring cell storing the 1st computing results in the pay load into a transmission line. A monitoring use cell extracting part 118 extracts the monitoring cell out of the transmission line. Then a 2nd BIP computing part 117 calculates the bit interleave parities every certain number of cells of the correspondent virtual path or virtual channel that is sandwiched between the extracted monitoring cells and outputs the calculated parities at the 2nd computing results. Then a computing result comparing part 119 compares the 1st computing result with the 2nd one to monitor the bit error ratio and to vary a certain number of cells at every virtual path or channel.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transmission quality monitoring system, and more particularly to a transmission quality monitoring system for in-service monitoring of bit error rate, cell discard rate and cell misdelivery rate for each virtual path and virtual channel in an ATM device. Regarding

[0002]

2. Description of the Related Art A conventional transmission quality monitoring system inserts a monitoring cell into a virtual path (called a block) for each virtual pulse (virtual channel), and uses this monitoring cell to perform bit interleaving for each block. The parity bit (BIP) is transferred, and the bit interleaved parity bit in this monitoring cell and the cell of each block actually received at the intermediate point / opposite terminal point of the virtual path (virtual channel) and the maintenance section end point. The bit error rate was calculated by comparing the bit interleaved parity bits of.

[0003]

In this conventional transmission quality monitoring system, if the block length, that is, the number of monitoring cells is increased, the number of monitoring cells to be inserted can be reduced and the rate of increase in traffic can be suppressed. Ability decreases.
Further, if the block length is reduced, the monitoring capability is improved, but the number of monitoring cells to be inserted is increased, so that there is a problem that the traffic increase rate is large.

[0004]

The transmission quality monitoring system of the present invention is a first BIP operation for calculating a bit interleaved parity for each constant number of cells for each virtual pulse or virtual channel and outputting the result as a first operation result. A monitoring cell insertion unit that inserts a monitoring cell containing the first operation result in a payload into a transmission line, and a monitoring cell extraction unit that extracts the monitoring cell from the transmission line,
A second BIP calculating unit for calculating a bit interleaved parity for each constant number of cells of the virtual path or virtual channel sandwiched between the extracted monitoring cells and outputting the result as a second calculation result; and the second BIP. BIP for comparing the second calculation result obtained by the calculation unit with the first calculation result accommodated in the extracted monitoring cell
It has an operation result comparison unit, an error count unit that counts the number of bits in which a mismatch occurs due to the comparison, and a microprocessor that monitors the bit error rate based on the counted value.

[0005]

The present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of one embodiment of the present invention, and FIG. 2 is a diagram showing a monitoring cell insertion interval of this embodiment.

On the insertion side of FIG. 1, the cell number counter 1
13 counts the number of cells for each virtual path (virtual channel) flowing through the transmission path 116. The cell number setting unit 114 has a virtual path (virtual channel) in advance.
A certain number of cells is set for each, and the cell number counter 11
When the value of 3 matches the value of the cell number setting unit 114, the monitoring cell assembling unit 112 generates a monitoring cell, and the monitoring cell inserting unit 115 inserts the monitoring cell into the transmission line 116. The first BIP calculation unit 111 is reset each time a monitoring cell is sent, and calculates the bit interleave parity of each cell for each virtual path (virtual channel) between reset and reset. When the monitoring cell is transmitted, the BIP calculation result up to that time is placed in the payload of the monitoring cell and transferred.

On the detection side, the second BIP computing section 117 computes bit interleaved parity for each virtual path (virtual channel) flowing on the transmission path 121, and the monitoring cell extracting section 118 computes on the transmission path 121. The flowing monitoring cell is extracted, and the BIP operation result comparison unit 11
In 9, every time the monitoring cell is extracted, the BIP calculation result transferred in the monitoring cell is compared with the calculation result calculated by the second BIP calculation section 117. The error count unit 120 counts the number of bits in which the BIP operation result comparison unit 119 causes a mismatch. Microprocessor 1
2 calculates the bit error rate for each virtual path based on this count value, and the OpS
(Operation Center) 123 is notified. The OpS 123 collects information from various transmission paths, and regarding a virtual path (virtual channel) in which the bit error rate has deteriorated, the number of cells of the cell number setting unit 114 is set to a small number via the microprocessor 122 according to an instruction from the OpS 123. fix.

In the cell array 151 on the transmission line of FIG.
1 and VP12 virtual paths are multiplexed. V
In the P11 monitoring cells 152, VP11 cells 153 are inserted every four cells. On the other hand, the monitor cell 155 for VP12
VP12 cells 154 are inserted every 5 cells.

In this way, the minimum required bit error rate is usually set to a measurable block length, and the traffic increase rate is kept low. When the error rate deteriorates, the block length of a specific virtual path (virtual channel) can be shortened to improve the bit error rate monitoring capability.

[0010]

As described above, according to the present invention, when the bit error rate is not deteriorated, the monitoring block length is increased to suppress the traffic increase due to the insertion of the monitoring cell, and at the time of the deterioration of the bit error rate. By shortening the monitoring block length of a specific virtual path (virtual channel), it is possible to suppress the traffic increase due to the insertion of the monitoring cell and to secure the monitoring capability.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a diagram showing a monitoring cell insertion interval according to the present embodiment.

[Explanation of symbols]

 111 1st BIP operation part 112 Monitoring cell assembly part 113 Cell number counter 114 Cell number setting part 115 Monitoring cell insertion part 116 Transmission line 117 2nd BIP operation part 118 Monitoring cell extraction part 119 BIP operation result comparison part 120 Error Count Unit 121 Transmission Line 122 Microprocessor 123 OpS 151 Transmission Line Cell Sequence 152 VP11 Monitoring Cell 153 VP11 Cell 154 VP12 Cell 155 VP12 Monitoring Cell

Front Page Continuation (72) Inventor Hiromi Ueda 1-6, Uchisaiwaicho, Chiyoda-ku, Tokyo Nippon Telegraph and Telephone Corporation (72) Inventor Hiroshi Ota 1-6, Uchiyuki-cho, Chiyoda-ku, Tokyo Nippon Telegraph and Telephone Corporation In the company

Claims (2)

[Claims] 1. A first BIP for calculating a bit interleaved parity for each constant number of cells for each virtual pulse or virtual channel and outputting the result as a first operation result.
An arithmetic unit, a supervisory cell inserting unit that inserts a supervisory cell accommodating the first arithmetic result in a payload into a transmission line, a supervisory cell extracting unit that extracts the supervisory cell from the transmission line, and an extractor A second BIP operation unit that calculates a bit interleaved parity for each fixed number of cells of the relevant virtual path or virtual channel sandwiched between the monitoring cells and outputs the result as a second operation result; and the second BIP.
A BIP operation result comparison unit that compares the second operation result obtained by the operation unit with the first operation result accommodated in the extracted monitoring cell, and the number of bits in which a mismatch occurs due to the comparison And a microprocessor for monitoring the bit error rate based on the counted value. 2. The transmission quality monitoring system according to claim 1, wherein the fixed number of cells is varied for each virtual path or virtual channel.