JPH06131262A - Paging system using plural page tables - Google Patents

Abstract

PURPOSE:To shorten the rewriting time of a page table by altering the contents of the page table by switching plural page tables which are prepared. CONSTITUTION:An operating system OS connects one page table 1 or 2 (3), etc., among page tables 13 to a page directory 12 at the time of initialization. For example, when the page table 1 is connected, a virtual page number N1 is stored in a corresponding entry of the page directory. (When plural page directories 12 are prepared, the head address of one of the page directories is put in a page register 11.) Then the OS switches a previous page table 1 to the prepared page table 2 (3) when requested by itself or application software to rewrite the page table 1. Consequently, the correspondence relation between linear addresses 10 and physical addresses in the page table 13 is altered.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a paging method using a plurality of page tables for speeding up page table rewriting in paging which is one of virtual storage methods.

[0002]

2. Description of the Related Art A virtual storage system is a storage system of a computer.
With respect to the location of information, it is a storage system that separates and separates the address generated by an instruction and the address of the physical location where information actually exists. The address on the instruction side is called a virtual address, and the address on the device side is called a physical address.
There is a paging method as a method for realizing virtual memory. FIG. 2 is an explanatory diagram of an example of a conventional paging method. The illustrated device includes a page register 11, a page directory 22, a page table 21, and a physical memory 2.
It consists of 0 and. These are all semiconductor random
It consists of access memory.

The page directory 22 and the page table 21 are conversion tables for converting the virtual address (linear address) 10 designated by the CPU into a physical address on the physical memory 20. The page register 11 stores the top address of the page directory 22.
The page directory 22 includes a page table 21 in the order of the virtual page number P1 which is the upper part of the linear address 10.
The start address of is stored. This is a virtual page number N. The page table 21 has a virtual page number P1.
There are as many as the maximum value of. Each page table 21
Virtual page number P2, which is the middle part of the linear address 10.
The actual page numbers are stored in this order. These real page numbers are not always stored in the numerical order, but are often stored separately. The size of each page table 21 is, for example, 4 Kbytes, and in that case, real page numbers for 1024 pages are stored.

The physical memory 20 is managed by being divided into pages of a fixed number of bytes. The start address of each page is a real page number, which is stored in the page table 21 as described above. The physical address in each page is equal to the in-page address a, which is the lower part of the linear address 10. Therefore, the physical address on the physical memory 20 is obtained by adding the in-page address a to the real page number obtained from the page directory 22 and the page table 21. As described above, the page directory 22 and the page table 21 have the linear address 1
It defines the correspondence between 0 and the physical address. In order to change the correspondence between the linear address 10 and the physical address, it is necessary to rewrite the page table 21 as necessary. There is also a method of performing address conversion using only the page table 21 without using the page directory 22.

[0005]

However, the above-mentioned conventional technique has the following problems. That is, when the page table 21 is frequently rewritten due to the use of the physical memory 20, the page table rewriting time becomes very long if the number of pages to be rewritten is large. . FIG. 3 is a flowchart illustrating a conventional page replacement procedure.
It is determined whether there is a page replacement request (step S1).
1) When a page replacement request is made, the actual page numbers required for page replacement are rewritten on the page table 21 (step S12). When all pages are replaced, for example, 1024 pages are rewritten. This rewriting time becomes a problem when page-out and page-in do not occur. Here, page-out means to write a page in the physical memory 20 to an auxiliary storage device such as a magnetic disk (not shown). Page-in, on the contrary, refers to reading a page from the auxiliary storage device onto the physical memory 20.

As an example in which page replacement is necessary without page-out or page-in occurring, there is a case where the physical memory originally has a small capacity and the capacity is expanded by emulation. In this case, when the application software (AP) used before expanding the capacity is continuously used, the AP targets only a part of the physical memory 20 as an access target. Therefore, when the application software is executed, if the page containing the data to be accessed is in the extended portion, it must be brought to the original portion. That is, page replacement on the physical memory 20 must be performed. In such a case, if it takes time to rewrite the page table, there is a problem in that the overhead of the OS increases and the processing capacity of the system decreases.

On the other hand, when page-out or page-in occurs, the operation of the magnetic disk device or the like is involved, so the OS overhead does not pose a problem except when the disk cache is used. The present invention has been made in view of the above points, and it is an object of the present invention to provide a paging method using a plurality of page tables that can shorten the time for rewriting the page tables.

[0008]

According to the paging method using a plurality of page tables of the present invention, in the paging method of converting a virtual address designated by a CPU into a physical address by a page table, a real page number for determining a physical position of a page. And a plurality of page tables that respectively store the virtual page numbers that are a part of the virtual address specified by the CPU in association with each other, and the patterns of the real page numbers stored in the plurality of page tables are prepared. Different patterns, when the page replacement request, the page table of the requested pattern is searched from the plurality of page tables, and the searched page table is switched to be used for conversion to the physical address. Is.

[0009]

In the paging method using the multiple page table of the present invention, the virtual page number in the page directory is searched from the virtual page number in the upper part of the linear address designated by the CPU. The virtual page number in this page directory specifies one of a plurality of page tables. The plurality of page tables determine the layout pattern of pages on the physical address. This placement pattern is
The application software, which is predetermined, is executed by the CPU to select a page table having a desired layout pattern. As a result, the contents of the page table are changed without rewriting the page table. The rough layout pattern of the page on the physical address is determined in this way, and the fine part can be handled by rewriting as usual. As a result, the data access can be started almost at the same time that the page on the physical address is brought into the detection range from outside the detection range of the application software.

[0010]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a block diagram of an embodiment of a paging system using a multiple page table according to the present invention. The illustrated apparatus includes a page register 11, a page directory 12, a plurality of page tables 13, and a physical memory 20.
It consists of and. Each of these consists of a semiconductor random access memory. The page directory 12 and the page table 13 are conversion tables for converting a virtual address (linear address) 10 designated by a CPU (not shown) into a physical address on the physical memory 20.
The address conversion may be performed using only the page table 13 without using the page directory 12. The page register 11 stores the top address of the page directory 12.

The page directory 12 stores the top address of one page table among the plurality of page tables 13 in the order of the virtual page number P1 which is the upper part of the linear address 10. This is the virtual page number N
1, N2, etc. There are as many page tables 13 as the maximum value of the virtual page number P1. Each of the plurality of page tables 13 stores real page numbers in the order of the virtual page number P2 which is the middle part of the linear address 10. These real page numbers are not necessarily stored in numerical order, but are stored so that the page layout on the physical address has a predetermined pattern. For example, in the illustrated example, the page table 1 is arranged so as to be continuous pages in the area within the detection range of the AP on the front side on the physical memory 20. Further, the page table 2 is arranged so as to be a continuous page in a region outside the detection range of the AP on the relatively rear side on the physical memory 20. Further, the page table 3 is arranged so as to be a discontinuous page of an area within the detection range of the AP on the physical memory 20 and an area outside the detection range of the AP. The size of each page table 1, 2, 3, etc. is, for example, 4 Kbytes, and in this case, real page numbers for 1024 pages are stored.

The physical memory 20 is managed by being divided into pages of a certain number of bytes. The start address of each page is a real page number, which is stored in the page tables 1, 2, 3, etc. as described above. The physical address in each page is equal to the in-page address a, which is the lower part of the linear address 10. Therefore, the page directory 12
Then, the physical address on the physical memory 20 is obtained by adding the in-page address a to the real page number obtained by any one of the plurality of page tables 13, 1, 2, or 3. Page directory 1
You may make it provide two or more. In this case, a plurality of page directories are switched by rewriting the start address stored in the page register 11. OS
At the time of initialization, one of the plurality of page tables 13 described above is connected to the page directory 12 in advance. For example, when the page table 1 is connected, the virtual page number N1 is stored in the corresponding entry of the page directory. (When a plurality of page directories 12 are prepared, the start address of one of the page directories is stored in the page register 11.)

After that, when the OS needs to rewrite the page table 1 due to a request from itself or the AP, the previous page table 1 is switched to the previously prepared page table 2 or 3. As a result, the correspondence relationship between the linear address 10 and the physical address by the page table 13 is changed. FIG. 4 is a flowchart illustrating a page replacement procedure according to the method of the present invention. O
First, S determines whether or not there is a page replacement request (step S1). When there is a replacement request, the page tables 1, 2 or 3 of the corresponding pattern are searched from the plurality of page tables 13 (step S2). And
The page table 13 is switched by switching the virtual page number of the corresponding entry in the page directory 12 (step S3).

[0014]

As described above, according to the paging system using a plurality of page tables of the present invention, the contents of the page tables are changed by switching a plurality of prepared page tables. It is possible to change the correspondence between the linear address and the physical address at a higher speed than rewriting. As a result, O
The overhead time of S can be reduced and the data processing capability can be improved.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of a paging system using a multiple page table according to the present invention.

FIG. 2 is a block diagram of an example of a conventional paging method.

FIG. 3 is a flowchart illustrating a conventional page replacement procedure.

FIG. 4 is a flowchart illustrating a page replacement procedure according to the method of the present invention.

[Explanation of symbols]

 1, 2, 3 Page table 10 Linear address 11 Page register 12 Page directory 13 Plural page table 20 Physical address

Claims (1)

[Claims] 1. A paging system for converting a virtual address designated by a CPU into a physical address by a page table, and a real page number for determining a physical position of a page, and the C
A plurality of page tables that respectively store the virtual page numbers, which are part of the virtual address specified by the PU, are prepared, and the patterns of the real page numbers stored in the plurality of page tables are set to different patterns. When a page replacement request is made, a page table of the requested pattern is searched from the plurality of page tables, and the searched page table is switched to be used for conversion to the physical address. Paging method.