JPH06124863A - Gaas compound semiconductor substrate - Google Patents

Gaas compound semiconductor substrate

Info

Publication number
JPH06124863A
JPH06124863A JP4048074A JP4807492A JPH06124863A JP H06124863 A JPH06124863 A JP H06124863A JP 4048074 A JP4048074 A JP 4048074A JP 4807492 A JP4807492 A JP 4807492A JP H06124863 A JPH06124863 A JP H06124863A
Authority
JP
Japan
Prior art keywords
gaas
arsenic
gallium
substrate
compound semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4048074A
Other languages
Japanese (ja)
Other versions
JP3306894B2 (en
Inventor
Osamu Yamamoto
治 山本
Isao Fujimura
勇夫 藤村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Kasei Corp
Original Assignee
Mitsubishi Kasei Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Kasei Corp filed Critical Mitsubishi Kasei Corp
Priority to JP04807492A priority Critical patent/JP3306894B2/en
Publication of JPH06124863A publication Critical patent/JPH06124863A/en
Application granted granted Critical
Publication of JP3306894B2 publication Critical patent/JP3306894B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To improve the yield of the manufacture of a semiconductor device, to make a pretreatment such as etching useless at the time of an epitaxial growth by MBE apparatus, etc., and to thin a buffer layer to improve productivity by using a substrate satisfactory in the crystalline property and stability of surface. CONSTITUTION:In the title GaAs compound semiconductor substrate, the difference between the ratio GaAs of the number of atoms of gallium to that of arsenic within 10nm from the surface and the ratio (Ga/As)c of the number of atoms of gallium to that of arsenic in the cleavage plane of a GaAs single crystal (110) is within + or -0.2.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はGaAs化合物半導体に
関し、特に表面層とへき開面のガリウムと砒素の原子数
比Ga/Asがほぼ等しくなるような表面層を備えた基
板に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a GaAs compound semiconductor, and more particularly to a substrate provided with a surface layer such that the atomic ratio Ga / As of gallium and arsenic on the cleaved surface and the surface layer is substantially equal.

【0002】[0002]

【従来の技術】一般的にGaAs化合物半導体基板(以
下GaAs基板と略す)製造工程は、単結晶インゴット
をスライシング後、ラッピング、エッチング、ポリッシ
ング、最終洗浄の順に行われる。半導体素子製造工程で
は前記GaAs基板にエッチング、洗浄等の前処理を行
った後、イオン注入或はエピタキシャル成長等の工程を
行う。従来のGaAs基板は、ポリッシング、エッチン
グ、洗浄等の処理においてガリウムと砒素の解離速度の
違いにより、ガリウムと砒素の原子数比が、その表面層
においては本来理論上そうなるべきである1:1から大
きく異ってしまっていた。このことは、たとえば、任意
の測定方法で同じGaAs基板の表面とへき開させて得
られるへき開面のGa/As比を比較すれば、明らかで
あった。
2. Description of the Related Art Generally, a GaAs compound semiconductor substrate (hereinafter abbreviated as GaAs substrate) manufacturing process is carried out in the order of lapping, etching, polishing and final cleaning after slicing a single crystal ingot. In the semiconductor device manufacturing process, after the GaAs substrate is subjected to pretreatments such as etching and cleaning, processes such as ion implantation and epitaxial growth are performed. In the conventional GaAs substrate, the atomic number ratio of gallium to arsenic should be theoretically 1: 1 in the surface layer due to the difference in the dissociation rate of gallium and arsenic in processing such as polishing, etching, and cleaning. It was very different from. This was clear, for example, by comparing the Ga / As ratio of the cleaved surface obtained by cleaving the same GaAs substrate surface with an arbitrary measurement method.

【0003】[0003]

【発明が解決しようとする課題】そして表面のガリウム
と砒素の組成比が化学量的組成比と異なることにより、
表面の結晶性が悪くなり、また表面の安定性も低くなる
という課題があった。このため実際にGaAs基板上に
素子形成のために他の層を積層する前に、エッチング等
の前処理を行っていたが、今度は前処理に起因して表面
が荒れてしまうという課題があり、改善が望まれてい
た。
Since the composition ratio of gallium and arsenic on the surface is different from the stoichiometric composition ratio,
There is a problem that the crystallinity of the surface becomes poor and the stability of the surface also becomes low. For this reason, a pretreatment such as etching was performed before actually laminating other layers for forming an element on the GaAs substrate, but this time there is a problem that the surface becomes rough due to the pretreatment. , Improvement was desired.

【0004】[0004]

【課題を解決するための手段】そこで本発明者らは、鋭
意検討の結果、かかる課題が洗浄液等によりガリウムと
砒素のどちらかが多く溶出してしまうことに起因するこ
とを見出し、特定溶媒を用いて最終洗浄を行うことによ
り、かかる課題が解決されることを見出し本発明に到達
した。すなわち本発明の目的は高い結晶性と安定性を持
つGaAs化合物半導体基板を提供することにあり、か
かる目的は表面から10nm以内のガリウムと砒素の原
子数比Ga/Asと、GaAs単結晶(110)へき開
面のガリウムと砒素の原子数比(Ga/As)C との差
が±0.2以内であることを特徴とする最終研摩済みの
GaAs化合物半導体基板、並びに最後研摩済みのGa
As化合物半導体基板の製造方法において、最終洗浄工
程の直前に、該基板表面のガリウムと砒素の原子数比
(Ga/As)を計測し、該(Ga/As)の値が、G
aAs単結晶(110)へき開面のガリウムと砒素の原
子数比(Ga/As)C よりも大きい場合には最終洗浄
にアルカリ液を用い、小さい場合には最終洗浄に極性有
機溶媒を用いて該(Ga/As)と(Ga/As)C
差を±0.2以下にすることを特徴とする最終研摩済み
GaAs化合物半導体基板の製造方法により容易に達成
される。以下本発明を更に詳細に説明する。
As a result of intensive studies, the present inventors have found that such a problem is caused by the fact that a large amount of either gallium or arsenic is eluted by a cleaning solution or the like, and The present inventors have found that such problems can be solved by carrying out final cleaning using the same, and reached the present invention. That is, an object of the present invention is to provide a GaAs compound semiconductor substrate having high crystallinity and stability, and an object thereof is to provide an atomic ratio Ga / As of gallium to arsenic within 10 nm from the surface and a GaAs single crystal (110 ) The final polished GaAs compound semiconductor substrate, and the final polished Ga, characterized in that the difference between the atomic number ratio (Ga / As) C of gallium and arsenic on the cleavage plane is within ± 0.2.
In the method of manufacturing an As compound semiconductor substrate, the atomic number ratio (Ga / As) of gallium and arsenic on the substrate surface is measured immediately before the final cleaning step, and the value of (Ga / As) is G
When the atomic number ratio (Ga / As) C of gallium to arsenic on the cleavage plane of the aAs single crystal (110) is larger than C , an alkaline solution is used for the final cleaning, and when it is smaller, a polar organic solvent is used for the final cleaning. This can be easily achieved by a method of manufacturing a final polished GaAs compound semiconductor substrate, which is characterized in that the difference between (Ga / As) and (Ga / As) C is ± 0.2 or less. The present invention will be described in more detail below.

【0005】本発明に用いられる最終研摩済みのGaA
s化合物半導体基板(以下GaAs化合物半導体基板と
いう)は任意の方法で作られた単結晶インゴットを、任
意の方法でスライシングした基板をラッピング、エッチ
ング、ポリッシング、最終洗浄の各工程を得て製造され
る。ただし、条件によっては、ラッピング、エッチン
グ、ポリッシングの各工程のうちのいくつかを省略して
もよい。
The final polished GaA used in the present invention
s compound semiconductor substrate (hereinafter referred to as GaAs compound semiconductor substrate) is manufactured by lapping, etching, polishing, and final cleaning steps of a single crystal ingot made by an arbitrary method and sliced by an arbitrary method. . However, depending on the conditions, some of the lapping, etching, and polishing steps may be omitted.

【0006】本発明のGaAs化合物半導体基板は、ラ
ッピング、エッチング、ポリッシングをそれぞれ任意の
方法で行った後、最終洗浄の前に表面から10nm以内
のガリウムと砒素の原子数比(Ga/As)を任意の方
法で測定し、これを(Ga/As)を測定したのと同一
の方法でGaAs単結晶の(110)へき開面の原子数
比(Ga/As)C と比較し、もしガリウムの量が多け
ればアルカリ液を用いて、もし砒素の量が多ければ極性
有機溶媒を用いて最終洗浄を行う。本発明者らは驚くべ
きことにこの最終洗浄にアルカリ液を用いると、ガリウ
ムが多く、有機極性溶媒では砒素が多く溶出して(Ga
/As)C に近い、すなわち化学量論組成比に近いGa
As化合物半導体基板を得られることを見出したのであ
る。本発明で用いられるアルカリ液としては、公知の種
々のものが用いられるが、好ましくはアンモニア水、特
に好ましくは1〜30%のアンモニア水である。また極
性有機溶媒も公知の種々のものが用いられるが、好まし
くは、アセトン、メチルエチルケトン、メタノール、エ
タノール、イソプロピルアルコールであり、特に好まし
くはイソプロピルアルコールである。
In the GaAs compound semiconductor substrate of the present invention, after performing lapping, etching, and polishing by arbitrary methods, and before the final cleaning, the atomic number ratio (Ga / As) of gallium and arsenic within 10 nm from the surface is set. The amount of gallium was measured by an arbitrary method and compared with the atomic number ratio (Ga / As) C of the (110) cleavage plane of the GaAs single crystal by the same method as that for measuring (Ga / As). If the amount is large, an alkaline solution is used, and if the amount of arsenic is large, a polar organic solvent is used for the final cleaning. The present inventors have surprisingly found that when an alkaline solution is used for this final cleaning, a large amount of gallium and a large amount of arsenic are eluted in the organic polar solvent (Ga
/ As) Ga close to C , that is, close to stoichiometric composition ratio
They have found that an As compound semiconductor substrate can be obtained. As the alkaline solution used in the present invention, various known ones can be used, but ammonia water is preferable, and ammonia water of 1 to 30% is particularly preferable. Various known polar organic solvents can be used, but acetone, methyl ethyl ketone, methanol, ethanol and isopropyl alcohol are preferable, and isopropyl alcohol is particularly preferable.

【0007】本発明に用いられる(Ga/As)及び
(Ga/As)C の測定方法であるが、これも(Ga/
As)と(Ga/As)C を同一の測定方法で測るので
あれば特に限定されないが、好ましくはX線光電子分光
法(XPS)である。具体例としてXPSを用いた測定
法を挙げると、分析深さを10nm以下に設定し、Ga
−3dとAs−3dのナロウスペクトルの面積強度比よ
り求める方法がある。尚、本発明方法を用いる際には言
うまでもないことだが、基板ごとにガリウムと砒素の原
子数比を測定する必要はなく、ある条件下で一度測定を
行なえばよいことは明らかである。
The method for measuring (Ga / As) and (Ga / As) C used in the present invention is also (Ga / As).
There is no particular limitation as long as As) and (Ga / As) C are measured by the same measuring method, but X-ray photoelectron spectroscopy (XPS) is preferable. As a specific example, when the measurement method using XPS is given, the analysis depth is set to 10 nm or less, and Ga
There is a method of obtaining from the area intensity ratio of the narrow spectrum of −3d and As-3d. Needless to say, when the method of the present invention is used, it is clear that it is not necessary to measure the atomic ratio of gallium to arsenic for each substrate, and the measurement may be performed once under certain conditions.

【0008】以下本発明を実施例を用いて説明するが本
発明は、その要旨を超えない限り、実施例に限定される
ものではない。
The present invention will be described below with reference to examples, but the present invention is not limited to the examples as long as the gist thereof is not exceeded.

【0009】[0009]

【実施例】本発明の実施例として、公知の方法で得られ
たGaAs単結晶インゴットを公知の方法でスライシン
グ、ラッピング、エッチング、ポリッシングを行い、最
終洗浄として超音波を照射させながらアンモニア水(3
%、25℃、5分間)の浸漬洗浄後、超純水洗浄(20
℃、10分間)、スピン乾燥(5000r.p.m.)
させたGaAs基板と、比較例として同上の加工工程の
最終洗浄として、超純水洗浄後、超音波を照射させなが
らIPA浸漬洗浄(25℃、15分間)、IPA蒸気乾
燥を行ったGaAs基板について表面状態の違いを説明
する。ここで、アンモニア水の濃度は1〜30%が、温
度は10〜90℃が、アンモニア水洗浄時間は1分以上
が好ましい。
EXAMPLE As an example of the present invention, a GaAs single crystal ingot obtained by a known method was subjected to slicing, lapping, etching, and polishing by a known method, and an ammonia water (3
%, 25 ° C., 5 minutes) immersion cleaning, followed by ultrapure water cleaning (20
(° C, 10 minutes), spin dry (5000 rpm)
As for the GaAs substrate and the GaAs substrate that was subjected to IPA immersion cleaning (25 ° C., 15 minutes) while irradiating ultrasonic waves, as the final cleaning of the above-described processing step as a comparative example, after cleaning with ultrapure water. The difference in surface condition will be described. Here, it is preferable that the concentration of the ammonia water is 1 to 30%, the temperature is 10 to 90 ° C., and the cleaning time of the ammonia water is 1 minute or more.

【0010】表1はX線光電子分光法(XPS)により
GaAs基板表面の元素組成比を測定した結果である。
分析深さは5nmである。Ga/As比は、最終洗浄前
のGaAs基板では1.4であったものが、実施例のG
aAs基板では1.3であり、(110)へき開面の
1.3と同等であり、比較例のGaAs基板は1.6で
あった。ここで、元素組成比はGa−3dとAs−3d
のナロウスペクトルの面積強度比より求めた。
Table 1 shows the results of measuring the elemental composition ratio on the surface of the GaAs substrate by X-ray photoelectron spectroscopy (XPS).
The analysis depth is 5 nm. The Ga / As ratio was 1.4 in the GaAs substrate before the final cleaning, but was G in the example.
The value was 1.3 for the aAs substrate, equivalent to 1.3 for the (110) cleavage plane, and 1.6 for the GaAs substrate of the comparative example. Here, the element composition ratios are Ga-3d and As-3d.
Was obtained from the area intensity ratio of the narrow spectrum of.

【0011】表面の結晶の品質を評価するために、室温
でのフォトルミネッセンスのバンド端発光(PL発光)
の強度を測定した結果を図1に示す。実施例のGaAs
基板は、比較例のGaAs基板に比べ発光強度が強く良
好な半導体表面が得られている。表面の結晶性を評価す
るために、反射高速電子線回折(PHEED)でGaA
s基板を観察した結果を図2に示す。図2はAsビーム
を照射させながら580℃まで加熱後の状態である。実
施例のGaAs基板(a)では、シャープなスポットと
ストリークなパターンが観察され、比較例のGaAs基
板(b)に比べ結晶性が良いことを示している。
Photoluminescence band edge emission (PL emission) at room temperature to evaluate the quality of surface crystals
The result of measuring the intensity of the is shown in FIG. Example GaAs
The substrate has a good semiconductor surface with a higher emission intensity than the GaAs substrate of the comparative example. In order to evaluate the crystallinity of the surface, GaA was measured by reflection high-energy electron diffraction (PHEED).
The result of observing the s substrate is shown in FIG. FIG. 2 shows a state after heating to 580 ° C. while irradiating with an As beam. Sharp spots and streak patterns were observed on the GaAs substrate (a) of the example, indicating that the GaAs substrate (a) had better crystallinity than the GaAs substrate (b) of the comparative example.

【0012】表面の安定性を評価するために、室温での
フォトルミネッセンスのバンド端発光の強度の経時変化
を、実施例のGaAs基板と比較例のGaAs基板につ
いて測定した結果を図3に示す。基板の保管は大気中で
行った。実施例のGaAs基板の発光強度の劣化量は、
比較例のGaAs基板のそれと比べ小さいことが判る。
In order to evaluate the stability of the surface, the change over time in the intensity of the band edge emission of photoluminescence at room temperature was measured for the GaAs substrate of the example and the GaAs substrate of the comparative example, and the results are shown in FIG. The substrate was stored in the atmosphere. The deterioration amount of the emission intensity of the GaAs substrate of the example is
It can be seen that it is smaller than that of the GaAs substrate of the comparative example.

【0013】表面の酸化膜厚を評価するために、電子エ
ネルギー損失分光法(EELS)で測定した結果を図4
に示す。16.4eVのピークはGaAsの体積プラズ
モンによるもので、GaAs単結晶構造の存在を表す。
このピークは本実施例の基板では分析深さ5Åで既に観
察される。分析深さ8Åでは本実施例及び比較例の基板
共に観察されるが、本実施例の基板の方がより強いピー
クが観察される。
FIG. 4 shows the result of measurement by electron energy loss spectroscopy (EELS) in order to evaluate the oxide film thickness on the surface.
Shown in. The peak at 16.4 eV is due to the volume plasmon of GaAs and indicates the existence of a GaAs single crystal structure.
This peak is already observed on the substrate of this example at an analysis depth of 5Å. At the analysis depth of 8 Å, both the substrates of this example and the comparative example are observed, but a stronger peak is observed in the substrate of this example.

【0014】これらの結果より、実施例のGaAs基板
は表面の結晶性が良く、表面に保護膜となるような薄い
酸化膜が存在し、また表面の安定性が良いことが判る。
From these results, it is understood that the GaAs substrate of the embodiment has good surface crystallinity, has a thin oxide film serving as a protective film on the surface, and has good surface stability.

【0015】[0015]

【表1】 [Table 1]

【0016】[0016]

【発明の効果】表面の結晶性が良く、また表面の安定性
の良い基板を用いることにより半導体素子製造の歩留り
が向上する。MBE装置等でエピ成長させる際に、エッ
チング等の前処理を必要とせず、またバッファー層を薄
くすることが出来、生産性を向上させることが出来る。
Industrial Applicability By using a substrate having a good surface crystallinity and a good surface stability, the production yield of semiconductor devices is improved. Pre-treatment such as etching is not required at the time of epitaxial growth with an MBE apparatus or the like, and the buffer layer can be thinned, and productivity can be improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】図1はPL発光強度の比較図である。FIG. 1 is a comparison diagram of PL emission intensities.

【図2】図2はRHEEDパターンによる結晶の構造を
示す図である。
FIG. 2 is a diagram showing a crystal structure according to an RHEED pattern.

【図3】図3はPL発光強度の経時変化を示す図であ
る。
FIG. 3 is a diagram showing a temporal change in PL emission intensity.

【図4】図4はEELSによる表面分析を示す図であ
る。
FIG. 4 is a diagram showing a surface analysis by EELS.

─────────────────────────────────────────────────────
─────────────────────────────────────────────────── ───

【手続補正書】[Procedure amendment]

【提出日】平成5年9月22日[Submission date] September 22, 1993

【手続補正1】[Procedure Amendment 1]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】図2[Name of item to be corrected] Figure 2

【補正方法】変更[Correction method] Change

【補正内容】[Correction content]

【図2】図2はRHEEDパターンによる結晶の構造を
示す写真である。
FIG. 2 is a photograph showing a crystal structure according to a RHEED pattern.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 表面から10nm以内のガリウムと砒素
の原子数比Ga/Asと、GaAs単結晶(110)へ
き開面のガリウムと砒素の原子数比(Ga/As)C
の差が±0.2以内であることを特徴とする最終研摩済
みのGaAs化合物半導体基板。
1. The difference between the atomic ratio Ga / As of gallium and arsenic within 10 nm from the surface and the atomic ratio of gallium to arsenic (Ga / As) C on the cleavage plane of the GaAs single crystal (110) is ± 0. Final polished GaAs compound semiconductor substrate characterized by being within 0.2.
【請求項2】 最後研摩済みのGaAs化合物半導体基
板の製造方法において、最終洗浄工程の直前に、該基板
表面のガリウムと砒素の原子数比(Ga/As)を計測
し、該(Ga/As)の値が、GaAs単結晶(11
0)へき開面のガリウムと砒素の原子数比(Ga/A
s)C よりも大きい場合には最終洗浄にアルカリ液を用
い、小さい場合には最終洗浄に極性有機溶媒を用いて該
(Ga/As)と(Ga/As)C の差を±0.2以下
にすることを特徴とする最終研摩済みGaAs化合物半
導体基板の製造方法。
2. In the method of manufacturing a GaAs compound semiconductor substrate which has been finally polished, immediately before the final cleaning step, the atomic number ratio (Ga / As) of gallium and arsenic on the surface of the substrate is measured to obtain the (Ga / As). ) Is a GaAs single crystal (11
0) The atomic ratio of gallium to arsenic on the cleavage plane (Ga / A
s) When it is larger than C , an alkaline solution is used for the final washing, and when it is smaller, a polar organic solvent is used for the final washing, and the difference between the (Ga / As) and (Ga / As) C is ± 0.2. A method of manufacturing a finally polished GaAs compound semiconductor substrate, characterized in that:
JP04807492A 1992-02-04 1992-02-04 GaAs compound semiconductor substrate Expired - Fee Related JP3306894B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP04807492A JP3306894B2 (en) 1992-02-04 1992-02-04 GaAs compound semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP04807492A JP3306894B2 (en) 1992-02-04 1992-02-04 GaAs compound semiconductor substrate

Publications (2)

Publication Number Publication Date
JPH06124863A true JPH06124863A (en) 1994-05-06
JP3306894B2 JP3306894B2 (en) 2002-07-24

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US7619301B2 (en) 2007-06-01 2009-11-17 Sumitomo Electric Industries, Ltd. GaAs semiconductor substrate and fabrication method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7619301B2 (en) 2007-06-01 2009-11-17 Sumitomo Electric Industries, Ltd. GaAs semiconductor substrate and fabrication method thereof

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