JPH06110918A - Digital frequency domain correlator - Google Patents

Abstract

PURPOSE: To perform image correlation in real time between, specially, a video image and various target subject images given in the field of video image input by digitally performing correlation in a Fourier frequency area. CONSTITUTION: An electronic image for correlation with a matched filter image is obtained by a camera 2. The obtained subject image is digitized by a digitizing circuit 3 and enhanced by an image processor 4. After a composition multiplier performs multiplication by a specific window coefficient, row converting processors perform conversion by rows of a 1st frame first and then an FFT processor 9 processes the frame by Fourier transformation. Then the Fourier-transformed frame is multiplied by matched filters in order at the composition multiplier 10. Then the result is processed through the inverse fast Fourier transformation of an inverse FFT transformer 13 and a decision processor 14 takes an analysis for a correlation spot.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital frequency domain correlator and an image correlation method in image processing, and more particularly to a matched filtering operation.

[0002]

Matched filtering is the portion of the optical image by multiplying the Fourier transform of the image with a Fourier transform "matched filter" image and then determining the degree of overlap and the filter in the inverse Fourier transform result of the image. It relates to the identification method. In particular, the matched filtering process requires performing the necessary transformations as well as multiplications using optical techniques.

Character recognition systems, target recognition systems, target identification systems, quality control diagnostic systems, process control diagnostic systems, and the like are known as systems that use the matched filter technology for image correlation and identification. . In general, only optical matched filtering is practical for such systems, even though they use non-real-time electronic matched filtering to simulate the optical process. .

As one of such systems, an automatic target recognition system is disclosed in US Pat. No. 3,779,49.
No. 2 is disclosed. This system uses an optical matched filter image correlator (OMFIC).
This OMFIC enables high-speed two-dimensional correlation by using a lens and generates a Fourier transform of an image. Correlation in the Fourier frequency domain is accomplished by passing light through a Fourier transform "matched filter" image transparency, which effectively multiplies the image. The inverse Fourier transform result of the image is
It includes "correlation spots" or areas of higher light intensity that indicate the degree of correlation and can be displayed in a format suitable for the operator of the system.

Image correlation has the effect of "real-time" correlation, ie, correlation at the image reception rate, by passing light through the transparency. This is because all operations occur essentially at the speed of light as it travels along the optical path of the system. This is a huge advantage in the general way of obtaining the Fourier transform and multiplying it with the video resolution image, considering the compositing algorithm and / or electronics.

[0006]

However, such systems require that all filter preparation, setup, and alignment compositing tasks be completed before image processing can begin. . Matched filters are essentially photographic transparency that must be carefully prepared and stored. For another target object, it is necessary to insert another matched filter in the optical path. This reduces the actual processing speed of the optical matched filter correlations and limits their flexibility.

Optical matched filtering lens systems proposed to date also require illumination of both the source image and the filter by a coherent monochromatic light source. Therefore, optical matched filtering was generally only possible under laboratory conditions where coherent illumination could easily be provided. Although devices such as "spatial light modulators" have been proposed to solve this lighting problem, it is not possible to achieve sufficient performance in such systems.

Furthermore, optically matched filter image correlation systems and common optical systems have a relatively low dynamic signal range maintained throughout the processing chain due to, for example, attenuation and scattering effects in various optical elements. There's a problem. This sets a limit on how much the signal can be buried in noise and nevertheless recovered.

However, despite some of the problems mentioned above, the optical matched filter image correlator is a practical type of image correlator because of its inherent velocity effect. Electronic processing methods may be used in systems of the type described above for any other purpose.
It has so far proved to be much slower than the simulation.

The present invention has been made in view of the above points, and particularly, an electronic system capable of performing real-time image correlation between a video image and various target subject images provided in the field of video image input. The purpose is to provide.

It is also an object of the present invention to provide a system capable of real-time image correlation using broadband illumination such as is used to take conventional video images.

A further object of the invention is to provide a real-time image correlation system in which adaptive filters can be deployed, ie "on the fly" as they are needed.

Furthermore, the present invention aims to provide a real-time image correlation system having a wide dynamic range.

[0014]

To achieve the above object, a digital frequency domain correlator according to the present invention comprises a digitizing means for converting a video image input into a digitized image and a pipeline. Transform means for performing two-dimensional fast Fourier transform on the digitized image, including a plurality of fast Fourier transform processors and a plurality of image frame memories arranged in a parallel processing architecture, and a frequency domain for the Fourier transformed digitized image A frequency domain multiplication means for multiplying the matched filter in, and processing and analyzing the product of the digitized image and the matched filter to determine the degree of correlation between the digitized image and the matched filter. And processing means for performing each of the plurality of high-speed Fourier transform processors. It is characterized in that it includes means for a portion of the digitized image performs one-dimensional Fast Fourier Transform.

The image correlation method according to the invention also comprises the step of converting the video image input into a digitized image,
Performing a two-dimensional fast Fourier transform on the digitized image by using a plurality of fast Fourier transform processors and a plurality of image frame memories arranged in a pipelined parallel processing architecture; and a Fourier transformed digitized image. To a matched filter in the frequency domain, and processing and analyzing the product of the digitized image and the matched filter to determine the degree of correlation between the digitized image and the matched filter. And each of the plurality of fast Fourier transform processors is used to perform a one-dimensional fast Fourier transform on a portion of the digitized image.

[0016]

That is, according to the present invention, the above-mentioned object is achieved by digitally performing the correlation in the Fourier frequency domain. The correlation operation is accomplished in the following fully electronic form of matched filtering using electronic circuitry rather than optical filters.

That is, first, the input image is digitized and Fourier transformed from the spatial domain to the frequency domain. Second, the Fourier transformed digital subject image is multiplied with the Fourier transformed digital image of the target subject.
Finally, the resulting image is inverse Fourier transformed into the spatial domain where the analysis of the resulting correlated spots can be performed.

A unique parallel pipelined processing architecture accomplishes the above transforms and multiplications in "real time", ie, in less time than it takes to scan an image using a standard scan format. To be possible.

The unique digital processing architecture uses a plurality of fast Fourier transform processors for performing two-dimensional fast Fourier transforms in parallel and a plurality of fast Fourier transform processors for performing inverse fast Fourier transforms in parallel. It is a thing. Further, these processors allow image data to move through the pipeline during processing operations, that is, several image frames can enter the pipeline and various operations can be performed simultaneously. It is arranged.

In order to achieve the third objective, namely to provide an adaptive real-time image correlation system, an input image, a partially processed image and an output image are generated in the processing pipeline. Process in preparation for the matched filters "on the fly" so that there is sufficient memory space to store a large number of matched filters in addition to the memory needed to store them temporarily. A route is provided.

The parallel pipelined architecture of the present invention requires a minimum "overhead" time requirement, but with N fast Fourier transform processors arranged in parallel that effectively reduces processing time by 1 / N. We are using.
Furthermore, the processor is arranged so that the image data moves through the "pipeline" during the conversion process operation, thus allowing a new input image to enter the pipeline every 1/30 second, "real time". Reduce to processing rate.

Accordingly, the present invention provides a unique matched filter that enables electronic digital matched filtering in the frequency domain at a rate fast enough to allow real-time processing of video signals at the rate input to the system. A filter processing system can be provided.

[0023]

1 illustrates a fully digital frequency domain correlator according to one embodiment of the present invention. The unreferenced arrows in the figure indicate the flow of signals through the components of this correlator. Arrow 8 indicates a digital image bus for carrying digital image information within the correlator.

The image input 1 is input to the correlator via the camera system 2. Any image that can be focused by the lens system on the focal plane of this camera 2, for example a visible video image, an infrared video image or an ultraviolet video image, is a suitable input. The camera may be a general CCD video camera. Of course, other systems can be used to convert the image to electronic form.

The camera 2 is controlled by the controller 15 via the control signal bus 16. The controller 15 can be configured by either a computer or a dedicated control circuit configuration. Controller 15
Is preferably of any suitable construction known in the art, including operator input device 17.

The analog signal output from the camera 2 is
For example, video signal standard, RS-170, RS-33
Follows either 0 or CCIR. Of course, numerous other signal formats can also be used in the example correlators.

The operation of this correlator is generally synchronized by the controller 15 which generates the control sequences and which controls the specific circuit functions for each part of the correlator. Examples of such functions include clock, start / stop, operation mode control, initialization, image data transfer control, address generation, image processing control, and DRAM refresh control. These functions are used in a wide variety of conventional devices, and their application to the controller 15 of this embodiment will be apparent to those skilled in the art.

The output from the video camera 2 is input to the digitizing circuit 3. This digitizing circuit 3 is shown in detail in FIG. Although the same figure shows the preferred form for the digitizing circuit, it will be understood that other signal formats require modification to this digitizing circuit.

As known to those skilled in the art, the video signal contains a sync code, which is intended to provide timing signals to a flash A / D converter 35 and a data storage multiplexer (MUX) 36. Therefore, it is extracted by the synchronization extractor 33. The analog video signal is sent to the flash A / D converter 3 via the buffer amplifier 36.
5 and is converted to digital form there.

This digitized image is then sent by multiplexer 36 to one of two single frame memories 38 and 39 for storage prior to further processing. Two toggle-type video frame memories 3
The use of 8 and 39 allows the next video frame to be routed to the pipeline in the correlator for further processing. The demultiplexer (DEMUX) 40 allows digitized video frames to be sent one frame at a time to the image processor 4 along the common bus.

The image processor 4 provides a number of standard image processing operations such as image enhancement such as intensity adjustment, spatial filtering, smoothing, edge enhancement, data conversion, and image rotation. These operations are used to enhance the image, remove noise and background, and spatially modify the image to increase the probability of finding an acceptable match.

The processed image data from the image processing section 4 is then supplied to the synthesis multiplier 5. This composite multiplier 5 multiplies it by an appropriate windowing factor 7 to wind the image and reduce distortion in the transformed image caused by "foldover" or "aliasing". Here, foldover is the general effect that the image is dispersed over time due to the effect of the discontinuous periodic movement of the raster scan used to form the video image, ie due to the finite lifetime of the raster scan. It is a known phenomenon that results in high frequency noise components appearing in the transformed image produced by limitations in video.

The window factor 7 is stored in the window filter store 6, preferably a high speed DRAM memory, until required by the combiner multiplier 5 shown in detail in FIG. In the synthesis multiplier 5, n × m
An image frame composed of pixels is matched pixel by pixel with the corresponding window coefficient 7. Wind coefficient 7
The value of is predetermined by calculating and empirically determining the amount of foldover or aliasing due to the conversion and choosing a value that minimizes foldover or aliasing.

The real and imaginary parts of both the pixel data and the window coefficient are simultaneously input and multiplied together, resulting in a composite data output Y along the digitized video bus 8. In essence, the window factor suppresses the portion of the image that is susceptible to foldover in the frequency domain.

According to the known composite multiplication / computation function, y = i * w. However, here, Re (y) = Re (i) Re (w) -Im (i) Im
(W) and Im (y) = Re (i) Im (w) + Im (i) Re
(W) Therefore, four multipliers 40-43 and two accumulators 44 and 45 are required to operate in parallel. The resulting "wind" data is
It is supplied to the two-dimensional FFT converter 9.

This two-dimensional FFT converter 9 is shown in detail in FIG.
Use a parallel processing architecture, as shown in. The FFT converter 9 totals the window-processed digital image data from the synthesis multiplier 5 by N.
Convert using 4 processors. These N processors are divided into two groups 20 and 26,
Each of them is connected to a corresponding number of buffer memories 21 and 27. The use of N processors connected in parallel allows the FFT converter 9 to process at any desired speed, limited only by the row or column processing speed T of the single processor. . The operation of this converter 9 is coordinated by the data transfer and sequence controller 32. The data transfer and sequence controller 32 supplies synchronization and control signals to each part of the converter 9 in order to organize the data transfer as described below.

The parallel processor uses a standard video frame row composed of 512 pixels to process the data as follows. The first row is input to the row memory 21 ₁ , after which the FFT processor 20 ₁ is given a start conversion command to start loading the second row into the row memory 21 ₂ . This process continues until processor 20 ₁ reaches the Fourier transform of the first row of video data. The converted row of video data is then stored in the row memory 21.
_{When N / 2} is to be loaded, it is moved to the intermediate memory 22. Then, N / 2 + 1 rows of the next row of data is data, line memory 21 for processing by the processor 20 ₁
Loaded to ₁ . This processing of the rows that convert the digitized image is shown in FIG.

Number of FFT processors and row memories N
Has been selected such that loading of N / 2 rows of video data occurs when processor 20 ₁ completes the FFT operation. This time allows the remaining processor 20
Each _{2 ~20} N / _2, should operate at the same time.
As soon as this occurs, N / 2 + 1 rows can be loaded into the row memory 21 ₁ for which the corresponding processor has completed its operation. Then, as soon as the row memory 21 ₂ becomes valid, N / 2 + 2 rows are loaded into it, and so on. Therefore, the line conversion time is 512
For line images, it is reduced from 512T to 512T / (N / 2). However, N is a number larger than 2 here.

When all the line conversions are completed, the intermediate memory 2
2 contains a complete image frame, although the Fourier transform is only half completed. Then, the video frame data, must be simultaneously shifted one column to the column memory 27 ₁ ~27 N / _2. As shown in FIG. 8, the column FFT transform operation is exactly the same as described above for the row FFT operation, again for a 512 × 512 pixel image, 51
It results in a decrease in the conversion time from 2T to 512T / (N / 2). However, N is a number larger than 2 here.

The fast Fourier transform algorithm is well known per se, and the processor used can be any suitable fast Fourier transform processor. A commercially available processor with an appropriate 1 × 512 point 310 μs FFT processing speed is Bursky
Paper by Electronic Design, pg.127, september 8,
Published in 1988. The configuration of such a standard one-dimensional FFT processor chip 20 is shown in FIG. 9, along with a work memory 21 and associated buffers, input / output rows, and control and windowing circuitry. Therefore, N
= 64 processors, the processing time for image conversion of 512 lines is approximately 5 ms ((512 × 310 μ
s) / (64/2)).

A typical video frame requires 1/30 second, or 33 ms, to complete. Therefore, 64
The processor chipset can be configured to complete 6 conversions in one video frame.
This is fast enough to complete both column and row transforms and inverse column and row transforms in "real time", ie as the video image is input to the correlator. Moreover, if these operations are performed serially along a pipeline as shown in FIGS. 1 and 3, the requirement for fast data movement is relaxed.

After all rows of the image frame have been transformed and the resulting row transformed image frame resides in the intermediate frame memory 22 in preparation for column transformation, the transformation of frame 2 can begin. When the row conversion for the second image frame starts, the column conversion for the first frame starts at the same time. The row conversion data is shifted in the intermediate frame memory 22 and input to the column memories 27 _{1 to} 27 _{N / 2} , whereas the result of the second frame row conversion is the intermediate memory 2
3 is stored.

Therefore, the column conversion of the first video frame A and the row conversion of the second video frame B are performed at the same time. In other words, the pipelined data flow and frame A / frame B "toggled" memory allow concurrent row and column FFT transforms, thus optimizing the Fourier transform processing rate. The completely Fourier transformed image frame is stored in the frame memories 28 and 29.

By the multiplication multiplier 10, the Fourier transform subject image obtained from the two-dimensional FFT converter 9 is multiplied by the matched filter 12 selected from one of the plurality of matched filters stored in the memory 11. ,
Image comparison is accomplished. This matched filter 12
Represents the Fourier transform of a clear image of the target object with noise and background clutter removed. Such an image is obtained "on the fly" by transferring the image directly from the two-dimensional FFT transformer 9 along the video bus 8 ', as described below. The memory 11 may be in the form of a non-volatile component such as an EEPROM or memory disk, although dynamic RAM is required for "on the fly" or adaptive applications.

In addition to the Fourier transformed image from the converter 9, the matched filter frequency domain target data 12 is used in the synthesis multiplier 10. Matched filtering is implemented as a pixel-by-pixel multiplication of this frequency domain target data forming a matched filter as well as a two-dimensional Fourier transformed subject image.

The composite multiplier 10 is shown in detail in FIG. 4 and requires essentially the same configuration as the composite multiplier 5 described above. Therefore, the composite multiplier 10 will not need to be further detailed here. However, it should be noted that other synthetic multiplier circuits can be constructed by those skilled in the art and such circuits should be included in the present invention.

The two-dimensional inverse FFT converter 13 has the same essential elements as the two-dimensional FFT converter 9 shown in FIG. The flow and operation of the signal are
The same as described above for the T-converter 9 and the FF
It uses N inverse FFT processors corresponding to the T processors 20 and 26 and N row and column memories corresponding to the row memory 21 and the column memory 27. Also,
The frame memories are the frame memories 22, 23, 28,
And 29 are the same.

If the target objects are in the field of the resulting image, the recovered matched filtered digital image is a "correlation spot" or a stronger image corresponding to the area of the image in which these objects are located. It will include areas of intensity. To scan the image and determine the presence of any correlated spots that indicate a match,
The decision processor 14 is used. The standard correlation algorithms performed by this decision processor 14 are thresholds, weighted sums, convolutions, etc. Alternatively, the matched filtered digital image may simply be displayed for viewing by the operator of the system.

It is also included in the present invention to analyze the data without performing the inverse Fourier transform. Using Parseval's theorem, which states that the integral of the transformation is the energy contained in the correlation plane,
Algorithms for analyzing correlations in the frequency domain are known. The greater the energy, the more matching there is.

The operation sequence shown in FIG. 6 of the digital frequency domain correlator of the embodiment can be summarized as follows.

First, an electronic image is acquired by the camera 2 for correlation with the matched filter image. The acquired subject image is then digitized by the digitizing circuit 3 and enhanced by the image processor 4. After the multiplication with the predetermined window coefficient in the composition multiplier 5, the FFT processor 9 performs the Fourier transform on the frame by first performing the conversion for each row of the first frame in the plurality of row conversion processors.

The row transform processor passes through the buffer memory so that the last processor to be loaded is loaded exactly when the first processor has completed its translation and is ready to be loaded again. Supplied in serial. When the row conversion is performed for the first frame, the columns of the first frame are converted in a plurality of column conversion processors arranged similarly to the row processor. At this time, row conversion of the second frame is also started.

Next, the Fourier-transformed frames are sequentially multiplied by the matched filter in the synthesis multiplier 10. After that, the result is the inverse FFT converter 1
Inverse fast Fourier transform in 3 and decision processor 1
4 analyzed for correlated spots.

Since the "matched filter" described above is simply a Fourier transformed frequency domain representation of the spatial images of various objects or targets of interest, the matched filter preparation is performed by a digital frequency domain correlator as follows: It can easily be done "on the fly", as shown in FIG.

The camera 2 is aimed at the subject so that the subject is in the center of the image field. Upon image acquisition, the image processing and windowing portion of the correlator removes outer scene information around and beyond the subject of interest. The processed image containing the clutter and background-removed object is then transformed by a two-dimensional fast Fourier transform transformer 9. The resulting frequency domain data set is a suitable matched filter and is matched via the digital video image data bus 8'for comparison with the next input image in the composite multiplier 10 to the matched filter store. Is directly stored in.

This ability to quickly prepare and store a matched filter of a new subject of interest provides the digital frequency domain correlator with the "learning" ability. The system is capable of learning and storing visual information about new objects, which can then be recognized from that point through the image correlation process.
Thus, the digital frequency domain correlator provides great operational flexibility in that it behaves as an adaptive system and can update and optimize the matched filters in its storage bank.

The present invention is not limited to the above embodiment, and it is needless to say that various changes and modifications can be made.

[0058]

As described in detail above, according to the present invention,
In particular, it is possible to provide an electronic system capable of performing real-time image correlation between a video image and various target object images provided in the field of video image input.

The present invention can also provide a system capable of real-time image correlation using broadband illumination such as is used to take conventional video images.

Furthermore, the present invention can provide a real-time image correlation system in which adaptive filters can be deployed, ie "on the fly" as they are needed.

Furthermore, the present invention can provide a real-time image correlation system having a wide dynamic range.

[Brief description of drawings]

FIG. 1 is a block diagram of a digital frequency domain correlator according to an embodiment of the present invention.

FIG. 2 is a block diagram of a digitizing circuit in FIG.

FIG. 3 is a block diagram of a two-dimensional FFT or inverse FFT in FIG.

FIG. 4 is a block configuration diagram of a synthesis multiplier in FIG.

FIG. 5 is a flowchart of a method for creating a matched filter according to an embodiment of the present invention.

FIG. 6 is a flowchart illustrating an image correlation method in a matched filter according to an exemplary embodiment of the present invention.

FIG. 7 is a flowchart of a method for performing a fast Fourier transform on a row of an image according to an embodiment of the present invention.

FIG. 8 is a flow chart of a method for performing a fast fast Fourier transform on a sequence of images according to one embodiment of the invention.

9 is a block diagram of an individual one-dimensional fast Fourier transform processor and work memory for use in the correlators shown in FIGS.

[Explanation of Codes] 1 ... Image input, 2 ... Camera system, 3 ... Digitizing circuit, 4 ... Image processing unit, 5, 10 ... Synthesizing multiplier, 6 ... Wind filter storage unit, 7 ... Wind coefficient, 8 ... Digital Video bus, 8 '... Digital video image data bus, 9 ... Two-dimensional FFT converter, 11 ... Matched filter storage unit, 12 ... Matched filter frequency domain target data, 13 ... Two-dimensional inverse FFT converter, 14 ... Judgment processor , 15 ... Controller, 16 ... Control signal bus,
17 ... Operator control input, 18 ... Subject recognition result.

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[Submission date] April 30, 1993

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[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital frequency domain correlator in image processing, and more particularly to a matched filtering operation.

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 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Dennis D'Abrielle Verde United States, New York 11747, Melville, Copeland Court 5

Claims (26)

[Claims] 1. A digitizing means for converting a video image input into a digitized image in a digital frequency domain correlator for locating a subject image present in the video image input using a matched filter; Transform means for performing two-dimensional fast Fourier transform on the digitized image, including a plurality of fast Fourier transform processors arranged in a pipelined parallel processing architecture and a plurality of image frame memories, and a Fourier transformed digitized image A frequency domain multiplication means for multiplying a matched filter in the frequency domain, and processing and analyzing the products of the digitized image and the matched filter to determine the correlation between the digitized image and the matched filter. Processing means for determining the degree, and the plurality of high-speed Fourier Each conversion processor, a digital frequency-domain correlator, characterized in that it includes means for performing a one-dimensional fast Fourier transform on a portion of the digitized image. 2. A digitizing means for converting a video image input into a digitized image in a digital frequency domain correlator for locating a subject image present in the video image input using a matched filter. Transform means for performing two-dimensional fast Fourier transform on the digitized image, including a plurality of fast Fourier transform processors arranged in a pipelined parallel processing architecture and a plurality of image frame memories, and a Fourier transformed digitized image A frequency domain multiplication means for multiplying a matched filter in the frequency domain, an inverse transform means for performing an inverse fast Fourier transform on the product of the transformed image and the matched filter, and an analysis of the inverse Fourier transform image. The degree of correlation between the digitized image and the matched filter. Digital frequency domain correlator, wherein each of the plurality of fast Fourier transform processors includes means for performing a one-dimensional fast Fourier transform on a part of the digitized image. . 3. A plurality of fast Fourier transform row processors, a plurality of fast Fourier transform column processors, a corresponding row memory for each of the plurality of row processors, and a plurality of the plurality of fast Fourier transform column processors. A corresponding column memory for each of the plurality of column processors, the conversion means further comprising row memory supply means for sequentially supplying one row of an image frame to each of the plurality of row processors; Column memory supply means for successively supplying one column of the row-converted frame to each of the column processors, and the last one of the plurality of row memories to be supplied is supplied. Provided when the row processor corresponding to the first of the row memories to be completed has almost completed the Fourier transform into one row of the frame, The column processor corresponding to the first of the column memories to be supplied to the last one of the plurality of column memories to be completed has completed a Fourier transform into columns of the row transformed frame. 3. A digital frequency domain correlator according to claim 2, characterized in that it is supplied at 4. The digital frequency domain correlation according to claim 2, wherein the multiplication means includes a synthesis multiplication means for performing synthesis multiplication of the Fourier-transformed digitized image and the matched filter. vessel. 5. The digital frequency domain correlator according to claim 2, wherein the processing means includes means for determining the degree of correlation by searching for correlation spots. 6. A digital frequency domain correlator according to claim 2, further comprising image input means for supplying a video image to said digitizing means. 7. The correlator further comprises storage means for storing a plurality of matched filters obtained by taking a two-dimensional fast Fourier transform of images of various objects required for retrieval. The digital frequency domain correlator according to claim 2, characterized in that 8. Further comprising window processing means for window filtering the digitized image prior to the fast Fourier transform of the digitized image by the transforming means to reduce aliasing caused by the fast Fourier transform operation. The digital frequency domain correlator according to claim 2, characterized in that 9. The window processing means according to claim 8, further comprising window coefficient multiplication means for digitally multiplying the digitized image by a window coefficient preselected for each pixel. Digital frequency domain correlator. 10. The digital frequency domain correlator according to claim 9, further comprising storage means for storing the preselected window filter coefficients. 11. The digital frequency domain correlator of claim 2 wherein the correlator has a minimum throughput rate of 30 images per second. 12. The digital frequency domain correlator according to claim 2, further comprising means for storing the output of the converting means in a storage means. 13. An image correlation method for locating a subject image present in a video image input using a matched filter, the steps of converting a video image input to a digitized image, and a pipelined parallel processing architecture. Performing a two-dimensional fast Fourier transform on the digitized image by using a plurality of fast Fourier transform processors and a plurality of image frame memories arranged in the above, and the Fourier transformed digitized image in the frequency domain. Multiplying by a matched filter; processing and analyzing the product of the digitized image and the matched filter to determine the degree of correlation between the digitized image and the matched filter, Each of the plurality of fast Fourier transform processors Image correlation method, characterized in that it is used in a part of the digitizing images to perform the one-dimensional fast Fourier transform. 14. An image correlation method for locating a subject image present in a video image input using a matched filter, the steps of converting a video image input into a digitized image, and a pipelined parallel processing architecture. Performing a two-dimensional fast Fourier transform on the digitized image by using a plurality of fast Fourier transform processors and a plurality of image frame memories arranged in the step of matching the Fourier-transformed digitized image in the frequency domain. Multiplying the filter, performing an inverse fast Fourier transform on the product of the transformed image and the matched filter, analyzing the inverse Fourier transformed image to determine the degree of correlation between the digitized image and the matched filter. Determining a plurality of high speed Fourier transforms. An image correlation method, wherein each transform processor is used to perform a one-dimensional fast Fourier transform on a portion of the digitized image. 15. A plurality of fast Fourier transform row processors, a plurality of fast Fourier transform column processors, a corresponding row memory for each of the plurality of row processors, and a plurality of the plurality of fast Fourier transform row processors. A corresponding column memory for each of the column processors, the step of performing the two-dimensional fast Fourier transform further comprising successively supplying one row of an image frame to each of the plurality of row processors; Successively supplying one column of a row transformed frame to each of a plurality of column processors, the last of said plurality of row memories to be supplied being said row memory to be supplied. Is supplied when the row processor corresponding to the first of the above has completed the Fourier transform into one row of the frame, The column processor corresponding to the first of the column memories to be supplied to the last one of the plurality of column memories to be completed has completed a Fourier transform into columns of the row transformed frame. The image correlation method according to claim 14, wherein the image correlation method is provided when the image correlation is performed. 16. The image correlation method of claim 14, wherein the multiplying step includes using a synthetic multiplier to perform the multiplication. 17. The image correlation method according to claim 14, wherein the step of analyzing the inverse Fourier transform image includes a step of searching a correlation spot. 18. The image correlation method of claim 14, further comprising the step of acquiring a video image for subsequent digitization. 19. The correlator further comprises the step of storing a plurality of matched filters obtained by taking a two-dimensional fast Fourier transform of the images of various objects required for the search. The image correlation method according to claim 14. 20. The method further comprising the step of wind filtering the digitized image prior to the fast Fourier transform to reduce aliasing caused by the fast Fourier transform operation.
4. The image correlation method described in 4 above. 21. The image correlation method of claim 20, wherein the window filtering step is accomplished by digitally multiplying the digitized image by a preselected window coefficient for each pixel. 22. The method of claim 21, further comprising storing the window filter coefficients.
The image correlation method described in. 23. The image correlation method of claim 14, wherein the image correlation method is accomplished in less than 1/30 seconds. 24. The image correlation of claim 14, further comprising the steps of storing the Fourier transform digitized image in a storage memory and using the output of the memory as the matched filter. Method. 25. Digitizing means for converting an image into a digital format, a plurality of high speed Fourier transform processors arranged in a pipelined parallel processing architecture and a plurality of image frame memories, the digitized image being converted into a digital image. -Dimensional high-speed Fourier transform transform means, frequency-domain multiplication means for multiplying the Fourier-transformed digitized image with a matched filter in the frequency domain, and inverse fast to the product of the transformed image and the matched filter An inverse transforming means for performing a Fourier transform; and a processing means for analyzing the inverse Fourier transform image to determine the degree of correlation between the digitized image and the matched filter. Fourier Transform Processor is a multiple fast Fourier transform line processor and multiple fast Fourier transform processors. A line conversion column processor, a corresponding row memory for each of the plurality of row processors, and a corresponding column memory for each of the plurality of column processors, wherein the converting means further comprises: Row memory supply means for supplying one row of an image frame to each of the processors one by one, and column memory supply means for supplying one column of the row-converted frame to each of the plurality of column processors one after another. The last one of the plurality of row memories to be supplied corresponds to the first one of the plurality of row memories to be supplied, and the row processor corresponds to a Fourier transform into one row of the frame. The last one of the plurality of column memories to be supplied, which is supplied when almost completed, is the column corresponding to the first one of the column memories to be supplied. Provided when a processor has completed a Fourier transform of said row transformed frame into a column, said plurality of image frame memories comprising a first means for storing two digitized image frames and two Second means for storing a row-transformed image frame, said row memory supply means providing said second frame from said first means with a plurality of said second frames when said first frame is completely row transformed. The row memory is supplied to the row processors one after another, and the column memory supply means supplies the second frame from the first means to the plurality of row memories while the row memory supply means supplies the second frame to the plurality of row memories. A digital frequency domain correlator, wherein the first frame from the second means is supplied to the plurality of column processors one after another for each column. 26. Converting an image to digital form, and using a plurality of high speed Fourier transform processors and a plurality of image frame memories arranged in a pipelined parallel processing architecture to provide a two-dimensional high speed to the digitized image. Performing a Fourier transform, multiplying the Fourier-transformed digitized image by a matched filter in the frequency domain, performing an inverse fast Fourier transform on the product of the transformed image and the matched filter, and said inverse Fourier transform. Analyzing the transformed image to determine a degree of correlation between the digitized image and the matched filter, wherein the plurality of fast Fourier transform processors comprises a plurality of fast Fourier transform row processors and a plurality of fast Fourier transform row processors. Fast Fourier transform column processor, A corresponding row memory for each of the processors and a corresponding column memory for each of the plurality of column processors, the step of performing the two-dimensional fast Fourier transform further comprising: Providing one row of an image frame one after another and one column of a row-transformed frame one after another to each of the plurality of column processors, among the plurality of row memories to be provided The last one of the plurality of columns to be supplied when the row processor corresponding to the first of the row memories to be supplied has completed the Fourier transform into one row of the frame. The last of the memories is provided with a column processor corresponding to the first of the column memories to be supplied to the columns of the row transformed frame. The step of performing a two-dimensional fast Fourier transform on the digitized image, which is supplied when the Fourier transform is completed, further comprises the step of storing the image frame in a first digitized image frame memory, and then a first row transform. Storing the row-converted frame in a frame memory, then storing the row-and-column converted frame in a first row-and-column-converted image frame memory, and storing in the second digitized image frame memory. Storing the second image frame, and then storing the third image frame in the first digitized image frame memory at the same time as supplying the row-converted first frames to the column memory one after another. At the same time as the step of supplying the second image frames to the plurality of row memories one after another, Supplying the row-converted second image frames to the column memory one after another, at the same time as supplying the third image frames to the plurality of row memories one after another; Storing a row-and-column-converted second image frame in a frame memory, storing the row-converted third image frame in the first row-converted frame memory, and then storing the row-converted third image frame. Feeding frames to the plurality of column processors one after another, and then
Storing the row- and column-converted third frame in the first row-and-column-converted image frame memory.