JPH06100893B2 - Active matrix display device - Google Patents

Description

DETAILED DESCRIPTION [Overview] A scan bus line in an active matrix type display device and a data bus line arranged orthogonal to the scan bus line are formed on one and the other of glass substrates, The crossover of the bus lines is eliminated, and the scan bus line and the controlled electrode of the switching element are connected by a wiring having a high resistance value to reduce the spread of the line failure due to the failure of the switching element.

[Industrial application field]

The present invention relates to an active matrix type display device provided with a switching element corresponding to a display element.

Since the active matrix type display device is capable of independently driving the pixels by providing the switching elements corresponding to the display elements, even if the number of lines is increased as the display capacity is increased, the simple matrix type display device is The active matrix type liquid crystal display device, which has an advantage of not causing the deterioration of the image quality due to the reduction of the driving duty ratio as described above and enables full color display by using liquid crystal as a display medium, is often used as a portable television receiver. ing.

In such an active matrix display device, it is not easy to increase the manufacturing yield because it is necessary to form a fine switching element such as a thin film transistor and connect it to a bus line.

[Conventional technology]

FIG. 6 shows an equivalent circuit of a panel of a conventional active matrix type display device, 31 is a thin film transistor (hereinafter referred to as TF
Abbreviated as T), 32 is a gate electrode, 33 is a drain electrode, 3
Reference numeral 4 is a source electrode, 35 is a liquid crystal cell, 36 is a scan bus line, and 37 is a data bus line. The liquid crystal cell 35 is configured by sandwiching liquid crystal as a display medium between a common electrode and a display electrode corresponding to a pixel, the common electrode is shown as ground, and the display electrode is a source electrode of the TFT31. 3
Connected to 4.

In such an active matrix type display device, since the scan bus line 36 and the data bus line 37 are formed orthogonally on the same glass substrate, there is a problem of insulation failure at their intersections. Become. Furthermore, since a step is formed at the intersection, there is a problem of disconnection of the bus line or an increase in resistance value.

Therefore, an active matrix type display device in which the scan bus line and the data bus line are formed on different glass substrates was proposed as Japanese Patent Application No. 60-274011. FIG. 7 shows an equivalent circuit of a panel of such an active matrix type display device, in which a TFT 31, a scan bus line 36, and a display electrode of a liquid crystal cell 35 are formed on one glass substrate which is arranged oppositely. The data bus line 37 is formed as the common electrode of the liquid crystal cell 35 on the other glass substrate. Therefore, the liquid crystal cell 35 is connected between the TFT 31 and the data bus line 37, and the point indicated by the ground is connected to the ground bus line formed in parallel with the scan bus line 36.

In this way, since the scan bus lines 36 and the data bus lines 37 that are arranged orthogonally can be formed on the glass substrates of one and the other that are arranged to face each other, no intersecting portion will occur and the manufacturing yield will be improved. In addition to being able to improve, the driving area ratio can be increased.

The above-mentioned earth bus line and scan bus line are formed in parallel, but an active matrix type display device in which these are integrated is also proposed as Japanese Patent Application No. 61-212696. That is, as shown in the equivalent circuit of FIG.
The gate electrode 32 of the TFT 31 is connected to the scan bus line 36, the drain electrode 33 is connected to the display electrode of the liquid crystal cell 35,
The source electrode 34 is connected to the scan bus line 36 of the adjacent line. Then, the address pulses Vg1, Vg2, ... Are sequentially applied to the scan bus line 36, and the data voltages Vd1, Vd2 ,.

The address pulses Vg1, Vg2 ,. For example, when the potential Vgon is applied to the j-th scan bus line 36 to turn on the TFT 31 connected to the scan bus line 36, j + 1
The potential Vgc is applied to the th scan bus line 36.
Then, when the data voltage Vd is applied to the i-th data bus line 37, a difference between the potential Vgc and the data voltage Vd is generated in the liquid crystal cell 35 at the intersection of the j-th scan bus line and the i-th data bus line. Will be applied. Therefore,
When the potential Vgc is set to 0V, the data voltage Vd applied to the data bus line 37 is applied to the liquid crystal cell 35 and held until the next frame. Therefore, since the earth bus line can be omitted, the drive area ratio can be further increased.

FIG. 9 is an exploded perspective view of the panel shown in FIG. 8, in which the TFT 31, the display electrode 38 of the liquid crystal cell,
Forming the canvas line 36 and the other glass substrate 40
A liquid crystal cell 35 is formed between the display electrode 38 and the data bus line 37 by forming the data bus line 37 on the upper side and sandwiching the liquid crystal between the glass substrates 39 and 40 of one side and the other side. become.

[Problems to be solved by the invention]

In the panel shown in FIG. 7 in which the drawbacks of the conventional example shown in FIG. 6 are improved, the intersection of the scan bus line 36 and the data bus line 37 on the same glass substrate can be eliminated. A ground bus line for connecting the source electrodes 34 to each other will be required.

This earth bus line can be omitted by the configuration shown in FIG. 8 and FIG. 9, but in the TFT 31, there is a poor insulation between the gate electrode 32 and the source electrode 34 due to a pinhole or the like in the gate insulating film. Then, the potentials of the scan bus line to which the gate electrode 32 is connected and the scan bus line to which the source electrode 34 is connected are influenced by each other, resulting in a line-shaped display defect.

It is an object of the present invention to reduce the portion that becomes a display defect even if the TFT 31 fails.

[Means for solving problems]

The active matrix type display device of the present invention will be described with reference to FIG. 1. A scan bus line 1, a switching element 2 such as a TFT, and a display element such as a liquid crystal cell are provided on one glass substrate which is arranged to face each other. And the control electrode 3 of the switching element 2 is connected to the scan bus line 1, one controlled electrode 4 of the switching element 2 is connected to the display electrode 6, and the other controlled electrode 5 is formed. Is connected to the scan bus line 1 of the adjacent line via the wiring 8 having a high resistance value, and the data bus line 7 facing the display electrode 6 is formed on the other glass substrate, and the glass bus between one and the other glass substrate is formed. In addition, a display medium such as a liquid crystal is sandwiched.

[Action]

By connecting the controlled electrode 5 of the switching element 2 and the scan bus line 1 of the adjacent line with the wiring 8 having a high resistance value, the control electrode 3 of the switching element 2 and the controlled electrode 5 are connected. Even if there is an insulation failure, the adjacent scan bus lines are connected via the wiring 8 having a high resistance value, so that the potential between them is less likely to affect each other, and the occurrence of display defects is prevented. can do.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 2 is an explanatory view of an embodiment of the present invention. A sectional view taken along the line AA 'is shown in FIG. 3, a sectional view taken along the line BB' is shown in FIG. Sectional views along the line C'are respectively shown in FIG. In each figure, 10 is a glass substrate, 11 is a scan bus line, 12 is a TFT, 12 is a display electrode, 14 is a drain bus line, 14a is a high resistance wiring, 16 is an amorphous silicon layer, 17 is an insulating layer, G Is a gate electrode, S is a source electrode, and D is a drain electrode.

A part of the display electrode 13 is a source electrode S of the TFT 12, a part of the high resistance wiring 14a is a drain electrode D of the TFT 12, an extension of the scan bus line 11 is a gate electrode G, and a source electrode S and a drain electrode D are provided. Amorphous silicon layer 16 on top
1 and the gate electrode G is formed thereon via the insulating layer 17 to form the stagger type TFT 12. Therefore, the drain electrode D of the TFT 12 and the scan bus line 11 are connected by the high resistance wiring 14a, and the TFT 12
The display electrode 13 is connected to the source electrode S of and the scan bus line 11 is connected to the gate electrode G of the TFT 12.

On the other glass substrate, stripe-shaped data bus lines (see FIG. 1) facing the columns of the display electrodes 13 are formed,
By filling a liquid crystal as a display medium between the data bus line and the display electrode 13, an active matrix type liquid crystal display device is constructed.

FIG. 3 is a sectional view taken along the line AA ′ of FIG.
The point X bent at a right angle of A'is shown by X in FIG.
The scan canvas line portion is composed of the scan bus line 11 formed on the drain bus line 14, and has a double wiring structure as can be seen from FIGS. 4 and 5. In addition, the TFT portion includes an amorphous silicon layer 16 on the source electrode S and the drain electrode D, and an insulating layer 17 on the amorphous silicon layer 16.
And a gate electrode G. Further, the display portion is configured to include the display electrode 13.

To briefly explain an example of the manufacturing method, a transparent metal film of SnO ₂ is formed on the glass substrate 10 to a thickness of 500 Å by vapor deposition or the like. This is a relatively high resistance metal film,
For example, the sheet resistance is 50 KΩ / □. Then, the display electrode 13, the drain bus line 14 and the high resistance wiring 14a are patterned.

Next, the amorphous silicon layer 1 is formed by the plasma CVD method or the like.
6 and the insulating layer 17 are continuously formed. As the insulating layer 17, for example, silicon nitride (SiNx), silicon oxide (SiO ₂ ) or the like can be used. Then, the amorphous silicon layer 16 and the insulating layer 17 are subjected to etching treatment so that they remain only in the frame of the one-dot chain line in FIG.

Next, a metal layer such as aluminum (Al) is formed on the entire surface by vapor deposition to a thickness of 1 to several μm, and the scan bus line 11
And the gate electrode G of its extension is formed by etching. Therefore, the configuration shown in FIGS. 2 to 5 is obtained.

In this case, since a metal layer such as aluminum is not left on the pattern of the high resistance wiring 14a and the display electrode 13, the high resistance wiring 14a has a high resistance due to SnO ₂ .
For example, if the width of this wiring is 10 μm and the length is 200 μm, the resistance value is about 1 MΩ. On the other hand, since the scan bus line 11 is formed of a metal layer such as aluminum, the scan bus line 11 can have a relatively low resistance value. For example, the resistance value between both ends of the scan bus line 11
It can be about 10 KΩ. The resistance value ratio between the high resistance wiring 14a and the scan bus line 11 may be about 1:10 or more.

As described above, when the ratio of the resistance values of the scan bus line 11 and the high resistance wiring 14a is increased, when the insulation failure between the gate electrode G and the drain electrode D of the TFT 12 occurs, the TFT 12 is connected to the gate electrode G. Due to the current flowing through the defective insulation portion between the scan canvas line 11 and the scan bus line 11 connected to the drain electrode D, the fluctuation of the potential of the scan bus line 11 becomes about 1% or less. Only one pixel connected to the defective TFT 12 becomes defective, but it does not become a line-shaped display defect.

Further, the display electrode 13 is composed only of SnO _2, but the resistance value required to charge the electrostatic capacity of the liquid crystal cell within the address period is as follows when the electrostatic capacity of the liquid crystal cell is 1 pF:
It is approximately 10 MΩ, which is a resistance value sufficiently lower than this, so the effect on display characteristics can be ignored.

Although the scan bus line has a double wiring structure, it can also have a single wiring structure. For example, only the high resistance wiring 14a is a high resistance metal film such as SnO _2. It can also be formed by.

〔The invention's effect〕

As described above, according to the present invention, in the active matrix display device of the opposed matrix system, the controlled electrode 5 of the switching element 2 such as TFT and the scan bus line 1 are connected by the high resistance wiring 8. It was done,
Even if there is a switching element 2 with poor insulation, only one pixel corresponding to the switching element 2 is defective, but it is possible to prevent a line-shaped display defect. Further, by setting the thickness of the high resistance wiring 8 to about 500 Å, a part of the wiring is used as the controlled electrode 5 such as the drain electrode D, and when a gate insulating film such as a silicon nitride (SiNx) layer is formed thereon,
Since the step is reduced, the coverage is improved, the withstand voltage of the overlapping portion of the gate and the source / drain of the TFT is increased, and the occurrence of short circuit due to pinholes can be suppressed. Therefore, the manufacturing yield can be significantly improved. In addition, Ta, Mo, Cr, Ni as the electrode material used as the base
It is also possible to use a metal material having a relatively high resistance such as, and the range of selection of the base electrode material is expanded, so that the manufacturing yield can be further improved.

[Brief description of drawings]

1 is an explanatory view of the principle of the present invention, FIG. 2 is an explanatory view of an embodiment of the present invention, FIG. 3 is a sectional view taken along the line AA ′ of FIG. 2, and FIG. 4 is FIG. 5 is a sectional view taken along line BB ′ of FIG.
FIG. 6 is a sectional view taken along the line CC ′ of FIG. 2, FIG. 6 is an equivalent circuit of a conventional panel, FIG. 7 is an equivalent circuit of the previously proposed panel, and FIG. 8 is previously proposed. FIG. 9 is an exploded perspective view of the panel of FIG. 8, which is an equivalent circuit of the other panel. Reference numeral 1 is a scan bus line, 2 is a switching element, 3 is a control electrode, 4 and 5 are controlled electrodes, 6 is a display electrode, 7 is a data bus line, and 8 is a high resistance wiring.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Kazuhiro Takahara Kazuhiro Takahara 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Fujitsu Limited (56) References JP-A-61-250696 (JP, A) JP-A-61-235815 (JP, A)

Claims (1)

[Claims] 1. A scan bus line (1), a switching element (2), and a scan bus line (1) on one of the glass substrates arranged to face each other.
A display electrode (6) of a display element, a control electrode (3) of the switching element (2) is connected to the scan bus line (1), and one controlled electrode (1) of the switching element (2) ( 4) the display electrode (6)
Then, the other controlled electrode (5) is connected to the scan bus line (1) of the adjacent line, and the data bus line (7) facing the display electrode (6) is formed on the other glass substrate, In an active matrix type display device in which a display medium is sandwiched between the one and the other glass substrates, the other controlled electrode (5) of the switching element (2) and the scan bus line (1) The active matrix type display device is characterized in that the spaces are connected by a wiring (8) having a high resistance value.