JPH0594951A - Semiconductor manufacturing equipment and manufacture of semiconductor device using that - Google Patents

Semiconductor manufacturing equipment and manufacture of semiconductor device using that

Info

Publication number
JPH0594951A
JPH0594951A JP25340591A JP25340591A JPH0594951A JP H0594951 A JPH0594951 A JP H0594951A JP 25340591 A JP25340591 A JP 25340591A JP 25340591 A JP25340591 A JP 25340591A JP H0594951 A JPH0594951 A JP H0594951A
Authority
JP
Japan
Prior art keywords
vapor phase
chamber
phase reaction
semiconductor
reaction chamber
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25340591A
Other languages
Japanese (ja)
Inventor
Kenji Yokozawa
賢二 横沢
Shinichi Uchida
伸一 内田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP25340591A priority Critical patent/JPH0594951A/en
Publication of JPH0594951A publication Critical patent/JPH0594951A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To provide a semiconductor manufacturing equipment for growing stably a vapor growth film on semiconductor wafers and the manufacturing method of a semiconductor device, which is performed using the semiconductor manufacturing equipment. CONSTITUTION:A semiconductor manufacturing equipment is provided with a vapor phase reaction chamber 10 for forming a vapor growth film on semiconductor substrates by a vapor phase reaction based on a chemical reaction, a spare chamber 5 for preheating the substrates before the film is formed as well as for cooling the substrates after the film is formed and coupled with the chamber 10 and a transferring chamber 4 for transferring the substrates to the chamber 5.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、特にMOS(金属−二
酸化シリコン−半導体)型半導体装置を安定かつ制御性
良くしかも大量に製造することを可能にする半導体製造
装置およびそれを用いた半導体装置の製造方法に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing apparatus capable of manufacturing a MOS (metal-silicon dioxide-semiconductor) type semiconductor device with stability, controllability, and mass production, and a semiconductor device using the same. Manufacturing method.

【0002】[0002]

【従来の技術】以下従来の半導体製造装置について説明
する。
2. Description of the Related Art A conventional semiconductor manufacturing apparatus will be described below.

【0003】図4は従来の半導体製造装置の概略断面構
成図である。図4において、2はシリコンウエハを収納
したウエハカセット、6は気相成長膜を形成する際にシ
リコンウエハを載置する石英ボート、9は石英ボート6
を上下させるためのフランジ付きエレベータ、10は気
相反応室、11は気相反応室10の内部を加熱するヒー
ター、13は気相反応室10の内部を減圧する真空引き
用ポンプ、14はシリコンウエハをウエハカセット2か
ら石英ボート6へ移載するウエハ移載機である。
FIG. 4 is a schematic cross-sectional configuration diagram of a conventional semiconductor manufacturing apparatus. In FIG. 4, 2 is a wafer cassette containing a silicon wafer, 6 is a quartz boat on which a silicon wafer is placed when forming a vapor phase growth film, and 9 is a quartz boat 6
With a flange for moving up and down, 10 is a gas phase reaction chamber, 11 is a heater for heating the inside of the gas phase reaction chamber 10, 13 is a vacuum pump for depressurizing the inside of the gas phase reaction chamber 10, and 14 is silicon This is a wafer transfer machine that transfers wafers from the wafer cassette 2 to the quartz boat 6.

【0004】以上のように構成された半導体製造装置を
用いて減圧気相成長工程を行った例について、図4の概
略断面構成図および図5(a)〜(j)に示すフローチ
ャートを参照しながら説明する。なお図5の右側には参
考までに気相反応室10内の温度を示したが、従来の半
導体製造装置では全工程にわたって一定温度(例えば、
多結晶シリコン膜の形成では600℃)に保持されてい
る。
An example of performing the reduced pressure vapor phase growth process using the semiconductor manufacturing apparatus configured as described above will be described with reference to the schematic sectional view of FIG. 4 and the flow charts shown in FIGS. 5 (a) to 5 (j). While explaining. Although the temperature in the gas phase reaction chamber 10 is shown on the right side of FIG. 5 for reference, in the conventional semiconductor manufacturing apparatus, a constant temperature (for example,
The temperature is kept at 600 ° C. in the formation of the polycrystalline silicon film.

【0005】まず最初は図5(a)の工程で、気相反応
室10の内部は温度が600℃で大気圧である。次に図
5(b)の工程で、シリコンウエハをウエハカセット2
から石英ボート6へ移載するのであるが、この時はフラ
ンジ付きエレベータ9が気相反応室10の下の部屋に下
がっている。次に図5(c)の工程で、石英ボート6を
気相反応室10へ移動させ、気相反応室10の内部を密
閉する。次に図5(d)の工程で、真空引き用ポンプ1
3により気相反応室10の内部を減圧する。次に図5
(e)の工程で、気相反応室10へ必要な反応ガスを導
入し、シリコンウエハの表面に気相成長膜を形成する。
次に図5(f)の工程で、気相反応室10の内部の残留
反応ガスを真空引き用ポンプ13で排出し、図5(g)
の工程で、気相反応室10内へ不活性ガスを導入し、内
部の雰囲気を置換する。次に図5(h)の工程で、気相
反応室10の内部を大気圧に戻し、フランジ付きエレベ
ータ9を下げ、図5(i)の工程で、ウエハ移載機14
を用いてシリコンウエハを石英ボート6からウエハカセ
ット2へ戻し、図5(j)の工程で、ウエハカセット2
を取り出して1回の減圧気相成長工程が終了する。この
間、気相反応室10の内部はヒーター11で加熱され、
一定温度に保持されている。
First, in the step of FIG. 5 (a), the temperature inside the gas phase reaction chamber 10 is 600 ° C. and atmospheric pressure. Next, in the step of FIG. 5B, the silicon wafer is placed in the wafer cassette 2.
Is transferred to the quartz boat 6, but at this time, the flanged elevator 9 is lowered to the room below the gas phase reaction chamber 10. Next, in the step of FIG. 5C, the quartz boat 6 is moved to the gas phase reaction chamber 10 and the inside of the gas phase reaction chamber 10 is sealed. Next, in the step of FIG. 5D, the vacuum pump 1
The inside of the gas phase reaction chamber 10 is decompressed by 3. Next in FIG.
In step (e), a necessary reaction gas is introduced into the vapor phase reaction chamber 10 to form a vapor phase growth film on the surface of the silicon wafer.
Next, in the step of FIG. 5F, the residual reaction gas inside the gas phase reaction chamber 10 is exhausted by the vacuum pump 13 and the process shown in FIG.
In the step, an inert gas is introduced into the gas phase reaction chamber 10 to replace the atmosphere inside. Next, in the process of FIG. 5H, the inside of the gas phase reaction chamber 10 is returned to atmospheric pressure, the elevator 9 with the flange is lowered, and in the process of FIG.
The silicon wafer is returned from the quartz boat 6 to the wafer cassette 2 by using the, and in the process of FIG.
Is taken out, and one reduced pressure vapor phase growth process is completed. During this time, the inside of the gas phase reaction chamber 10 is heated by the heater 11,
It is kept at a constant temperature.

【0006】[0006]

【発明が解決しようとする課題】しかしながら上記の従
来の構成では、気相成長膜を形成した後シリコンウエハ
を取り出すために気相反応室内を大気圧に戻している
が、そのために気相反応室内の内壁に堆積した反応生成
物がガスを吸着し、次の真空引きにおいて十分な真空度
を得ることができず、さらに減圧気相成長工程を繰り返
し実施した場合、気相反応室の内壁に堆積した反応生成
物に吸着された残留ガスの影響により目標とする到達真
空度が得られなくなるという課題を有していた。その結
果、異常反応や塵埃粒子の発生等の問題が生ずる上、成
膜条件が一定しないために減圧気相成長工程における安
定性に問題を生じ、半導体装置の性能や、その製造工程
における収率に大きな影響を与えている。
However, in the above conventional structure, the atmospheric pressure of the vapor phase reaction chamber is returned to atmospheric pressure in order to take out the silicon wafer after forming the vapor phase growth film. When the reaction product deposited on the inner wall of the chamber adsorbs gas and a sufficient degree of vacuum cannot be obtained in the next evacuation, when the reduced pressure vapor phase growth process is repeated, the reaction product is deposited on the inner wall of the vapor phase reaction chamber. There is a problem that the target ultimate vacuum cannot be obtained due to the influence of the residual gas adsorbed on the reaction product. As a result, problems such as abnormal reaction and generation of dust particles occur, and since the film forming conditions are not constant, there arises a problem in stability in the reduced pressure vapor phase growth process, and the performance of the semiconductor device and the yield in the manufacturing process thereof are increased. Has a great influence on.

【0007】また、半導体装置のパターンの微細化に伴
いシリコンウエハ上の段差が大きくなり、特にシリコン
ウエハとの接続孔には何等かの方法で導電体を埋め込む
ことが必要になっている。例えば、減圧気相成長装置に
よって多結晶シリコンを接続孔に埋め込む場合、通常シ
リコンウエハを気相反応室内に投入する時には、酸化膜
の成長を防止するために気相反応室内の温度は気相反応
に必要な温度に比べ低く制御されており、その後気相反
応室内を真空引きし、気相反応室内を所定の気相反応に
必要な温度に昇温し目的とする多結晶シリコン膜を堆積
していた。このように従来の減圧気相成長装置では昇
温、降温に時間がかかる上、酸化膜の成長を完全には抑
制することができないという課題を有していた。
Further, as the pattern of the semiconductor device becomes finer, the step on the silicon wafer becomes larger, and it is particularly necessary to bury a conductor in the connection hole with the silicon wafer by some method. For example, when polycrystalline silicon is embedded in a connection hole by a low pressure vapor phase growth apparatus, when the silicon wafer is put into the vapor phase reaction chamber, the temperature in the vapor phase reaction chamber is usually set to prevent the growth of an oxide film. The temperature is controlled to be lower than the temperature required for the vapor phase reaction chamber. Was there. As described above, the conventional reduced pressure vapor phase growth apparatus has a problem that it takes time to raise and lower the temperature and the growth of the oxide film cannot be completely suppressed.

【0008】本発明は上記の従来の課題を解決するもの
で、半導体基板の上に気相成長膜を安定して成長させる
ための半導体製造装置とそれを用いた半導体装置の製造
方法を提供することを目的とする。
The present invention solves the above conventional problems, and provides a semiconductor manufacturing apparatus for stably growing a vapor phase growth film on a semiconductor substrate and a semiconductor device manufacturing method using the same. The purpose is to

【0009】[0009]

【課題を解決するための手段】この目的を達成するため
に本発明の半導体製造装置は、化学反応に基づく気相反
応で気相成長膜を半導体基板の上に形成する気相反応室
と、気相成長膜を形成する前に半導体基板を予熱し気相
成長膜を形成後に半導体基板を冷却するための気相反応
室に連結した予備室と、半導体基板を予備室へ移載する
ための移載室とを備えた構成を有している。
To achieve this object, a semiconductor manufacturing apparatus of the present invention comprises a vapor phase reaction chamber for forming a vapor phase growth film on a semiconductor substrate by a vapor phase reaction based on a chemical reaction, A preliminary chamber connected to the vapor phase reaction chamber for preheating the semiconductor substrate before forming the vapor phase growth film and cooling the semiconductor substrate after forming the vapor phase growth film, and for transferring the semiconductor substrate to the preliminary chamber And a transfer chamber.

【0010】[0010]

【作用】この構成によって、減圧気相成長工程において
半導体基板の表面に酸化膜が形成されることを防止で
き、かつ気相反応室内を大気圧に戻すことなく、目的と
する気相成長膜を堆積した半導体基板を取り出すことが
可能となる。また気相反応室が大気中に戻されないた
め、気相反応室内における反応生成物や側壁に大気中の
ガスが吸着されることがなく、到達真空度を安定に確保
できる。
With this structure, it is possible to prevent the formation of an oxide film on the surface of the semiconductor substrate during the reduced pressure vapor phase growth process, and to return the target vapor phase growth film to the atmospheric pressure inside the vapor phase reaction chamber. It is possible to take out the deposited semiconductor substrate. Further, since the gas phase reaction chamber is not returned to the atmosphere, the reaction product in the gas phase reaction chamber and the gas in the atmosphere are not adsorbed to the side wall, and the ultimate vacuum can be stably secured.

【0011】またこのような半導体製造装置を使用する
ことにより、連続して減圧気相成長工程を実施しても安
定した装置の状態を維持することができるため、得られ
た気相成長膜の特性が安定しており、このような気相成
長膜を用いた半導体装置では性能が向上し、さらに製造
工程における収率の低下などの問題を解決でき、かつ量
産性にも優れた製造方法を実現できる。
Further, by using such a semiconductor manufacturing apparatus, it is possible to maintain a stable state of the apparatus even after continuously carrying out the reduced pressure vapor phase growth step, and thus the obtained vapor phase growth film is formed. A manufacturing method that has stable characteristics, has improved performance in a semiconductor device using such a vapor phase growth film, can solve problems such as a decrease in yield in the manufacturing process, and is excellent in mass productivity. realizable.

【0012】[0012]

【実施例】以下本発明の一実施例について、図面を参照
しながら説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

【0013】図1は本発明の一実施例における半導体製
造装置の概略断面構成図である。図1において、1は第
1の後述の移載室4と外部との間を仕切っているゲート
ドア、2はウエハカセット、3は後述の移載室4の内部
を真空引きする第1の真空引き用ポンプ、4は移載室、
5は予備室、6は石英ボート、7は移載室4側に設けら
れた移載室4と予備室5との間を仕切っているゲートド
ア、8は予備室5の中でシリコンウエハを加熱するラン
プヒーター、9はフランジ付きエレベータ、10は気相
反応室、11は気相反応室10の内部を加熱するヒータ
ー、12は予備室5の内部を真空引きする第2の真空引
き用ポンプ、13は気相反応室10の内部を真空引きす
る第3の真空引き用ポンプ、14はシリコンウエハを移
載するウエハ移載機である。図1において、気相反応室
10は常に減圧状態に保たれており、必要に応じて目的
とする気相成長膜を形成するための反応ガスを導入し、
シリコンウエハの上に所定の気相成長膜を堆積する。ま
た予備室5も常に減圧状態に保たれており、例えばラン
プヒーター8を用いてシリコンウエハを真空加熱するこ
とができる。また移載室4では、ウエハ移載機14を使
用してシリコンウエハをウエハカセット2から石英ボー
ト6へ、またはその逆に移しかえる作業が行われ、ウエ
ハカセット2を外部から挿入した直後に第1の真空引き
用ポンプ3を用いて真空状態にされる。
FIG. 1 is a schematic sectional view of a semiconductor manufacturing apparatus according to an embodiment of the present invention. In FIG. 1, 1 is a gate door partitioning a first transfer chamber 4 described below from the outside, 2 is a wafer cassette, and 3 is a first vacuum evacuation that vacuums the inside of the transfer chamber 4 described later. Pump, 4 is a transfer room,
5 is a spare chamber, 6 is a quartz boat, 7 is a gate door provided on the transfer chamber 4 side to partition the transfer chamber 4 from the spare chamber 5, and 8 is a silicon wafer in the spare chamber 5. Lamp heater, 9 is a flanged elevator, 10 is a gas phase reaction chamber, 11 is a heater for heating the inside of the gas phase reaction chamber 10, 12 is a second vacuum pump for evacuating the inside of the auxiliary chamber 5, Reference numeral 13 is a third vacuum pump for vacuuming the inside of the gas phase reaction chamber 10, and 14 is a wafer transfer machine for transferring a silicon wafer. In FIG. 1, the vapor phase reaction chamber 10 is always kept in a depressurized state, and if necessary, a reaction gas for forming a target vapor phase growth film is introduced,
A predetermined vapor deposition film is deposited on a silicon wafer. Also, the preliminary chamber 5 is always kept in a depressurized state, and the silicon wafer can be vacuum-heated by using, for example, the lamp heater 8. In the transfer chamber 4, the wafer transfer machine 14 is used to transfer the silicon wafer from the wafer cassette 2 to the quartz boat 6 or vice versa, and immediately after the wafer cassette 2 is inserted from the outside. A vacuum state is obtained using the vacuum pump 3 of No. 1.

【0014】以上のように構成された半導体製造装置を
用いて減圧気相成長工程として多結晶シリコン膜を形成
する例について、図1の概略断面構成図および図2
(a)〜(m)に示すフローチャートを参照しながら説
明する。なお図2には気相反応室10の内部の温度と予
備室5の内部の温度を示したが、気相反応室10の内部
は600℃一定、予備室4の内部はウエハを加熱すると
きのみ300℃で、その他の時は室温程度である。
An example of forming a polycrystalline silicon film as a low pressure vapor phase growth step using the semiconductor manufacturing apparatus configured as described above is shown in a schematic sectional view in FIG. 1 and FIG.
This will be described with reference to the flowcharts shown in (a) to (m). 2 shows the internal temperature of the vapor phase reaction chamber 10 and the internal temperature of the preliminary chamber 5, the internal temperature of the vapor phase reaction chamber 10 is kept constant at 600 ° C., and the internal temperature of the preliminary chamber 4 is when the wafer is heated. Only at 300 ° C., at room temperature at other times.

【0015】まず最初、図2(a)に示すように、気相
反応室10の内部は温度が600℃、予備室5の温度は
室温である。次に図2(b)の工程で、移載室4の内部
を大気圧に戻し、ゲートドア1を開け、シリコンウエハ
を積載したウエハカセット2を移載室4の所定の位置に
セットする。次に図2(c)の工程で、ゲートドア1を
閉め、第1の真空引き用ポンプ3を用いて移載室4の内
部の真空引きを行う。次に図2(d)の工程で、目標と
する真空度が得られた時点で、移載室4と予備室5の間
にあるゲートドア7を開け、予備室5内に降りてきてい
る石英ボート6にウエハ移載機14を用いてシリコンウ
エハを移す。シリコンウエハの移載が終了した時点でゲ
ートドア7を閉め、図2(e)の工程で、ランプヒータ
ー8を用いて予備室5内のシリコンウエハを予備加熱す
る。なお、この時の温度は200℃〜400℃である。
次に図2(f)の工程で、予備室5内にあるシリコンウ
エハを積載した石英ボート6をフランジ付きエレベータ
9で気相反応室10に移動させる。なお、気相反応室1
0内の温度は、例えば600℃に保持されている。次に
図2(g)の工程で、シラン(SiH4)ガスを気相反
応室10へ導入し、化学反応に基づく気相成長法によっ
て多結晶シリコン膜を成長させる。次に所定の膜厚が得
られた時点すなわち工程(h)で、反応ガスであるシラ
ンガスを遮断する。次に図2(i)の工程で、反応ガス
の遮断と同時に気相反応室10内の残留ガスを第3の真
空引き用ポンプ13を用いて排気する。次に図2(j)
の工程で、気相反応室10内のシリコンウエハを積載し
た石英ボート6をフランジ付きエレベータ9で下降させ
予備室5に戻して冷却する。ある程度冷却された時点
で、移載室4と予備室5の間にあるゲートドア7を開
け、図2(k)の工程で予備室5の石英ボート6に積載
されているシリコンウエハを移載室4のカセット2に移
す。次に図2(l)の工程で、ゲートドア7を閉め、移
載室4を大気圧に戻す。次に図2(m)の工程で、移載
室4が大気圧に戻った時点でゲートドア1を開け、ウエ
ハカセット2からシリコンウエハを取り出し、一連の工
程が終了する。
First, as shown in FIG. 2 (a), the temperature inside the gas phase reaction chamber 10 is 600 ° C., and the temperature in the preliminary chamber 5 is room temperature. Next, in the step of FIG. 2B, the inside of the transfer chamber 4 is returned to atmospheric pressure, the gate door 1 is opened, and the wafer cassette 2 loaded with silicon wafers is set at a predetermined position in the transfer chamber 4. Next, in the step of FIG. 2C, the gate door 1 is closed, and the inside of the transfer chamber 4 is evacuated using the first evacuation pump 3. Next, in the step of FIG. 2D, when the target degree of vacuum is obtained, the gate door 7 between the transfer chamber 4 and the spare chamber 5 is opened, and the quartz descending into the spare chamber 5 is opened. The silicon wafer is transferred to the boat 6 by using the wafer transfer device 14. When the transfer of the silicon wafer is completed, the gate door 7 is closed, and the silicon wafer in the auxiliary chamber 5 is preheated using the lamp heater 8 in the process of FIG. The temperature at this time is 200 ° C to 400 ° C.
Next, in the step of FIG. 2F, the quartz boat 6 loaded with the silicon wafers in the preliminary chamber 5 is moved to the gas phase reaction chamber 10 by the flanged elevator 9. The gas phase reaction chamber 1
The temperature within 0 is maintained at 600 ° C., for example. Next, in the step of FIG. 2G, a silane (SiH 4 ) gas is introduced into the vapor phase reaction chamber 10 to grow a polycrystalline silicon film by a vapor phase growth method based on a chemical reaction. Next, when the predetermined film thickness is obtained, that is, in step (h), the silane gas as the reaction gas is shut off. Next, in the step of FIG. 2I, the residual gas in the gas phase reaction chamber 10 is exhausted using the third vacuum pump 13 at the same time as the reaction gas is shut off. Next, FIG. 2 (j)
In the process (1), the quartz boat 6 loaded with the silicon wafers in the gas phase reaction chamber 10 is lowered by the flanged elevator 9 and returned to the preliminary chamber 5 to be cooled. When cooled to some extent, the gate door 7 between the transfer chamber 4 and the spare chamber 5 is opened, and the silicon wafer loaded on the quartz boat 6 in the spare chamber 5 in the process of FIG. Transfer to cassette 2 of 4. 2 (l), the gate door 7 is closed and the transfer chamber 4 is returned to atmospheric pressure. Next, in the step of FIG. 2 (m), when the transfer chamber 4 returns to atmospheric pressure, the gate door 1 is opened, the silicon wafer is taken out from the wafer cassette 2, and a series of steps is completed.

【0016】本実施例の半導体製造装置を用い、図2に
示すフローチャートで気相成長膜を形成した場合の異物
発生について、以下に説明する。
The generation of foreign matter when the vapor phase growth film is formed using the semiconductor manufacturing apparatus of this embodiment according to the flow chart shown in FIG. 2 will be described below.

【0017】図3は気相成長膜形成の回数と半導体基板
の上の単位面積当りの異物数との関係を示す図である。
図3の白丸で示すように、従来の半導体製造装置を用い
た製造方法では気相成長膜形成開始3回目以降で0.3
μm以上の異物が50ケ〜100ケの範囲にあるのに対
して、本実施例の半導体製造装置を用いた製造方法では
気相成長膜形成開始3回目以降で異物が20ケ前後と安
定している。
FIG. 3 is a diagram showing the relationship between the number of vapor phase growth film formations and the number of foreign particles per unit area on the semiconductor substrate.
As shown by the white circles in FIG. 3, in the manufacturing method using the conventional semiconductor manufacturing apparatus, 0.3% is obtained after the third vapor deposition film formation start.
In contrast to the range of 50 to 100 foreign particles having a size of μm or more, in the manufacturing method using the semiconductor manufacturing apparatus of this embodiment, the foreign particles are stable at around 20 after the third vapor phase growth film formation start. ing.

【0018】[0018]

【発明の効果】以上のように本発明は、気相反応で気相
成長膜を半導体基板の上に形成する工程において使用す
るもので、気相反応室と、気相成長膜を形成する前に半
導体基板を予熱し気相成長膜を形成後に半導体基板を冷
却するための気相反応室に連結した予備室と、半導体基
板を予備室へ移載するための移載室とを備えた構成によ
り気相反応室内での異常成長や、塵埃粒子等の異物の発
生を抑え、安定した気相成長膜を形成することのできる
優れた半導体製造装置およびそれを用いた半導体装置の
製造方法を実現することができるものである。
INDUSTRIAL APPLICABILITY As described above, the present invention is used in the step of forming a vapor phase growth film on a semiconductor substrate by a vapor phase reaction, and before forming the vapor phase reaction chamber and the vapor phase growth film. And a transfer chamber for transferring the semiconductor substrate to the spare chamber, the spare chamber being connected to the vapor phase reaction chamber for cooling the semiconductor substrate after preheating the semiconductor substrate and forming the vapor phase growth film Realizes an excellent semiconductor manufacturing device that can suppress the abnormal growth in the vapor phase reaction chamber and the generation of foreign matter such as dust particles, and form a stable vapor phase growth film, and a semiconductor device manufacturing method using the same. Is what you can do.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例における半導体製造装置の概
略断面構成図
FIG. 1 is a schematic cross-sectional configuration diagram of a semiconductor manufacturing apparatus according to an embodiment of the present invention.

【図2】(a)〜(m)は同半導体製造装置を用いた製
造工程のフローチャート
2A to 2M are flowcharts of manufacturing steps using the same semiconductor manufacturing apparatus.

【図3】気相成長膜形成の回数と半導体基板の上の単位
面積当りの異物数との関係を示す図
FIG. 3 is a diagram showing the relationship between the number of vapor phase growth film formations and the number of foreign particles per unit area on a semiconductor substrate.

【図4】従来の半導体製造装置の概略断面構成図FIG. 4 is a schematic sectional configuration diagram of a conventional semiconductor manufacturing apparatus.

【図5】(a)〜(j)は同半導体製造装置を用いた製
造工程のフローチャート
5A to 5J are flowcharts of manufacturing steps using the semiconductor manufacturing apparatus.

【符号の説明】[Explanation of symbols]

4 移載室 5 予備室 10 気相反応室 4 Transfer room 5 Preliminary room 10 Gas phase reaction room

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 化学反応に基づく気相反応で気相成長膜
を半導体基板の上に形成する気相反応室と、気相成長膜
を形成する前に半導体基板を予熱し気相成長膜を形成後
に半導体基板を冷却するための前記気相反応室に連結し
た予備室と、前記半導体基板を予備室へ移載するための
移載室とを備えた半導体製造装置。
1. A vapor phase reaction chamber for forming a vapor phase growth film on a semiconductor substrate by a vapor phase reaction based on a chemical reaction, and preheating the semiconductor substrate before forming the vapor phase growth film. A semiconductor manufacturing apparatus comprising: a preliminary chamber connected to the vapor phase reaction chamber for cooling the semiconductor substrate after formation, and a transfer chamber for transferring the semiconductor substrate to the preliminary chamber.
【請求項2】 気相反応室、予備室および移載室が全て
独立して真空引きが可能なことを特徴とする請求項1記
載の半導体製造装置。
2. The semiconductor manufacturing apparatus according to claim 1, wherein the vapor phase reaction chamber, the preliminary chamber and the transfer chamber can all be independently evacuated.
【請求項3】 気相反応室、予備室および移載室が全て
独立して温度制御が可能なことを特徴とする請求項1ま
たは2記載の半導体製造装置。
3. The semiconductor manufacturing apparatus according to claim 1, wherein the vapor phase reaction chamber, the preliminary chamber and the transfer chamber are all independently temperature controllable.
【請求項4】 気相反応室、予備室および移載室が全て
独立して不活性ガスの導入が可能なことを特徴とする請
求項1、2または3記載の半導体製造装置。
4. The semiconductor manufacturing apparatus according to claim 1, 2 or 3, wherein the vapor phase reaction chamber, the preliminary chamber and the transfer chamber can all independently introduce an inert gas.
【請求項5】 減圧気相成長工程において請求項1、
2、3または4記載の半導体製造装置を用いて半導体基
板の上に気相成長膜を形成することを特徴とする半導体
装置の製造方法。
5. The reduced pressure vapor phase growth step according to claim 1,
A method for manufacturing a semiconductor device, which comprises forming a vapor phase growth film on a semiconductor substrate by using the semiconductor manufacturing device described in 2, 3, or 4.
JP25340591A 1991-10-01 1991-10-01 Semiconductor manufacturing equipment and manufacture of semiconductor device using that Pending JPH0594951A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25340591A JPH0594951A (en) 1991-10-01 1991-10-01 Semiconductor manufacturing equipment and manufacture of semiconductor device using that

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25340591A JPH0594951A (en) 1991-10-01 1991-10-01 Semiconductor manufacturing equipment and manufacture of semiconductor device using that

Publications (1)

Publication Number Publication Date
JPH0594951A true JPH0594951A (en) 1993-04-16

Family

ID=17250926

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25340591A Pending JPH0594951A (en) 1991-10-01 1991-10-01 Semiconductor manufacturing equipment and manufacture of semiconductor device using that

Country Status (1)

Country Link
JP (1) JPH0594951A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021181685A1 (en) * 2020-03-13 2021-09-16 株式会社Kokusai Electric Substrate processing device, heating device, and method for manufacturing semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021181685A1 (en) * 2020-03-13 2021-09-16 株式会社Kokusai Electric Substrate processing device, heating device, and method for manufacturing semiconductor device
TWI778530B (en) * 2020-03-13 2022-09-21 日商國際電氣股份有限公司 Substrate processing apparatus, heating apparatus, and manufacturing method of semiconductor device

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