JPH0583557A - Image processor - Google Patents

Abstract

PURPOSE:To provide the image processor by an error distributing method reducing the scale of a hardware comparing with the conventional device. CONSTITUTION:This image processor is equipped with a register 2 to store the processed result of a picture element preceding to an objective picture element and a computing element 3 to add a value weighting the processing result of a picture element preceding to the objective picture element for 1H stored in a line memory 4, a value weighting the processed result of a picture element preceding to the objective picture element for (1H+1) and a value weighting the value of the register 2 to the value of the objective picture element, to binarize the added value and to output difference between the added value and the binarized value, and the output of the binarized value from the computing element 3 is defined as an output image.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus using pseudo gradation expression for generating a binarized image closer to an original image.

[0002]

2. Description of the Related Art In recent years, an image processing apparatus using the error distribution method generates a binarized image closer to an original image as compared with a simple binarization method such as a fixed threshold method. It is used for pre-processing etc. of reading by the scanner. The error distribution method will be briefly described here.
By allocating the error due to binarization to the surrounding pixels, the error is absorbed by the surrounding pixels. An image processing apparatus relating to the conventional error distribution method will be described below (image processing by C language Shokoido Takeshi Yasuiin).

FIG. 4 is a block diagram of an image processing apparatus using a conventional error distribution method. An image memory 8 stores original image data. Reference numeral 9 is an arithmetic unit for binarizing and calculating an error value which is a difference between the input image and the output image. Reference numeral 10 is a line memory of two lines for distributing error values.

FIG. 5 is a flowchart showing an algorithm of a conventional image processing apparatus. The configuration of the image processing apparatus in FIG. 4 will be described below according to the flowchart in FIG. In this description, the image data is a value from 0 to 255 (8-bit data), and the binarization is a binary value of 255 and 0. The threshold value is 127. 51 in FIG. 5 is a column address m and a row address n in the image memory of FIG.
(Hereinafter, this is referred to as address A _mn .) And the target pixel value stored in the line memory of FIG. 4 or the address A _m0 or A _m1 (when the head of the row address in the image memory is 0, the image If the row address in memory is even, A _m0 ,
If it is an odd number, the error value stored in A _m1 ) is read into the arithmetic unit 9 of FIG. 4 and added to calculate the error addition value, and the value obtained by subtracting the threshold value from the result is positive or negative. This is a step of determining whether or not. For example, when the additional error value is 260, the threshold value is 127, and it is determined to be positive, and when the additional error value is 40, it is determined to be negative.

Next, the error value stored in the line memory described above will be described. FIG. 6 illustrates the error value stored in the line memory. Reference numeral 11 in FIG. 6 shows the vicinity of the head address of the image memory 8 in FIG. 4, and reference numeral 12 shows the line memory 10 in FIG. In the image memory 11 of FIG. 6, A is image data at address A ₀₀ , B is image data at address A ₁₀ , C is image data at address A ₀₁ , and D is image data at address A _11. ..

In step 61, first, it is considered that the address A _{00 of the} image memory, that is, the image data A is read into the arithmetic unit 9 of FIG. 4 and binarized. For example, if A is 200, binarization with the threshold value 127 results in a binarization result of 255, which is an overestimation of 55, and the error is absorbed by allocating −55 to surrounding pixels. You can That is, −55 is an error. On the contrary, when A is 40, if the threshold value 127 is binarized, the binarization result becomes 0, which means that 40 is underestimated. If 40 is distributed to the surrounding pixels, the error is absorbed. be able to.
That is, 40 is an error. Now, the error generated by binarizing _A is E _A. Next, the address A ₁₀ of the line memory write E _A × 3/8, the address A ₁₁ of the line memory write E _A × 2/8, writes E _A × 3/8 to address A ₀₁ of the line memory , Distribute the error around.

In step 62, first, the address A _{10 of the} image memory, that is, the image data B and the address A of the line memory are used.
_The error value E _A × 3/8 stored in ₁₀ is read into the arithmetic unit 9 of FIG. 4 and added to calculate the error addition value.

Next, as in step 61, binarization is performed and 2
An error value E _B generated by binarization to allocate the surrounding pixels, the line memory of the address A ₂₀ to write the E _B × 3/8, writes the E _B × 2/8 to address A _21, address A ₁₁ Write the value that is the sum of the value already stored and E _B × 3/8.

In step 63, first, the address A _{01 of the} image memory, that is, the image data C and the address A of the line memory.
_The error value E _A × 3/8 stored in ₀₁ is read into the arithmetic unit 9 of FIG. 4 and added to calculate the error addition value. Then, in the same manner as in step 61, in order to binarize and distribute the error value E _C generated by binarization to the surrounding pixels, the value already stored in the address A _{11 of the} line memory and E _C × 3/8 Write the result of adding and write E _C × _3/8 to address A ₀₀
And write E _C × 3/8 to address A ₁₀ .

If such scanning is performed for all pixels in the image memory, the error distributed from the surroundings, which is added to the address A _{mn of the} image memory, becomes the address A _m0 or A _m1 (in the image memory) of the line memory. If the head of the row address is 0, it is stored in A _m0 if the row address in the image memory is even, and in A _m1 if it is odd.

Further, the step 52 means that when the step 51 is positive, the arithmetic unit 9 of FIG. 4 outputs 255 as a result of the binarization, and when the step 51 is negative, the binary value is obtained. This is a step in which the arithmetic unit 9 of FIG. 4 outputs 0 as a result of the conversion. The output binarization result is stored in the address A _mn of the image memory in FIG.

Next, step 53 is a step of calculating an error due to the binarization performed in steps 51 and 52. If the calculation result of step 51 is positive, the calculator of FIG. Image memory address A _mn ) +
Error value (line memory address A _m0 or A _m1 ) −
255 "to obtain the error value of the target pixel value, and when the calculation result of step 51 is negative," the calculator of FIG. 4 calculates the target pixel value (address A _mn ) + error value-0 ". , Get the error value of the target pixel value.

Step 54 is the address A on the line memory when the row address n in the image memory is an even number.
_{(m + 1) 0} to "address A _{(m + 1) 0} is stored in the data +
Write the error value of the target pixel x 3/8 ", and then write the error value of the target pixel x 2 to the address A _{(m + 1) 1} on the line memory.
/ 8 "is written, and the address A on the line memory is written.
Write “error value of target pixel × _3/8 ” in _m1 . Also,
If the row address n in the image memory is odd, the address of the line memory A _{(m + 1) 1} to "address A _{(m + 1)} error values of the current data + target pixel stored in ₁ × 3 / 8 "is written," Error value of target pixel x _2/8 "is written to address A _{(m + 1) 0} on the line memory, and" Error value of target pixel x 3 is written to address A _m0 on the line memory. / 8 "
Is the step of writing.

An image processing apparatus according to the conventional error distribution method performs the above steps 51 to 54 over the entire image by changing the address A _mn in the image memory.

[0015]

However, the above-mentioned conventional configuration has a problem that two lines of line memory are required and the hardware scale becomes large.

An object of the present invention is to solve the above-mentioned conventional problems, and an object thereof is to provide an image processing apparatus in which the hardware scale can be reduced and the processing result is similar to that of the conventional example.

[0017]

In order to achieve this object, an image processing apparatus of the present invention allocates an error value, which is a difference between an output image and an input image, which occurs when binarizing an input image, to surrounding pixels. An image processing apparatus using an error distribution method for preventing deterioration of an output image, which includes a line memory for raster-scanning an input image and holding an error value corresponding to a processing result of a target pixel by 1H and one of the target pixel A register for storing the processing result of the previous pixel, a value obtained by weighting the target pixel value with the processing result of the pixel 1H before the target pixel stored in the line memory, and the pixel of (1H + 1) before the target pixel And a calculator for adding a value obtained by weighting the processing result and a value obtained by weighting the value of the register, binarizing the added value, and outputting a difference between the added value and the binarized value. , The binarization of the computing unit Has characteristics such that the output of the output image.

[0018]

With this configuration, in the conventional example, two lines of line memory were required to realize the image processing device by the error distribution method, but in the image processing device by the error distribution method of the present invention, a line memory of one line is used. It can be realized by one register.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of an image processing apparatus using an error distribution method according to an embodiment of the present invention. An image memory 1 stores the current image. Two
Is a register for storing the error value of the target pixel one pixel before. Reference numeral 3 is an arithmetic unit for binarizing and calculating an error value which is a difference between the input image and the output image. 4 outputs the error value 1
A line memory for lines.

FIG. 2 is a flow chart showing the algorithm of the image processing apparatus in one embodiment of the present invention. The configuration of the image processing apparatus in FIG. 1 will be described below with reference to the flowchart in FIG. In this description, the image data is 0
Up to 255 (8-bit data), and binarization is 2
It is a binary value of 55 and 0. The threshold value is 127. An arbitrary address is a column address m and a row address n (hereinafter referred to as A _mn ).

Step 21 in FIG. 2 means that the image data (hereinafter, image data is referred to as a) from the address A _mn of the image memory 1 shown in FIG.

The step 22 in FIG. 2 is the pixel (address A _m) that has the same column address and the previous row address as the target pixel address stored in the address A _m0 of the line memory 4 in FIG. _This is a step of reading the error value of _(n-1) ) into the arithmetic unit 3 of FIG. 1 and multiplying by 3/8 (hereinafter, the value of the multiplied result is referred to as b).

Next, the error value stored in the line memory described here will be described. FIG. 3 is a diagram for explaining the error value stored in the line memory. 5 shows the vicinity of the start address of the image memory shown in FIG. Reference numeral 6 is a line memory for one line shown in FIG. Reference numeral 7 is a register that stores an error value one pixel before the target pixel shown in FIG.

In step 31, first, the address A _{00 of the} image memory, that is, the image data A is read into the arithmetic unit of FIG.
Think about valuing. For example, if A is 200 and the threshold value 127 is binarized, the binarization result is 2
This is 55, which means that overestimation of 55 is made, and error can be absorbed by allocating −55 to surrounding pixels.
That is, −55 is an error. On the contrary, if A is 40 and the binarization is performed with the threshold value 127, the binarization result is 0.
Therefore, 40 is estimated to be less, and the error can be absorbed by distributing 40 to the surrounding pixels. That is, 40 is an error. Now, let E _{A be} the error value generated by binarizing _A. Next, the calculation result E _A is written in the register.

In step 32, first, the address A _{10 of the} image memory, that is, the image data B and the error value E _A of the pixel of the image memory address A ₀₀ stored in the register in step 31 are read into the arithmetic unit 3 of FIG. , E _A is multiplied by 3/8 and the value obtained by adding the image data B is binarized in the same manner as in step 31, and an error value E _B due to binarization is calculated. Then, the error value E _A written in step 31 is written to the address A _{00 of the} line memory, and the error value E _B is written to the register. The result of performing the above processing for all the column addresses of the row address 0 of the line memory is step 33. The error value E _E of the column address A ₂₀ of the line memory in step 33 is the error value of the image data E of the image memory, and E _X is the error value of the image data X of the image memory.

In step 34, first, the image data C at the address A _{01 in} the image memory and the address A in the line memory are set.
The ₀₀ E _A read to the arithmetic unit 3 in FIG. 1, multiplied by 3/8 to E _A, binarizing the value obtained by adding the image data C as in step 31, the error value E _C by binarizing It is the step of writing to the register.

In step 35, first, the image data D at the address A _{11 in} the image memory and the address A in the line memory are searched.
₀₀ of the error value E _C on the error value E _B and the register error values E _A and the address A ₁₀ is read to the arithmetic unit 3 in FIG. 1, 2/8 to E _A
The result obtained by multiplying E _B , the result obtained by multiplying E _B by 3/8, the result obtained by multiplying E _C by 3/8, and the image data D are binarized in the same manner as in step 31, and binarized. Error value E
Calculate _D. Next, in step 34, the error value E _C written in the register is written in the address A ₀₀ of the line memory 4, and the error value E _D is written in the register 2.

If such scanning is performed for all the pixels of the image memory, the error of the surrounding pixels added to the address A _{mn of the} image memory is the address A _m0 of the line memory and the address A _{(m-1) of the} line memory. It is stored in ₀ and the register 7.

The step 23 in FIG. 2 is that the column address is one before and the row address is before the address of the target pixel stored in the address A _{(m-1) 0} of the line memory 4 in FIG. This is a step of reading the error value of the previous pixel (address A _{(m-1) (n-1)} ) into the calculator 3 of FIG. 1 and multiplying it by 2/8 (hereinafter, the value of the multiplied result is c)).

The step 24 in FIG. 2 means that the column address is one before and the row address is the same for the target pixel address stored in the register 2 in FIG.
The error value of _{(m-1 ) n} ) is read into the arithmetic unit 3 of FIG.
This is the step of multiplying by (hereinafter, the value of the multiplied result is d).

Step 25 in FIG. 2 is the operation unit 3 in FIG.
Is a step of adding the image data a read in step 21 and the values (b, c, d) calculated in steps 22 to 24 to calculate the error addition value.

The step 26 in FIG. 2 is the operation unit 3 in FIG.
Is a step of binarizing the error addition value calculated in step 25 with an arbitrary threshold value by
Is a step of writing the binarized result to the address A _{mn of the} image memory.

Further, step 28 is a step of calculating the error value of the error addition value calculated in step 25 by the arithmetic unit, and step 29 is the step of converting the image data at the address A _{(m -1) n} of the image memory. On the other hand, steps 21 to
This is a step of storing the calculated error value in the address A _{(m-1) 0} of the line memory by performing the processing up to step 29. Further, step 30 is a step of writing the error value of the error addition value calculated in step 28 in the register.

By the image processing apparatus shown in FIG. 1, the processing from step 21 to step 30 is changed from the address A ₀₀ to the address A _MN in the image memory, and the image processing by the error distribution of this embodiment is performed. It is realized by a small-scale hardware configuration with one line memory and one register.

[0036]

As described above, according to the present invention, unlike the conventional example, the error of the target pixel value is not distributed to the surrounding pixels, but the target pixel receives the distribution of the error value from the surrounding pixels. According to the configuration, the conventional example requires two line memories, but the line memory 1
This can be realized by one line and one register, and the hardware scale can be reduced.

[Brief description of drawings]

FIG. 1 is a block diagram of an image processing apparatus using an error distribution method according to an embodiment of the present invention.

FIG. 2 is a flowchart showing an algorithm of the image processing apparatus according to the embodiment of the present invention.

FIG. 3 is a diagram for explaining an error value stored in a line memory.

FIG. 4 is a block diagram of an image processing apparatus using a conventional error distribution method.

FIG. 5 is a flowchart showing an algorithm of a conventional image processing apparatus.

FIG. 6 is a diagram for explaining an error value stored in a line memory.

[Explanation of symbols]

 1,5 image memory 2,7 register 3 arithmetic unit 4,6 line memory

Claims (1)

[Claims] 1. An image processing apparatus according to an error distribution method, wherein an error value, which is a difference between an output image generated when an input image is binarized and the input image, is distributed to surrounding pixels to prevent deterioration of the output image. , A line memory that raster-scans an input image and holds an error value that is a processing result of a target pixel for 1H, a register that stores a processing result of a pixel immediately before the target pixel, and a target pixel value, A value weighted to the processing result of the pixel 1H before the target pixel stored in the line memory, a value weighted to the processing result of the pixel 1H + 1 before the target pixel, and a weight to the value of the register Of the binarized value of the computing unit, and a binarizing the added value, and outputting a difference between the added value and the binarized value. Image processing device that uses output as output image